公开(公告)号：JP2000059156A

公开(公告)日：2000-02-25

申请号：JP14387299

申请日：1999-05-24

Applicant: ST MICROELECTRONICS SRL

Inventor： MILANESI ANDREA ,  POLETTO VANNI

IPC: H03F3/45

Abstract: PROBLEM TO BE SOLVED: To improve in-phase quantity removal by securing negative feedback in either of cases of application of a feedback signal to the uninverted and inverted input terminals of an operational amplifier by providing feedback for the operational amplifier and applying the feedback signal to the uninverted or inverted input terminal of the operational amplifier depending upon the sign of a different that a comparator detects. SOLUTION: The signal that is outputted by a zero-crossing comparator COMP and indicates the sign of the difference Va-Vb from an input signal determines whether or not the output signal of the operational amplifier OP is inverted through a stage ±1 and also controls a switch A to selects one of the inverted '-' or uninverted '+' input node, to which a feedback current forced by a 2nd bipolar junction PNP transistor 1 of a current mirror is impressed. Consequently, the consistency of the sign of the signal and the invariably negative feedback of the operational amplifier OP are secured in either state. The in-phase gain is substantially zero.

公开(公告)号：JP2000058829A

公开(公告)日：2000-02-25

申请号：JP13955599

申请日：1999-05-20

Applicant: ST MICROELECTRONICS SRL

Inventor： MAGRI ANGELO ,  FRISINA FERRUCCIO

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To provide the structure of a high density MOS technology power device provided with a first conductivity-type base area formed in a second conductivity-type semiconductor layer. SOLUTION: A base area has at least pairs of substantially linear and substantially parallel base stripes 32. The respective base stripes 32 are connected to the adjacent base stripes 32 at end parts by a junction area. Thus, at least the pairs of base stripes 32 and the junction area can form continuous meandered base areas 31A-31D.

公开(公告)号：JP2000058802A

公开(公告)日：2000-02-25

申请号：JP674099

申请日：1999-01-13

Applicant: ST MICROELECTRONICS SRL

Inventor： MONTANINI PIETRO ,  VILLA FLAVIO ,  BARLOCCHI GABRIELE

IPC: H01L21/76 ,  H01L21/3065 ,  H01L21/762 ,  H01L27/12

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of an SOI wafer that can be supplied at low cost. SOLUTION: This manufacturing method of an SOI wafer consists of a process to form a reversed U-shape protection regions 30 made of oxidation resistant material covering first wafer portions 18 on a single crystal semiconductor wafer 1, a process to form deep trenches 16 that extend between the above first wafer portions 18 and demarcate side portions of the first wafer portions 18, a process to completely oxidize the first wafer portions 18 excluding the upper portions 21 covered by the protection regions, a process to form at least one continuous region 22 of a covered oxide that is overlaid with the above unoxidized upper portions 21, and a process to epitaxially grow a crystal semiconductor material layer from the above unoxidized upper portions 21.

公开(公告)号：JP2000058756A

公开(公告)日：2000-02-25

申请号：JP12036299

申请日：1999-04-27

Applicant: ST MICROELECTRONICS SRL

Inventor： MILANESI ANDREA ,  CHICCA STEFANIA ,  MORELLI MARCO ,  POLETTO VANNI

IPC: H01L27/04 ,  H01L21/822 ,  H03K17/082

Abstract: PROBLEM TO BE SOLVED: To totally remove a reverse-direction current and to minimize the bias current of a protection circuit by using an additional MOS transistor to switch off a second DMOS protection transistor during the period under 'below ground' condition. SOLUTION: A 'below ground' voltage condition, for example, of the integrated substrate of a device forming a diagnostic interface is detected by a comparator, which switches off a current generator I through a logic AND gate. At the same time, a current generator I2 which keeps an MOS transistor M at a high impedance state during the normal operation of a control unit is also switched off while a current generator I1 is switched on through an impedance to immediately decide switching-on of the MOS transistor M. Thus, a reverse- direction current flowing through a diagnostic output line VOUT is totally removed, while a bias current level is minimized.

公开(公告)号：JP2000024964A

公开(公告)日：2000-01-25

申请号：JP30722498

申请日：1998-10-28

Applicant: ST MICROELECTRONICS SRL

Inventor： FERRARI PAOLO ,  VIGNA BENEDETTO

IPC: B62D57/00 ,  B81B5/00 ,  B81C3/00 ,  H02N1/00 ,  B25J7/00 ,  B25J19/00

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor material integrated micro-actuator as well as to provide electrostatic force having sufficient rigidity in the vertical direction to a disk and having sufficient acceleration to a head in a microactuator. SOLUTION: This micro-actuator has an inside rotor 4 and an outside stator 3 having the circular extension part for accompanying a radial directional arm for supporting electrodes sandwiching each other by extending in the almost circumferential direction. For manufacture, first of all, a sacrificial area is formed on a base board, an epitaxial layer is grown in the next place, an electronic part and a bias conductive area are formed, a part of a lower side base board of the sacrificial area is removed thereafter, an aperture extending through the whole base board is formed, and the epitaxial layer is drilled to constitute the inside rotor 4 and the outside stator 3. These are mutually separated, the sacrificial area is finally removed, and a movable structure is released from the residual part of a chip.

公开(公告)号：JP2000013185A

公开(公告)日：2000-01-14

申请号：JP13422999

申请日：1999-05-14

Applicant: ST MICROELECTRONICS SRL

Inventor： DE MICHELI MARCO ,  PORTALURI SALVATORE ,  BOLLATI GIACOMINO ,  BRUCCOLERI MELCHIORRE

IPC: G05F3/26 ,  H03F3/30 ,  H03H11/04

Abstract: PROBLEM TO BE SOLVED: To shorten transconductance stable time after a request for changing the interruption frequency of a filter by installing a feedback loop between the output/input of a transconductor connected to DAC so that reference current is set and making reference current which is set by DAC into a mirror image. SOLUTION: In a master section circuit, output current IR from DAC 7, which is set by reference current generated by a current source 8 and digital word FC-WORD, is made into a mirror image by a PMOS transistor 20 which is diode-connected. Current which is made into the mirror image is sent later from a PMOS transistor 21 to an NMOS transistor 22. It is made into the mirror image in an NMOS transistor 23. The drain terminal of the transistor 23 is connected to a node 6 and a capacitor 5 is connected to the node 6. Thus, the transistor 22 sets the current of the transistor 23.

公开(公告)号：JPH11312239A

公开(公告)日：1999-11-09

申请号：JP37282398

申请日：1998-12-28

Applicant: ST MICROELECTRONICS SRL

Inventor： COLLA FEDERICA ,  MANCUSO MASSIMO ,  POLUZZI RINALDO

IPC: G03B27/73 ,  G06T5/00 ,  G06T7/40 ,  H04N9/64

Abstract: PROBLEM TO BE SOLVED: To provide a digital image color correcting device for correcting facial tone image parts of a digital video image by adopting fuzzy logic. SOLUTION: This device includes a pixel fuzzy fine unit 1 for receiving a pixel stream belonging to a sequence of correlated frames of a digital video image and for calculating a multilevel value representing the membership of each pixel with respect to a skin color class, a global parameter estimator 2 for receiving each pixel and a relative membership value and for calculating first and second parameters regulating the feature of an image belonging to the skin color class, a processing unit 3 for correcting each of the pixels of the part of the image belonging to the skin color class according to the first global parameter, and a processing switch 4 for outputting pixels or corrected pixels in accordance with the second global parameter.

公开(公告)号：JPH11267076A

公开(公告)日：1999-10-05

申请号：JP2164699

申请日：1999-01-29

Applicant: ST MICROELECTRONICS SRL

Inventor： GRASSO GIUSEPPE ,  LO PRESTI MATTEO ,  SORTINO GIANFRANCO

IPC: A47L9/28 ,  G05B13/02 ,  G05D16/20

Abstract: PROBLEM TO BE SOLVED: To provide an intelligent suction device in which suction force can be automatically adjusted corresponding to a condition of a surface to be cleaned. SOLUTION: An intelligent suction device for a vacuum cleaner or the like especially includes a fuzzy logic controller 1. The fuzzy logic controller 1 is suitable to controlling a motor of a turbine 2, its suction force is detected by at least one pressure sensor 3, and the pressure sensor 3 feeds its measured value back to the controller 1 in a closed loop.

公开(公告)号：JPH11249708A

公开(公告)日：1999-09-17

申请号：JP36474598

申请日：1998-12-22

Applicant: ST MICROELECTRONICS SRL

Inventor： PORTALURI SALVATORE ,  PISATI VALERIO

IPC: G05B19/00 ,  H03H11/04

Abstract: PROBLEM TO BE SOLVED: To provide a feed forward(FF) circuit structure with which delay can be programmed according to a request while maintaining the suitable band width of signals. SOLUTION: This FF circuit structure provided with programmable zero is provided with first and second cells to be cascade connected. The said first and second cells are respectively provided with the first and second pairs of bipolar transistors, a first high impedance element, a second high element and a fifth transistor 8. The base terminal of the fifth transistor 8 receives a signal, which is outputted from the collector terminal of the first pair of first transistors 1, to be outputted as a positive code at the first cell but to be outputted as a negative code at the second cell in order to determine a transmission function having a pair of special points in molecules. A second transistor 2 in the said pair of first and second transistors 1 and 2 is controlled by respective third and fourth current sources 11 and 9 having different values.

公开(公告)号：JPH11232878A

公开(公告)日：1999-08-27

申请号：JP33991098

申请日：1998-11-30

Applicant: ST MICROELECTRONICS SRL

Inventor： TOOHER MICHAEL ,  TONELLO STEFANO

IPC: G11C11/412

Abstract: PROBLEM TO BE SOLVED: To obtain a RAM memory cell with which power consumption is reduced and which is useful for memory structure having very long work length. SOLUTION: This RAM memory cell comprises first and second cross- connected CMOS inverters 12, 13 comprising respectively PMOS pull-up transistors M3, M4 and NMOS pull-down transistors M1, M2, and first and second success transistors M5, M6 connecting respectively the second inverter 13 and the first inverter 12 to corresponding bit lines. And source temporal of the pull-down transistors M1, M2 are connected to pre-charge lines PL extending in parallel to respective word lines. Further, the first and the second access transistors M5, M6 are PMOS transistors whose gate terminals are connected to word lines WL.