公开(公告)号：EP0600052A1

公开(公告)日：1994-06-08

申请号：EP93909756.0

申请日：1993-06-10

Applicant: DYCONEX PATENTE AG

Inventor： SCHMIDT, Walter ,  MARTINELLI, Marco

IPC: H05K1 ,  H05K3

CPC classification number: H05K3/4084 ,  H05K1/0287 ,  H05K1/0289 ,  H05K1/0393 ,  H05K1/05 ,  H05K1/115 ,  H05K3/0041 ,  H05K3/0061 ,  H05K3/0064 ,  H05K3/0097 ,  H05K3/386 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/066 ,  H05K2201/0909 ,  H05K2201/09327 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/09609 ,  H05K2201/09627 ,  H05K2201/09781 ,  H05K2201/09836 ,  H05K2201/09945 ,  H05K2201/10666 ,  H05K2203/0554 ,  H05K2203/0746 ,  H05K2203/1184 ,  H05K2203/1545 ,  H05K2203/1572

Abstract: Ce procédé pour la fabrication de points de contact pouvant être mis en contact, ultérieurement entre les deux plans de piste conductrice d'un support de circuit séparés par une couche électriquement isolante, offre la possibilité d'établir p. ex un schéma conducteur de base facilement adaptable, à court terme et ultérieurement, aux exigences correspondantes. En ménageant des fenêtres dans les plans de piste conductrice de sorte que des parties en forme de barres reliées à la périphérie d'ouverture soient dégagées entre ou dans les ouvertures lorsque la gravure traverse la couche électriquement isolante sous l'effet de la gravure sous-jacente, ces parties en forme de barres dégagées pouvant être mises en contact avec des parties électroconductrices de l'autre plan de piste conductrice, on peut relier électriquement ces pistes électriquement conductrices par flexion mécanique.

公开(公告)号：EP0600051A1

公开(公告)日：1994-06-08

申请号：EP93909754.0

申请日：1993-06-09

Applicant: DYCONEX PATENTE AG

Inventor： SCHMIDT, Walter ,  MARTINELLI, Marco

IPC: H05K1 ,  H05K3

CPC classification number: H05K3/4655 ,  H05K1/0287 ,  H05K1/0289 ,  H05K1/0393 ,  H05K1/05 ,  H05K1/115 ,  H05K3/0041 ,  H05K3/0061 ,  H05K3/0064 ,  H05K3/0097 ,  H05K3/386 ,  H05K3/4084 ,  H05K3/42 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4635 ,  H05K3/4641 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/066 ,  H05K2201/0909 ,  H05K2201/09327 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/09572 ,  H05K2201/09609 ,  H05K2201/09627 ,  H05K2201/09781 ,  H05K2201/09836 ,  H05K2201/09945 ,  H05K2201/10666 ,  H05K2203/0554 ,  H05K2203/0746 ,  H05K2203/1184 ,  H05K2203/1545 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T428/24917

Abstract: Il s'est agi en ce qui concerne le produit semi-fini de l'invention, de séparer de manière fonctionnelle l'exigence en faveur de la résistance mécanique et celle qui allait jusqu'à présent de pair, en faveur d'une connexion de couplage, afin que la connexion de couplage en tant que telle, notamment pour les signaux, corresponde davantage aux propriétés électriques et techniques des puces. A cette fin, on optimise la miniaturisation d'implantation sans tenir compte de la résistance mécanique du substrat. A la place d'une carte de circuits imprimés (MCM), on fabrique un produit semi-fini pouvant être développé en une carte de circuits imprimés. Le produit semi-fini réalisé selon l'invention consiste en une pellicule (8) extrêmement fine comportant une pluralité de trous (14) extrêmement petits obtenus simultanément par gravure. Les diamètres des trous peuvent être réduits de pratiquement un ordre de grandeur (jusqu'à 20 mum), ce qui permet par exemple d'utiliser réellement une technique inférieure à 100 mum. Un produit semi-fini de ce type ne sert pas de support mécanique. Il n'est destiné qu'à la conduction de signaux. Le produit semi-fini (19) qui sert de support à la configuration de câblage densifiée est assemblé avec un plan d'alimentation en courant (22) non densifié servant de plan de service. La carte de circuits imprimés ainsi réalisée est ensuite assemblée avec un support mécanique (20).

公开(公告)号：EP2503859A4

公开(公告)日：2013-11-20

申请号：EP10839574

申请日：2010-12-24

Applicant: FUJIKURA LTD

Inventor： YAMAMOTO SATOSHI ,  SUZUKI TAKANAO ,  MATSUYAMA MASAMI

IPC: H05K1/11 ,  H01L23/12 ,  H05K3/40

CPC classification number: H05K3/0029 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/025 ,  Y10T29/49165 ,  H01L2924/00

Abstract: An interposer substrate of the present invention includes a planar substrate, and through hole wiring that is formed by filling a through hole that connects together a first main surface and a second main surface of this substrate with a conductor. When the through hole is viewed in a vertical cross-sectional view of the substrate, the through hole has a trapezoidal shape whose side walls are formed by an inside surface of the through hole, and two side faces of the trapezoid are not parallel to each other. The two side faces of the trapezoid are both inclined towards the same side relative to two perpendicular lines that are perpendicular to the first main surface or the second main surface at two apex points forming a top face or a bottom face of the trapezoid.

公开(公告)号：EP1670075B1

公开(公告)日：2013-02-27

申请号：EP05026727.7

申请日：2005-12-07

Applicant: NGK SPARK PLUG CO., LTD

Inventor： Nagai, Makoto ,  Yada, Setsuo ,  Uchida, Atsushi

IPC: H01L33/60 ,  H01L33/48 ,  H01L33/62

CPC classification number: H05K1/183 ,  H01L33/486 ,  H01L33/60 ,  H01L33/62 ,  H01L2224/32225 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/246 ,  H05K3/4614 ,  H05K3/4629 ,  H05K3/4697 ,  H05K2201/0347 ,  H05K2201/09836 ,  H05K2201/09981 ,  H05K2201/10106 ,  H05K2203/061

公开(公告)号：EP2493273A1

公开(公告)日：2012-08-29

申请号：EP10824714.9

申请日：2010-08-04

Applicant: Fujikura, Ltd.

Inventor： YAMAMOTO Satoshi ,  HIRANO Hiroyuki ,  SUZUKI Takanao

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/40

CPC classification number: H01L21/486 ,  H01L23/3107 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/09701 ,  H01L2924/1461 ,  H05K1/113 ,  H05K3/101 ,  H05K2201/09263 ,  H05K2201/09836 ,  H05K2201/10545 ,  Y10T29/49165 ,  H01L2924/00

Abstract: Provided is a device packaging structure including: an interposer substrate including a substrate, and a plurality of through-hole interconnections formed inside a plurality of through-holes passing through the substrate from a first main surface toward a second main surface, the first main surface being one main surface of the substrate, the second main surface being the other main surface thereof; a first device which includes a plurality of electrodes and is arranged so that these electrodes face the first main surface; and a second device which includes a plurality of electrodes of which an arrangement is different from an arrangement of each of the electrodes of the first device, and is arranged so that these electrodes face the second main surface. Each of the through-hole interconnections includes a first conductive portion, provided at a position corresponding to the electrode of the first device, on the first main surface, and a second conductive portion, provided at a position corresponding to the electrode of the second device, on the second main surface, each electrode of the first device is electrically connected to the first conductive portion, each of the electrodes of the second device is electrically connected to the second conductive portion, and each of the through-hole interconnections includes a linear portion vertically extending from at least one of the first main surface and the second main surface.

Abstract translation: 本发明提供一种器件封装结构，其特征在于，包括：内插基片，具有基板和形成在从第一主面朝向第二主面的贯穿基板的多个贯通孔内形成的多个通孔布线，所述第一主面 作为基板的一个主表面，第二主表面是其另一个主表面; 第一装置，其包括多个电极，并且被布置成使得这些电极面向第一主表面; 以及第二装置，其包括多个电极，其布置不同于第一装置的每个电极的布置，并且被布置成使得这些电极面对第二主表面。 每个通孔互连包括在第一主表面上设置在与第一装置的电极相对应的位置处的第一导电部分和设置在与第二装置的电极对应的位置处的第二导电部分 在第二主表面上，第一器件的每个电极电连接到第一导电部分，第二器件的每个电极电连接到第二导电部分，并且每个通孔互连件包括线性 部分从第一主表面和第二主表面中的至少一个垂直延伸。

公开(公告)号：EP2493272A1

公开(公告)日：2012-08-29

申请号：EP10824710.7

申请日：2010-08-02

Applicant: Fujikura, Ltd.

Inventor： YAMAMOTO Satoshi ,  HIRANO Hiroyuki ,  SUZUKI Takanao

IPC: H05K1/11 ,  H01L23/473 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H05K3/40

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/473 ,  H01L23/49816 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/09701 ,  H01L2924/1461 ,  H05K1/113 ,  H05K2201/09836 ,  H05K2201/10378 ,  H05K2201/10545 ,  H01L2924/00

Abstract: Provided is a device packaging structure including: an interposer substrate including a substrate, and a plurality of through-hole interconnections formed inside a plurality of through-holes passing through the substrate from a first main surface toward a second main surface, the first main surface being one main surface of the substrate, the second main surface being the other main surface thereof; a first device which includes a plurality of electrodes and is arranged so that these electrodes face the first main surface; and a second device which includes a plurality of electrodes of which an arrangement is different from an arrangement of each of the electrodes of the first device, and is arranged so that these electrodes face the second main surface. Each of the through-hole interconnections includes a first conductive portion which is provided at a position corresponding to the electrode of the first device, on the first main surface, and a second conductive portion which is provided at a position corresponding to the electrode of the second device on the second main surface, each of the electrodes of the first device is electrically connected to the first conductive portion, each of the electrodes of the second device is electrically connected to the second conductive portion, and each of the through-hole interconnections includes a linear portion vertically extending from at least one of the first main surface and the second main surface.

Abstract translation: 提供一种器件封装结构，包括：中介层基板，包括基板和多个通孔互连，所述多个通孔互连形成在从第一主表面朝向第二主表面穿过所述基板的多个通孔内，所述第一主表面 作为所述基板的一个主表面，所述第二主表面是其另一个主表面; 第一装置，其包括多个电极并且被布置为使得这些电极面向所述第一主表面; 以及第二器件，其包括与第一器件的每个电极的布置不同的布置的多个电极，并且被布置为使得这些电极面向第二主表面。 每个通孔互连包括第一导电部分和第二导电部分，第一导电部分设置在第一主表面上的与第一器件的电极相对应的位置处，第二导电部分设置在与第一主表面上的 第二器件在第二主表面上，第一器件的每个电极电连接到第一导电部分，第二器件的每个电极电连接到第二导电部分，并且每个通孔互连 包括从第一主表面和第二主表面中的至少一个垂直延伸的线性部分。

公开(公告)号：EP1832148B1

公开(公告)日：2011-05-04

申请号：EP05821805.8

申请日：2005-12-22

Applicant: BAE Systems PLC

Inventor： AGNEW, Martin Joseph, BAE SYSTEMS ATC ,  PANAGHISTON, Gary David, BAE SYSTEMS ATC ,  NIMAN, Murray Jerel, BAE SYSTEMS ATC ,  CHANDLER, Nicholas, BAE SYSTEMS ATC

IPC: H05K3/36 ,  H05K1/02

CPC classification number: H05K1/0218 ,  H05K1/142 ,  H05K1/144 ,  H05K1/145 ,  H05K3/368 ,  H05K3/403 ,  H05K2201/0397 ,  H05K2201/0715 ,  H05K2201/0919 ,  H05K2201/09836

Abstract: The invention relates to circuit boards and to screening circuits and components on such boards from stray rf interference when they are mounted as arrays or stacks of such circuit boards. The- circuit boards (12, 14) are individually screened by conductive screening layers (16, 18) as known in the art and the individual screening layers are coupled together by layered interconnects (34) which connect corresponding screening layers (16, 18) of the individual circuit boards (12, 14) together, instead of by vias.

公开(公告)号：EP1988758A4

公开(公告)日：2011-03-23

申请号：EP07708420

申请日：2007-02-20

Applicant: IBIDEN CO LTD

Inventor： IKEDA TOMOYUKI

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/0026 ,  C25D5/02 ,  H05K1/119 ,  H05K3/0032 ,  H05K3/0094 ,  H05K3/422 ,  H05K3/423 ,  H05K3/427 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2203/1572 ,  Y10T29/49124 ,  Y10T29/49126

公开(公告)号：EP1832148A1

公开(公告)日：2007-09-12

申请号：EP05821805.8

申请日：2005-12-22

Applicant: BAE Systems PLC

Inventor： AGNEW, Martin Joseph, BAE SYSTEMS ATC ,  PANAGHISTON, Gary David, BAE SYSTEMS ATC ,  NIMAN, Murray Jerel, BAE SYSTEMS ATC ,  CHANDLER, Nicholas, BAE SYSTEMS ATC

IPC: H05K3/36 ,  H05K1/02

CPC classification number: H05K1/0218 ,  H05K1/142 ,  H05K1/144 ,  H05K1/145 ,  H05K3/368 ,  H05K3/403 ,  H05K2201/0397 ,  H05K2201/0715 ,  H05K2201/0919 ,  H05K2201/09836

Abstract: The invention relates to circuit boards and to screening circuits and components on such boards from stray rf interference when they are mounted as arrays or stacks of such circuit boards. The- circuit boards (12, 14) are individually screened by conductive screening layers (16, 18) as known in the art and the individual screening layers are coupled together by layered interconnects (34) which connect corresponding screening layers (16, 18) of the individual circuit boards (12, 14) together, instead of by vias.

Abstract translation: 本发明涉及电路板并且当它们作为这种电路板的阵列或堆叠被安装时屏蔽这些电路板上的电路和组件免受杂散射频干扰。 如本领域已知的，电路板（12,14）由导电屏蔽层（16,18）单独屏蔽，并且各个屏蔽层通过分层互连（34）耦合在一起，所述分层互连将相应的屏蔽层（16,18） 的各个电路板（12,14）一起，而不是通孔。

公开(公告)号：EP1796444A2

公开(公告)日：2007-06-13

申请号：EP06077045.0

申请日：2006-11-17

Applicant: Delphi Technologies, Inc.

Inventor： Fairchild, M. Ray ,  Djordjevic, Aleksandra ,  Ruiz, Javier

IPC: H05K1/02

CPC classification number: H05K1/0206 ,  H01L23/3677 ,  H01L24/33 ,  H01L2224/32225 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H05K3/0061 ,  H05K2201/09836 ,  H01L2924/00

Abstract: An electronics assembly (10) is provided including a circuit board substrate (20) having a top surface and a bottom surface and a plurality of thermal conductive vias (26) extending from the top surface to the bottom surface. At least one electronics package (12) is mounted to the top surface of the substrate (20). A heat sink device (30) is in thermal communication with the bottom surface of the substrate (20). Thermal conductive vias (26) are in thermal communication to pass thermal energy from the at least one electronics package (12) to the heat sink (30). At least some of the thermal conductive vias (26) are formed extending from the top surface to the bottom surface of the substrate (20) at an angle (θ).

Abstract translation: 提供一种电子组件（10），其包括具有顶表面和底表面的电路板基底（20）和从顶表面延伸到底表面的多个导热通孔（26）。 至少一个电子封装（12）安装到基板（20）的顶表面。 散热装置（30）与衬底（20）的底表面热连通。 导热通孔（26）热连通以将来自至少一个电子封装（12）的热能传递到散热器（30）。 至少一些导热通孔（26）形成为以角度（R）从基板（20）的顶表面延伸到底表面。