公开(公告)号：US20240098895A1

公开(公告)日：2024-03-21

申请号：US18355167

申请日：2023-07-19

Applicant: Jabil Inc.

Inventor： Lun Hao Tung ,  Lai Ming Lim ,  Zambri Samsudin

IPC: H05K1/11 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/111 ,  H05K1/0283 ,  H05K1/181 ,  H05K2201/09236 ,  H05K2201/0939

Abstract: A bond pad connector to be disposed on a stretchable substrate and adapted to secure an electronic component thereon. The bond pad connector includes two spaced apart bond pads that are adapted to be disposed on the stretchable substrate to face each other. Each of the two bond pads is adapted to be connected to a respective conductive trace and includes: a stress relieve component that is adapted to be connected to the conductive trace, the stress relieve component being formed with a central hole; and an extension component extending from the stress relieve component and opposite to the conductive trace. The electronic component is secured onto the bond pad connector by attaching the electronic component to, for each of the bond pads, at least a part of the extension component.

公开(公告)号：US20180213644A1

公开(公告)日：2018-07-26

申请号：US15880670

申请日：2018-01-26

Applicant: IBIDEN CO., LTD.

Inventor： Hiroyasu Noto ,  Yoshinori Takenaka

IPC: H05K1/11 ,  H05K1/03

CPC classification number: H05K1/113 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H05K1/0373 ,  H05K1/116 ,  H05K2201/0209 ,  H05K2201/0257 ,  H05K2201/0266 ,  H05K2201/068 ,  H05K2201/0939 ,  H05K2201/09509 ,  H05K2201/09827

Abstract: A printed wiring board includes an interlayer resin insulating layer including resin and inorganic particles, a via conductor formed through the insulating layer, a first conductor layer formed on the first surface of the insulating layer and including a land portion of the via conductor on the first surface, and a second conductor layer formed on second surface of the insulating layer and connected to bottom of the via conductor. The bottom of the via conductor has diameter of 20 to 35 μm, the first conductor layer has thickness of 3 to 12 μm, the insulating layer has thickness of 1 to 15 μm, the second conductor layer has thickness of 1 to 12 μm, and the second conductor and insulating layers are formed such that T1/T2 is 0.06 to 7.00 where T1 represents the thickness of the second conductor layer, and T2 represents the thickness of the insulating layer.

公开(公告)号：US09995894B2

公开(公告)日：2018-06-12

申请号：US15028934

申请日：2014-10-08

Applicant: ams AG

Inventor： Jochen Kraft ,  Karl Rohracher ,  Jordi Teva

IPC: G02B6/12 ,  H01L21/00 ,  H01L23/48 ,  H01L31/16 ,  G02B6/42 ,  G02B6/43 ,  H05K1/02 ,  H05K1/11 ,  G02B6/13 ,  H05K1/18 ,  H05K3/42 ,  H05K3/46

CPC classification number: G02B6/4283 ,  G02B6/12002 ,  G02B6/13 ,  G02B6/4274 ,  G02B6/428 ,  G02B6/43 ,  G02B2006/121 ,  G02B2006/12107 ,  G02B2006/12121 ,  G02B2006/12123 ,  G02B2006/12147 ,  H01L23/481 ,  H01L23/522 ,  H01L31/16 ,  H01L2224/16225 ,  H05K1/0274 ,  H05K1/115 ,  H05K1/116 ,  H05K1/181 ,  H05K3/429 ,  H05K3/4605 ,  H05K2201/0939 ,  H05K2201/09518 ,  H05K2201/09581 ,  H05K2201/10174

Abstract: The method comprises providing a semiconductor substrate, which has a main surface and an opposite further main surface, arranging a contact pad above the further main surface, forming a through-substrate via from the main surface to the further main surface at a distance from the contact pad and, by the same method step together with the through-substrate via, forming a further through-substrate via above the contact pad, arranging a hollow metal via layer in the through-substrate via and, by the same method step together with the metal via layer, arranging a further metal via layer in the further through-substrate via, the further metal via layer contacting the contact pad, and removing a bottom portion of the metal via layer to form an optical via laterally surrounded by the metal via layer.

公开(公告)号：US20180063953A1

公开(公告)日：2018-03-01

申请号：US15677395

申请日：2017-08-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jung Yun JO ,  Jeong Do YANG

IPC: H05K1/11 ,  H05K3/18 ,  H05K3/28 ,  H05K3/40

CPC classification number: H05K1/111 ,  H05K1/0313 ,  H05K1/09 ,  H05K3/188 ,  H05K3/28 ,  H05K3/36 ,  H05K3/4007 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/09045 ,  H05K2201/0939 ,  H05K2201/10128 ,  H05K2201/10136 ,  H05K2203/0723

Abstract: A circuit board, a display device including the same, and a method of manufacturing a circuit board are provided. A circuit board includes a base substrate, a wiring line provided on the base substrate, a passivation layer provided on the wiring line, an elastic bump provided on the passivation layer, and a conductive layer provided on the elastic bump. The passivation layer includes a first opening and a second opening that expose a partial region of the wiring line, and the second opening is arranged in a region adjacent to the first opening.

公开(公告)号：US09795034B2

公开(公告)日：2017-10-17

申请号：US14404938

申请日：2013-05-30

Applicant: KYOCERA Corporation

Inventor： Yukio Fujihara ,  Kenjirou Fukuda

IPC: H05K1/00 ,  H05K1/11 ,  H01L33/62 ,  H05K1/18 ,  H05K7/12 ,  H05K1/02 ,  H01L33/48

CPC classification number: H05K1/111 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15174 ,  H01L2924/181 ,  H05K1/02 ,  H05K1/112 ,  H05K1/117 ,  H05K1/181 ,  H05K2201/0367 ,  H05K2201/09036 ,  H05K2201/0939 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: There is provided a wiring board capable of strengthening the bonding between an external terminal and a wiring of an external circuit board. A wiring board includes an insulating substrate having two main surfaces facing each other, side surfaces connecting to the two main surfaces and concave portions concave from the side surfaces and connecting to at least one of the two main surfaces; and external terminals disposed from one of the main surfaces to inner surfaces of the respective concave portions, each of the external terminals having a convex-shaped section disposed on one main surface side along each of the concave portions.

公开(公告)号：US09660162B2

公开(公告)日：2017-05-23

申请号：US14657474

申请日：2015-03-13

Applicant: NICHIA CORPORATION

Inventor： Yuta Oka

IPC: H01L23/48 ,  H01L33/62 ,  H05K1/11 ,  H01L33/48 ,  H05K3/34

CPC classification number: H01L33/62 ,  H01L33/486 ,  H01L2224/16225 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/0939 ,  H05K2201/09418 ,  H05K2201/09427 ,  H05K2201/09663 ,  H05K2201/09954 ,  H05K2203/048 ,  Y02P70/611

Abstract: Provided is an illumination device that includes a light emitting device having a first electrode and a second electrode and a mounting substrate including a first wiring pattern and a second wiring pattern. The first wiring pattern and the second wiring pattern face and are bonded to the first electrode and the second electrode, respectively, through a bonding material. The second electrode and the second wiring pattern are configured to be at least partially overlapped with each other in a plan view irrespective of an orientation of the light emitting device, under condition that the first electrode and the first wiring pattern are at least partially overlapped with each other in the plan view.

公开(公告)号：US09510448B2

公开(公告)日：2016-11-29

申请号：US14473509

申请日：2014-08-29

Applicant: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.

Inventor： Eric R. Ao ,  Stephen J. Flint ,  Michael W. J. Hogan ,  Shannon D. McGale ,  Rodolfo B. Salinas

IPC: H05K7/00 ,  H05K1/16 ,  H05K1/11 ,  H05K7/10 ,  H01K3/10 ,  H05K1/18 ,  H05K3/34

CPC classification number: H05K1/113 ,  H05K1/111 ,  H05K1/116 ,  H05K1/181 ,  H05K3/3415 ,  H05K2201/0939 ,  H05K2201/09609 ,  Y02P70/611

Abstract: A circuit board has a first side and a second side opposite thereto. The board includes vias extending through the substrate from the first side to the second side, and via contact pads on the second side, each of which surrounds a corresponding via. The board includes a pair of surface mount contact pads on the second side. Each surface mount contact pad has a surface area and edges, each of which can have a shape to maximize the surface area while maintaining predetermined minimum separation distances. Each edge except one or more edges that are opposite another surface mount contact pad have a curved shape, and each edge opposite another surface mount contact pad have a linear shape. Curved edges adjacently opposite corresponding via contact pads can have curved shapes can have concave shapes, and curved edges not adjacently opposite via contact pads can have convex shapes.

Abstract translation: 电路板具有与其相对的第一侧和第二侧。 该板包括从第一侧延伸穿过基板的通孔到第二侧，以及通过第二侧上的接触焊盘，其中每一个围绕相应的通孔。 该板包括一对表面贴装接触垫在第二面。 每个表面安装接触垫具有表面积和边缘，每个表面区域和边缘可以具有使表面积最大化的形状，同时保持预定的最小间隔距离。 除了与另一表面安装接触垫相对的一个或多个边缘之外的每个边缘具有弯曲形状，并且与另一表面安装接触垫相对的每个边缘具有线性形状。 通过接触焊盘相对相对相对的弯曲边缘可以具有弯曲形状可以具有凹形形状，并且通过接触垫不相邻相对的弯曲边缘可以具有凸形形状。

公开(公告)号：US20150270593A1

公开(公告)日：2015-09-24

申请号：US14637898

申请日：2015-03-04

Applicant: ADVANCED FLEXIBLE CIRCUITS CO., LTD.

Inventor： CHIH-HENG CHUO ,  GWUN-JIN LIN ,  KUO-FU SU

IPC: H01P1/22 ,  H05K1/02 ,  H05K1/11

CPC classification number: H01P1/227 ,  H03H7/38 ,  H05K1/0225 ,  H05K1/0251 ,  H05K1/116 ,  H05K1/189 ,  H05K3/3447 ,  H05K2201/0715 ,  H05K2201/093 ,  H05K2201/09381 ,  H05K2201/0939 ,  H05K2201/09718 ,  H05K2201/10931

Abstract: Disclosed is an attenuation reduction structure for high-frequency connection pads of a circuit board with an insertion component. The circuit board includes at least one pair of differential mode signal lines formed thereon. A substrate has upper and lower surfaces respectively provided with at least one pair of upper connection pads and lower connection pads. A first metal layer is formed on the lower surface of the substrate. The first metal layer includes an attenuation reduction grounding pattern structure. The attenuation reduction grounding pattern structure includes a hollow area and at least one protruded portion. The protruded portion extends from the first metal layer in a direction toward the lower connection pads.

Abstract translation: 公开了一种具有插入部件的电路板的高频连接焊盘的衰减减小结构。 电路板包括形成在其上的至少一对差模信号线。 衬底具有分别设置有至少一对上连接焊盘和下连接焊盘的上表面和下表面。 第一金属层形成在基板的下表面上。 第一金属层包括衰减减小接地图案结构。 衰减降低接地图案结构包括中空区域和至少一个突出部分。 突出部分沿着朝向下连接焊盘的方向从第一金属层延伸。

公开(公告)号：US20150228571A1

公开(公告)日：2015-08-13

申请号：US14592105

申请日：2015-01-08

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Satoshi SHIRAKI

IPC: H01L23/498 ,  H05K1/02 ,  H01L23/04 ,  H05K1/11 ,  H01L21/78 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12044 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1533 ,  H01L2924/181 ,  H05K1/111 ,  H05K1/144 ,  H05K3/0052 ,  H05K3/0097 ,  H05K2201/0939 ,  H05K2201/09409 ,  H05K2201/09418 ,  H05K2201/10977 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/01047 ,  H01L2924/01029

Abstract: A wiring substrate includes a block with substrates laid out in an array. The block includes corners and a plan view center. Each substrate includes a substrate body. Pads are formed on the substrate body. Each pad includes a pad surface. The pads of the substrates include first pads, which are the pads of one of the substrates located in at least one of the corners of the block. The pad surface of each of the first pads includes a first axis extending from the first pad toward the plan view center of the block. The pad surface of each of the first pads has a first length along the corresponding first axis and a second length along a second axis, which is orthogonal to the first axis. The first length is longer than the second length.

Abstract translation: 布线基板包括具有布置在阵列中的基板的块。 该块包括角落和平面图中心。 每个基板包括基板主体。 垫片形成在基板主体上。 每个垫包括垫表面。 衬底的焊盘包括第一焊盘，其是位于块的至少一个角落中的一个衬底的焊盘。 每个第一焊盘的焊盘表面包括从第一焊盘朝向块的平面图中心延伸的第一轴。 每个第一焊盘的焊盘表面具有沿着对应的第一轴线的第一长度和沿着与第一轴线正交的第二轴线的第二长度。 第一长度比第二长度长。

公开(公告)号：US20150146397A1

公开(公告)日：2015-05-28

申请号：US14404938

申请日：2013-05-30

Applicant: KYOCERA Corporation

Inventor： Yukio Fujihara ,  Kenjirou Fukuda

IPC: H05K1/11 ,  H05K1/18

CPC classification number: H05K1/111 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15174 ,  H01L2924/181 ,  H05K1/02 ,  H05K1/112 ,  H05K1/117 ,  H05K1/181 ,  H05K2201/0367 ,  H05K2201/09036 ,  H05K2201/0939 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: There is provided a wiring board capable of strengthening the bonding between an external terminal and a wiring of an external circuit board. A wiring board includes an insulating substrate having two main surfaces facing each other, side surfaces connecting to the two main surfaces and concave portions concave from the side surfaces and connecting to at least one of the two main surfaces; and external terminals disposed from one of the main surfaces to inner surfaces of the respective concave portions, each of the external terminals having a convex-shaped section disposed on one main surface side along each of the concave portions.

Abstract translation: 提供了能够加强外部端子与外部电路板的布线之间的接合的布线板。 布线基板包括具有彼此面对的两个主表面的绝缘基板，连接到两个主表面的侧表面和从侧表面凹入并连接到两个主表面中的至少一个的凹部; 以及外部端子，其从一个主表面设置到各个凹部的内表面，每个外部端子具有沿着每个凹部设置在一个主表面侧上的凸形部分。