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公开(公告)号：JP2016018858A
公开(公告)日：2016-02-01
申请号：JP2014139957
申请日：2014-07-07
Applicant: 新光電気工業株式会社
CPC classification number: H05K3/4644 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L25/0652 , H01L25/0655 , H01L25/105 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06517 , H01L2225/1023 , H01L2225/1058 , H01L2924/0002 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H05K2201/09545 , H05K2201/09563 , H05K2201/09827 , H05K2201/09854 , H05K2203/025 , H05K2203/1572 , H05K3/0038
Abstract: 【課題】高密度化を実現可能な配線基板を提供する。 【解決手段】コア層11と、第1配線層12と、非感光性樹脂からなる第1絶縁層13と、第1絶縁層に埋設された第1ビア配線14と、第1絶縁層の上面に第1ビア配線と接合された第2配線層31と、第2配線層を被覆するように第1絶縁層の上面に形成された感光性樹脂からなる第2絶縁層32と、第2絶縁層に埋設され第2配線層と接続する第2ビア配線と、コア層の他方の面に形成された第3配線層22と、コア層の他方の面側に形成された非感光性樹脂からなる第3絶縁層23と、第3絶縁層に埋設され前記第3配線層と接続する第3ビア配線と、コア層を貫通し、第1配線層と前記第3配線層とを接続する貫通配線と、を有し、第1絶縁層の上面は、第3絶縁層の下面よりも平坦であり、第2配線層は第1配線層よりも配線密度が高く、貫通配線のコア層の一方面側の上端面の面積が、コア層の他方面側よりも小さい。 【選択図】図1
Abstract translation: 要解决的问题：提供能够实现更高密度的布线板。解决方案：布线板包括：芯层11; 第一布线层12; 由非感光性树脂构成的第一绝缘层13; 嵌入第一绝缘层中的第一通孔布线14; 在第一绝缘层的上表面上接合到第一通孔布线的第二布线层31; 形成在第一绝缘层的上表面上以覆盖第二布线层并由感光树脂构成的第二绝缘层32; 第二通孔布线，其嵌入在所述第二绝缘层中并连接到所述第二布线层; 形成在芯层的另一个表面上的第三布线层22; 形成在芯层的另一个表面侧并由非感光树脂构成的第三绝缘层23; 第三通孔布线，其嵌入在所述第三绝缘层中并连接到所述第三布线层; 以及穿透芯层并连接第一布线层和第三布线层的贯通布线。 第一绝缘层的上表面比第三绝缘层的下表面平坦。 第二布线层具有比第一布线层更高的布线密度。 通孔的芯层的一个表面侧的上端面的面积比芯层的另一面侧的面积小。图1
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公开(公告)号：JP5800674B2
公开(公告)日：2015-10-28
申请号：JP2011233720
申请日：2011-10-25
Applicant: 日本特殊陶業株式会社
CPC classification number: H01L21/4853 , H01L23/49811 , H01L23/49822 , H05K1/118 , H05K1/119 , H05K3/34 , H01L2224/16225 , H01L2224/17051 , H01L2224/32225 , H01L2224/73204 , H01L2224/81193 , H01L2224/81385 , H01L2224/81444 , H01L2224/81815 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2924/01322 , H01L2924/12042 , H01L2924/1461 , H01L2924/15311 , H05K2201/09545 , Y10T29/49147
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公开(公告)号：JP2014082443A
公开(公告)日：2014-05-08
申请号：JP2013069054
申请日：2013-03-28
Applicant: Hitachi Chemical Co Ltd , 日立化成株式会社
Inventor： YAMAGUCHI HIROSHI , KURIHARA SEIICHI , SAKURAI HIROSHI , KANNA SHUNSUKE
IPC: H05K3/46
CPC classification number: H05K1/116 , H05K1/0216 , H05K1/0218 , H05K1/0251 , H05K1/0298 , H05K1/115 , H05K3/0047 , H05K3/429 , H05K3/4611 , H05K2201/0154 , H05K2201/09509 , H05K2201/09518 , H05K2201/09545 , H05K2201/0959 , H05K2201/09854 , H05K2201/10287 , H05K2203/061 , H05K2203/1572
Abstract: PROBLEM TO BE SOLVED: To provide a multilayer wiring board making it possible to mount a surface mount component having a narrow pitch, while increasing a wiring housing amount and suppressing a warpage amount.SOLUTION: A multilayer wiring board includes: a first metal foil wiring layer having at least two layers of metal foil wiring, arranged on a side of a mounting face for mounting a surface mount component; a wire wiring layer having an insulation coated wire, arranged on an inner layer side of the first metal foil wiring layer; a second metal foil wiring layer arranged on a side opposite to a mounting face for mounting the wire wiring layer; and an inter-layer conduction hole electrically connecting the metal foil wiring on a surface of the first metal foil wiring layer to the metal foil wiring in the inner layer of the first metal foil wiring layer or the insulation coated wire of the wire wiring layer or the second metal foil wiring. A hole diameter of the inter-layer conduction hole varies in a plate-thickness direction of the multilayer wiring board.
Abstract translation: 要解决的问题：提供一种多层布线板，其可以在增加布线容纳量并抑制翘曲量的同时安装具有窄间距的表面安装部件。解决方案：多层布线板包括：第一金属箔布线 层，具有至少两层金属箔布线，布置在用于安装表面安装部件的安装面的一侧; 具有绝缘被覆线的布线层布置在所述第一金属箔布线层的内层侧上; 第二金属箔布线层，布置在与用于安装所述布线层的安装面相对的一侧上; 以及将第一金属箔布线层的表面上的金属箔布线电连接到第一金属箔布线层的内层中的金属箔布线或布线层的绝缘被覆线的层间导电孔，或 第二金属箔布线。 层间导电孔的孔径在多层布线基板的板厚方向上变化。
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公开(公告)号：JP5372726B2
公开(公告)日：2013-12-18
申请号：JP2009290849
申请日：2009-12-22
Applicant: ヴイアイエー・テクノロジーズ・インコーポレイテッド
Inventor： 宮振越
IPC: H05K3/46
CPC classification number: H05K3/4007 , H01L2924/0002 , H05K3/0035 , H05K3/062 , H05K3/108 , H05K3/243 , H05K3/28 , H05K3/421 , H05K2201/0367 , H05K2201/0376 , H05K2201/09436 , H05K2201/09545 , H05K2203/0361 , H05K2203/0554 , H05K2203/0574 , H05K2203/1152 , H05K2203/308 , Y10T29/49117 , Y10T29/49128 , Y10T29/49147 , Y10T29/49155 , H01L2924/00
Abstract: A circuit substrate includes a base layer, a patterned conductive layer, a dielectric layer, an outer pad and a conductive block. The patterned conductive layer is disposed on the base layer and has an inner pad. The dielectric layer is disposed on the base layer and covers the patterned conductive layer. The outer pad is disposed on the dielectric layer. The conductive layer is passed through the dielectric layer and connected between the outer pad and the inner pad, wherein the outer pad and the conductive block are formed as an integrative unit, and an outer diameter of the outer pad is substantially equal to an outer diameter of the conductive block.
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165.发明专利
公开(公告)号：JP2013197201A
公开(公告)日：2013-09-30
申请号：JP2012061029
申请日：2012-03-16
Applicant: Fujitsu Ltd , 富士通株式会社
Inventor： YOSHIMURA HIDEAKI
CPC classification number: H05K1/115 , G01R31/2889 , H05K1/0298 , H05K1/0366 , H05K3/4038 , H05K3/425 , H05K3/445 , H05K3/4608 , H05K2201/0323 , H05K2201/09545 , H05K2201/09554 , H05K2201/0959 , Y10T29/49165
Abstract: PROBLEM TO BE SOLVED: To provide a technique capable of reducing thermal stress generated at a wiring board without the need to separately provide a via for electrically connecting a via for connecting a core and a conductive core base material, in the wiring board having the core base material and a plurality of through-hole vias.SOLUTION: A method for manufacturing the wiring board comprises the steps of: forming an outside through-hole in the core base material; filling the outside through-hole with an insulation resin; forming a first conductive layer on the surface of the insulation resin at a part on which the via for connecting a core is formed; forming a land around the first conductive layer; stacking a wiring layer on the core base material after the step of forming the first conductive layer and the step of forming the land; forming an inside through-hole which has a diameter smaller than that of the outside through-hole and penetrates the core base material and the wiring layer, so as to penetrate the insulation resin; and covering an inner wall surface of the inside through-hole with a first conductive film. The core base material and the first conductive film are electrically connected through the first conductive layer and the land.
Abstract translation: 要解决的问题：提供一种能够减少在布线板处产生的热应力的技术，而不需要单独地提供用于电连接用于连接芯和导电芯基材的通孔的通孔，在具有芯的布线板 基体材料和多个通孔通孔。解决方案：制造布线板的方法包括以下步骤：在芯基材中形成外部通孔; 用绝缘树脂填充外部通孔; 在形成用于连接芯的通孔的部分上形成绝缘树脂的表面上的第一导电层; 形成围绕所述第一导电层的区域; 在形成第一导电层的步骤和形成焊盘的步骤之后，在芯基材上层叠布线层; 形成直径小于外部通孔的直径的内部通孔，并穿过所述芯部基体材料和所述布线层，从而穿过所述绝缘树脂; 并用第一导电膜覆盖内部通孔的内壁表面。 芯基材和第一导电膜通过第一导电层和焊盘电连接。
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Patent Agency Ranking
公开(公告)号：JP2013093404A
公开(公告)日：2013-05-16
申请号：JP2011233720
申请日：2011-10-25
Applicant: Ngk Spark Plug Co Ltd , 日本特殊陶業株式会社
Inventor： INOUE MASAHIRO , SUGIMOTO ATSUHIKO
CPC classification number: H01L21/4853 , H01L23/49811 , H01L23/49822 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/16225 , H01L2224/17051 , H01L2224/32225 , H01L2224/73204 , H01L2224/81193 , H01L2224/81385 , H01L2224/81444 , H01L2224/81815 , H01L2924/01322 , H01L2924/12042 , H01L2924/1461 , H01L2924/15311 , H05K1/118 , H05K1/119 , H05K3/34 , H05K2201/09545 , Y10T29/49147 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
Abstract: PROBLEM TO BE SOLVED: To provide a wiring board which can improve reliability by providing bump electrodes appropriate for connection with a component.SOLUTION: A wiring board 101 of an embodiment has a structure in which a plurality of bump electrodes 11 are arranged on a substrate principal surface 102 in an electrode formation region. At least one of the plurality of bump electrodes 11 is an odd-shaped bump electrode 11 having a depression 13 on a top face 12 and formed such that an outer diameter A1 at a top edge is larger than an outer diameter A2 at a bottom edge and a cross-section shape as a whole is an inverted trapezoid.
Abstract translation: 要解决的问题：提供一种可以通过提供适合于与部件连接的凸块电极来提高可靠性的布线板。 解决方案：实施例的布线板101具有多个凸起电极11布置在电极形成区域中的基板主表面102上的结构。 多个凸起电极11中的至少一个是在顶面12上具有凹陷13的异形凸起电极11，并且形成为使得顶边缘处的外径A1比底边缘处的外径A2大 横截面形状整体上是倒梯形。 版权所有（C）2013，JPO＆INPIT
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公开(公告)号：JP2012235176A
公开(公告)日：2012-11-29
申请号：JP2012196160
申请日：2012-09-06
Inventor： MOK JEE SOO , YOO JE GWANG , RYU CHANG SUP
IPC: H05K3/46
CPC classification number: H05K3/1258 , H01L2224/11 , H05K3/4069 , H05K3/4602 , H05K2201/0394 , H05K2201/09481 , H05K2201/09545 , H05K2201/096 , H05K2203/0568 , H05K2203/1152 , Y10T29/49156
Abstract: PROBLEM TO BE SOLVED: To eliminate the need for a separate PSR process because a deflection of a board is prevented during and after manufacturing of the board and a support prevents the deflection of the board and has a function of a solder resist layer.SOLUTION: In a manufacturing method, a circuit pattern (56) is formed on a double-sided or single-sided copper-clad laminate, a build-up layer (57) is laminated on its top, and then a solder resist layer (58) is formed on an upper surface of the build-up layer (57). Thus, an insulating resin layer (50), having a via hole (54), comprising a first circuit layer including the circuit pattern (56), which is formed on one side, and a second circuit layer including a connecting pad for mounting a solder ball projecting over the via hole (54), which is formed on the other side, the build-up layer (57) including a number of insulating layers and circuit layers formed on the first circuit layer and the solder resist layer (58) formed on the outermost layer of the build-up layer (57) are included.
Abstract translation: 要解决的问题：为了消除对单独的PSR处理的需要，因为在板的制造期间和之后防止了板的偏转，并且支撑件防止板的偏转并且具有阻焊层的功能 。 解决方案：在制造方法中，在双面或单面覆铜层压板上形成电路图案（56），在其顶部层叠积层（57），然后将焊料 抗蚀剂层（58）形成在积层（57）的上表面上。 因此，具有通孔（54）的绝缘树脂层（50）包括形成在一侧的包括电路图案（56）的第一电路层和包括用于安装 在另一侧形成的通孔（54）上的焊球，包括形成在第一电路层和阻焊层（58）上的多个绝缘层和电路层的堆积层（57） 形成在积层层（57）的最外层上。 版权所有（C）2013，JPO＆INPIT
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公开(公告)号：JP4739348B2
公开(公告)日：2011-08-03
申请号：JP2007540420
申请日：2005-11-10
Applicant: ピーピージー インダストリーズ オハイオ, インコーポレイテッド
Inventor： ピーター エレニアス， , ケビン シー． オルソン， , トーマス ダブリュー． グッドマン， , アラン イー． ワン，
CPC classification number: H05K3/002 , H05K1/056 , H05K3/0052 , H05K3/403 , H05K3/44 , H05K3/445 , H05K3/4623 , H05K3/4641 , H05K3/4644 , H05K2201/0166 , H05K2201/0397 , H05K2201/0909 , H05K2201/09181 , H05K2201/0919 , H05K2201/09309 , H05K2201/09536 , H05K2201/09545 , H05K2201/09554 , H05K2201/09645 , H05K2201/09827 , H05K2203/1105 , H05K2203/135
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公开(公告)号：JP2009260204A
公开(公告)日：2009-11-05
申请号：JP2008172357
申请日：2008-07-01
Applicant: Samsung Electro Mech Co Ltd , 三星電機株式会社
Inventor： OH CHANG GUN , HWANG MI SUN , LEE SUK WON
CPC classification number: H05K3/4647 , H05K3/108 , H05K3/423 , H05K3/426 , H05K2201/09536 , H05K2201/09545 , H05K2203/0574 , H05K2203/0733 , Y10T29/49165
Abstract: PROBLEM TO BE SOLVED: To provide a printed circuit board capable of improving interlayer electrical connection by providing a cylindrical via formed from an electroplating layer, and capable of realizing a high-density circuit pattern by forming a line width of a circuit pattern connected to an upper portion of the via to be smaller than the diameter of the via, and to provide a method of manufacturing the same. SOLUTION: A printed circuit board is provided which includes a land (53) formed in a lower portion of an insulating layer, a circuit pattern (63) formed in an upper portion of the insulating layer, and a via (75) connecting the land (53) and the circuit pattern (63). The land (53) is constituted of a seed layer (20) and a first electroplating layer (51) of which one side is connected to the seed layer (20) and the other side is connected to the via (75), and the via (75) is constituted of a second electroplating layer. COPYRIGHT: (C)2010,JPO&INPIT
Abstract translation: 解决的问题：提供一种能够通过提供由电镀层形成的圆柱形通孔来改善层间电连接的印刷电路板，并且能够通过形成电路图案的线宽来实现高密度电路图案 连接到通孔的上部比通孔的直径小，并且提供一种制造该通孔的方法。 解决方案：提供了一种印刷电路板，其包括形成在绝缘层的下部中的平台（53），形成在绝缘层的上部的电路图案（63）和通孔（75） 连接所述焊盘（53）和所述电路图案（63）。 焊盘（53）由种子层（20）和第一电镀层（51）构成，其一面连接到种子层（20），另一侧连接到通孔（75），并且 通孔（75）由第二电镀层构成。 版权所有（C）2010，JPO＆INPIT
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公开(公告)号：JP2009141305A
公开(公告)日：2009-06-25
申请号：JP2008046616
申请日：2008-02-27
Applicant: Samsung Electro Mech Co Ltd , 三星電機株式会社
Inventor： CHO CHUNG-WOO , RYU CHANG SUP , CHO SOON-JIN , KIM SEUNG CHUL
CPC classification number: H05K3/421 , H05K3/108 , H05K3/423 , H05K2201/09545 , H05K2201/09563 , H05K2201/096 , Y10T29/49165
Abstract: PROBLEM TO BE SOLVED: To provide a printed circuit board capable of ensuring a high reliability by expanding a contact area between a pad and a via by making the whole or part of the pad embedded in the via, and also to provide a method of manufacturing the same. SOLUTION: The printed circuit board includes a first insulation layer 20, a first via 22 which penetrates the first insulation layer 20, and a first pad 14 which is formed on one surface of the first insulation layer 20, with the whole or part of the first pad 14 being embedded in the first via 22. COPYRIGHT: (C)2009,JPO&INPIT
Abstract translation: 要解决的问题：提供一种印刷电路板，其能够通过使嵌入在通孔中的整个或一部分焊盘扩大焊盘和通孔之间的接触面积来确保高可靠性，并且还提供 制造方法 解决方案：印刷电路板包括第一绝缘层20，穿过第一绝缘层20的第一通孔22和形成在第一绝缘层20的一个表面上的第一焊盘14，整体或 第一垫14的一部分嵌入在第一通孔22中。版权所有（C）2009，JPO＆INPIT
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