公开(公告)号：KR1020010053689A

公开(公告)日：2001-07-02

申请号：KR1019990054156

申请日：1999-12-01

Applicant: 한국전자통신연구원

Inventor： 김도훈 ,  정해빈 ,  김대용

IPC: H01L21/027

Abstract: PURPOSE: A modified illumination apparatus of a lithography apparatus is provided to form a modified illumination light without energy loss of the illumination light. CONSTITUTION: If a birefringent optical unit(566) is inserted between a light beam enlarger(565) and a zoom lens(567), an incident light(564) is separated into four beams(575), and the four separated beams forms a quadruple modified illumination light(569) on a position of a modified illumination plane located on a Fly's Eye integrator(568). Also, the position of the birefringent optical unit can be located between an illumination light source(563) and the light beam enlarger. The quadruple modified illumination light is reflected by a reflection mirror(570) and is converged to a mask via a condenser lens(571), and can be transferred to a wafer(574) by a transparent optical system(573).

Abstract translation: 目的：提供光刻设备的改进的照明装置，以形成照明光的能量损失的改进的照明光。 构成：如果将双折射光学单元（566）插入在光束放大器（565）和变焦透镜（567）之间，入射光（564）被分成四个光束（575），并且四个分离的光束形成 位于Fly Eye集成器（568）上的改进的照明平面的位置处的四倍修正的照明光（569）。 此外，双折射光学单元的位置可以位于照明光源（563）和光束放大器之间。 四重改型的照明光被反射镜570反射，并通过聚光透镜571会聚到掩模，并可通过透明光学系统（573）传送到晶片574。

公开(公告)号：KR1020010010638A

公开(公告)日：2001-02-15

申请号：KR1019990029627

申请日：1999-07-21

Applicant: 한국전자통신연구원

Inventor： 김충환 ,  김천수 ,  유현규 ,  박민 ,  김대용

IPC: H03F1/32

Abstract: PURPOSE: A differential amplifier circuit for RF signals for improvement of linearity of small signals is provided to improves linearity of the third-order intermodulation signal by using characteristic of an FET. CONSTITUTION: A differential amplifier circuit for RF signals for improvement of linearity of small signals includes a differential amplifier(10) for differential-amplifying an input signal at a normal operation point with an external DC gate voltage, a differential amplifier(20) for generating the third-order intermodulation signal, which non-linearly differential-amplifies the input signal with an external DC gate voltage to generate the third-order intermodulation signal, and an insulator(30) for differently applying the DC gate voltages supplied to the two differential amplifiers for insulation from a DC power supply.

Abstract translation: 目的：提供用于改善小信号线性度的RF信号的差分放大器电路，通过使用FET的特性来提高三阶互调信号的线性度。 构成：用于改善小信号的线性度的RF信号的差分放大器电路包括：差分放大器（10），用于利用外部DC栅极电压在正常工作点差分放大输入信号;差分放大器（20），用于产生 三阶互调信号，其以外部DC栅极电压对输入信号进行非线性差分放大以产生三阶互调信号;以及绝缘体（30），用于不同地施加提供给两个差分的DC栅极电压 用于直流电源绝缘的放大器。

公开(公告)号：KR100275484B1

公开(公告)日：2001-01-15

申请号：KR1019980044520

申请日：1998-10-23

Applicant: 한국전자통신연구원

Inventor： 김종대 ,  김상기 ,  구진근 ,  남기수 ,  김대용

IPC: H01L29/78

Abstract: 본 발명은 비교적 용이한 공정으로 트렌치의 가장자리를 완만하게하며 트렌치 가장자리에 상대적으로 두껍게 산화막을 형성할 수 있어 트렌치 게이트 전극의 가장자리에 전기장이 집중되는 것을 억제하고 전력소자의 항복전압을 증가시키고 누설전류를 감소시킬 수 있는 트렌치형 게이트 전극을 갖는 전력소자 제조 방법에 관한 것으로, 본 발명은 1차 건식식각으로 얕은 트렌치를 형성시키고 습식식각을 실시하여 얕은 트렌치 형성시 사용된 식각마스크의 측벽을 언더컷(under cut) 형태로 완만하게 한 후, 얕은 트렌치의 저면을 2차 건식식각하여 주 트렌치(main trench)를 형성함과 동시에 주 트렌치(main trench)에 인접한 부분에 기생 트렌치(parasitic trench)가 형성되도록 하여 이후의 산화막 형성 공정에서 기생 트렌치 부분에 상대적으로 두꺼운 산화막이 형� �되도록 함으로써 트렌치 가장자리에 인가되는 전기장의 크기를 줄이는데 그 특징이 있다.

公开(公告)号：KR100260818B1

公开(公告)日：2000-07-01

申请号：KR1019970072832

申请日：1997-12-23

Applicant: 한국전자통신연구원

Inventor： 김대용 ,  정도영

IPC: H03C1/00

Abstract: PURPOSE: A digital single chip amplitude modulation/frequency modulation stereo signal generator is provided which synthesizes quadrature phase shift keying carriers without any phase delay using a digital frequency synthesizer and synchronizes signals using a single system clock, thereby accurately modulating signals and improving the stability of tuning. CONSTITUTION: A digital single chip amplitude modulation/frequency modulation stereo signal generator includes an analog processor(10) for processing external sound signals input through left and right channels, and analog-digital converters(20,21,22,23) for digital-sampling analog signals and the external sound signals to generate digital signals. The signal generator further has a digital processor(30) for receiving the output signal of the analog-digital converter to generate a digital frequency modulation stereo composite signals and digital amplitude modulation stereo modulation signals, and a digital-analog converter(40) for converting digital signals into analog signals.

Abstract translation: 目的：提供一种数字单芯片幅度调制/调频立体声信号发生器，它使用数字频率合成器合成正交相移键控载波，无任何相位延迟，并使用单个系统时钟同步信号，从而精确调制信号，提高稳定性 调整。 一种数字单片机幅度调制/调频立体声信号发生器，包括用于处理通过左右声道输入的外部声音信号的模拟处理器（10），以及用于数字信号的模数转换器（20,21,22,23） 采样模拟信号和外部声音信号产生数字信号。 信号发生器还具有数字处理器（30），用于接收模拟数字转换器的输出信号以产生数字频率调制立体声复合信号和数字幅度调制立体声调制信号，以及数模转换器（40），用于转换 数字信号转换为模拟信号。

公开(公告)号：KR1020000033521A

公开(公告)日：2000-06-15

申请号：KR1019980050417

申请日：1998-11-24

Applicant: 한국전자통신연구원

Inventor： 박민 ,  유현규 ,  김천수 ,  김충환 ,  김대용

IPC: H01L27/06

CPC classification number: H01L28/10 ,  H01L27/08

Abstract: PURPOSE: An integrated elements with minimized parasitic capacitance and interference of magnetic field and a method for manufacturing the same is provided to transfer signals through a wiring safely by minimizing the capacitive coupling. CONSTITUTION: A method for manufacturing the integrated elements includes first thru forth steps. In the first step, a plurality of trenches are formed on the board(10a, 10b). In the second step, impurities are injected on the trench wall. In the third step, an oxidation layer(11) is formed by oxidizing the surface of the board(10a, 10b), and an impurity doping layer is formed around the board. In the forth step, a dielectric layer(19) is formed on the structure and the hole of the trench is filled.

Abstract translation: 目的：提供最小的寄生电容和磁场干扰的集成元件及其制造方法，通过最小化电容耦合来安全地传输信号通过布线。 构成：用于制造集成元件的方法包括第一步骤。 在第一步骤中，在板（10a，10b）上形成多个沟槽。 在第二步中，将杂质注入到沟槽壁上。 在第三步骤中，通过氧化板（10a，10b）的表面形成氧化层（11），并且在板周围形成杂质掺杂层。 在第四步骤中，在结构上形成电介质层（19），填充沟槽的孔。

公开(公告)号：KR1020000033210A

公开(公告)日：2000-06-15

申请号：KR1019980049972

申请日：1998-11-20

Applicant: 한국전자통신연구원

Inventor： 신희천 ,  곽명신 ,  김대용

IPC: H01H9/56

Abstract: PURPOSE: A single switch power supply circuit is provided which can open/close the power of a portable electronic apparatus. CONSTITUTION: A single switch power supply circuit turns on/off an electronic apparatus with one switch, by including a switching part(100) which controls power supplied to the electronic apparatus, being connected between power supply terminals; a power open/close part(200) supplying and blocking the power inputted to the electronic apparatus according to the short and opening of the switching part; and a power supply driving controlling part(300) controlling the driving of the power open/close part after transforming the power supplied from the switching part.

Abstract translation: 目的：提供可以打开/关闭便携式电子设备的电源的单个开关电源电路。 构成：单个开关电源电路通过一个开关将电子设备打开/关闭，包括一个开关部分（100），其控制供应给电子设备的电力，连接在电源端子之间; 电源开闭部（200），根据所述开关部的短路和断开供给和阻断输入到所述电子设备的电力; 以及电力驱动控制部（300），其在变换从切换部供给的电力之后，控制电力开闭部的驱动。

公开(公告)号：KR1020000031136A

公开(公告)日：2000-06-05

申请号：KR1019980047011

申请日：1998-11-03

Applicant: 한국전자통신연구원

Inventor： 김대용 ,  남현숙

IPC: H03L7/18

Abstract: PURPOSE: A direct digital frequency synthesizer is provided to improve an operation speed by using a phase accumulator and a phase/amplitude converter. CONSTITUTION: A direct digital frequency synthesizer comprises an input portion, a phase accumulation portion(220), a phase angle output portion, a phase/amplitude conversion portion(250), a code control portion(260), a digital/analog conversion portion(270), and a low pass filter portion(280). The input portion receives a binary frequency control work of n bits. The phase accumulation portion is formed with a carry select adder of a pipeline structure. The phase angle output portion outputs a phase angle according to a carry. The phase/amplitude conversion portion is formed with a CORDIC(Coordinate Rotation Digital Computer). The code control portion processes the code from the phase/amplitude conversion portion. The digital/analog conversion portion converts the value of the phase angle to a quantized staircase. The low pass filter portion removes a high frequency component.

Abstract translation: 目的：提供直接数字频率合成器，通过使用相位累加器和相位/幅度转换器来提高操作速度。 构成：直接数字频率合成器包括输入部分，相位累积部分（220），相位角输出部分，相位/幅度转换部分（250），代码控制部分（260），数字/模拟转换部分 （270）和低通滤波器部分（280）。 输入部分接收n位的二进制频率控制工作。 相位累积部分由流水线结构的进位选择加法器形成。 相位角输出部根据进位输出相位角。 相位/幅度转换部分由CORDIC（坐标旋转数字计算机）形成。 代码控制部分处理来自相位/幅度转换部分的代码。 数字/模拟转换部分将相位角的值转换成量化的阶梯。 低通滤波器部分去除高频分量。

公开(公告)号：KR1020000026816A

公开(公告)日：2000-05-15

申请号：KR1019980044520

申请日：1998-10-23

Applicant: 한국전자통신연구원

Inventor： 김종대 ,  김상기 ,  구진근 ,  남기수 ,  김대용

IPC: H01L29/78

Abstract: PURPOSE: A method for manufacturing a power element having a trench type gate electrode is provided to prevent concentration of an electric field on edges of a trench gate electrode, by forming a thick oxide layer on the edges through making the edges gentle, to increase breakdown voltage of a power element, and to reduce leakage current of the power element. CONSTITUTION: A method for manufacturing a power element having a trench type gate electrode comprises the steps of: forming an insulator layer on a substrate; forming a sensitive film pattern on the insulator layer, and forming a first insulator layer pattern exposing the substrate by etching the insulator layer to make the sensitive film pattern into an etching mask; forming a first trench by etching the substrate; forming a second insulator layer pattern exposing the substrate in wider width than the first insulator layer pattern, by wet-etching side walls of the first insulator layer pattern; eliminating the sensitive film pattern; forming a main trench(27) by dry-etching the substrate of a lower part of the first trench, to make the second insulator layer pattern into an etching mask, and forming a parasitic trench in the substrate neighboring to an entrance of the main trench; removing the second insulator layer pattern; forming a thick gate oxide layer(29) on the parasitic trench, when forming the gate oxide layer on a surface of the main trench by performing a heat oxide process; burying a conductive layer composing a gate electrode in the trench; and forming a source and a drain(33,34) in the substrate neighboring to the trench.

Abstract translation: 目的：提供一种制造具有沟槽型栅电极的功率元件的方法，以通过使边缘平缓地在边缘上形成厚的氧化物层来缓和，从而防止沟槽栅电极边缘上的电场集中，从而增加击穿 功率元件的电压，并且减小功率元件的泄漏电流。 构成：用于制造具有沟槽型栅电极的功率元件的方法包括以下步骤：在衬底上形成绝缘体层; 在所述绝缘体层上形成敏感膜图案，并且通过蚀刻所述绝缘体层形成暴露所述衬底的第一绝缘体层图案，以使所述敏感膜图案成为蚀刻掩模; 通过蚀刻所述衬底形成第一沟槽; 通过湿蚀刻所述第一绝缘体层图案的侧壁形成第二绝缘体层图案，所述第二绝缘体层图案使所述基板暴露于宽于所述第一绝缘体层图案的宽度; 消除敏感的胶片图案; 通过干法蚀刻第一沟槽的下部的衬底来形成主沟槽（27），以使第二绝缘体层图案成为蚀刻掩模，并且在衬底的与主沟槽的入口相邻的方式形成寄生沟槽 ; 去除第二绝缘体层图案; 在所述主沟槽的表面上通过进行热氧化工艺形成所述栅极氧化层时，在所述寄生沟槽上形成厚栅极氧化物层（29） 在沟槽中埋设构成栅电极的导电层; 以及在与所述沟槽相邻的衬底中形成源极和漏极（33,34）。

公开(公告)号：KR1020000021964A

公开(公告)日：2000-04-25

申请号：KR1019980041256

申请日：1998-09-30

Applicant: 한국전자통신연구원

Inventor： 김종대 ,  김상기 ,  이대우 ,  구진근 ,  김대용

IPC: H01L29/772

Abstract: PURPOSE: A method of manufacturing a power device of a trench double diffused metal oxide(TDMOS) semiconductor is provided to increase the breakdown voltage and reduce the leakage current of the power device by forming a thick oxidation layer in the vicinity of the top and bottom of the trench gate. CONSTITUTION: A method of manufacturing a power device of a trench double diffused metal oxide(TDMOS) semiconductor comprises the steps of: forming a trench after etching an oxidation layer, a nitride layer and an oxidation layer on a substrate, and growing a second nitride layer; growing a first thick oxidation layer on the bottom of the trench by using reactive ion etching; growing a second thick oxidation layer after filling up the inside of the trench with a photoresist layer; eliminating the second thick oxidation layer after evaporating a polysilicon layer, and etching a first nitride layer; and forming a side wall space after eliminating the first nitride layer, and forming a metal electrode.

Abstract translation: 目的：提供一种制造沟槽双重扩散金属氧化物（TDMOS）半导体的功率器件的方法，以通过在顶部和底部附近形成厚的氧化层来增加击穿电压并降低功率器件的漏电流 的沟槽门。 构成：制造沟槽双重扩散金属氧化物（TDMOS）半导体的功率器件的方法包括以下步骤：在蚀刻氧化层，氮化物层和氧化层之后，在衬底上形成沟槽，并且生长第二氮化物 层; 通过使用反应离子蚀刻在沟槽的底部生长第一厚氧化层; 在用光致抗蚀剂层填充沟槽内部后生长第二厚氧化层; 在蒸发多晶硅层之后消除第二厚氧化层，并蚀刻第一氮化物层; 以及在消除第一氮化物层之后形成侧壁空间，并形成金属电极。

公开(公告)号：KR1020000018926A

公开(公告)日：2000-04-06

申请号：KR1019980036777

申请日：1998-09-07

Applicant: 한국전자통신연구원

Inventor： 최창억 ,  이종현 ,  장원익 ,  김대용

IPC: H01L29/84

CPC classification number: B81C1/00301 ,  B81B2207/096 ,  H01L21/76838 ,  H01L2224/48465 ,  H01L2924/10253 ,  H01L2924/00

Abstract: PURPOSE: A method of fabricating a micro-vacuum structure for a device operated in vacuum is provided to reduce a step of containing each acceleration sensor in vacuum according to each sensor chip. CONSTITUTION: A method of fabricating a micro-vacuum structure for a device operated in vacuum comprises the steps of totally etching a silicon epitaxial layer of a silicon substrate having the upper silicon epitaxial layer, an interlayer insulating film, and a lower silicon bulk layer to form and seal two electrode structures and a floated vibration structure with a vacuum sealing substrate; and etching from a rear side of the silicon substrate to the interlayer insulating film to form metal electrode after opening the electrode structure.

Abstract translation: 目的：提供一种用于在真空中操作的装置制造微型真空结构的方法，以减少根据每个传感器芯片在真空中容纳每个加速度传感器的步骤。 构成：一种制造用于真空操作的器件的微型真空结构的方法包括以下步骤：将具有上硅外延层，层间绝缘膜和下硅体层的硅衬底的硅外延层全蚀刻到 形成并密封两个电极结构和带有真空密封基板的浮动振动结构; 并从硅衬底的后侧蚀刻到层间绝缘膜，以在打开电极结构之后形成金属电极。