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公开(公告)号:KR1020150080821A
公开(公告)日:2015-07-10
申请号:KR1020140000322
申请日:2014-01-02
Applicant: 삼성전자주식회사
IPC: H01L23/48
CPC classification number: H05K1/111 , H01L23/49816 , H01L23/49838 , H01L24/14 , H01L2224/16225 , H01L2224/16238 , H01L2924/15311 , H05K2201/09227 , H05K2201/094 , H05K2201/10674 , Y02P70/611
Abstract: 본발명의실시예에따른패키지기판은반도체칩이부착되는칩 영역을포함하는패키지기판, 상기칩 영역의상기패키지기판상에제 1 방향으로교대로그리고반복적으로배열되는제 1 리드내지제 3 리드들을포함하되, 상기제 1 리드와상기제 2 리드사이의제 1 이격거리및 상기제 3 리드와상기제 3 리드와상기제 1 방향으로인접한상기제 1 리드사이의제 3 이격거리는동일하고, 상기제 2 리드와상기제 3 리드사이의제 2 이격거리는상기제 1 이격거리및 상기제 3 이격거리보다작다.
Abstract translation: 根据本发明的实施例的封装基板包括:封装基板,其包括用于附接半导体芯片的芯片区域; 以及在芯片区域的封装基板上沿第一方向重复地和交替地布置的第一引线到第三引线。 第一引线和第二引线之间的第一间隔距离与第一引线相邻的第三引线与第三引线之间的第一引线的第三间隔距离相同。 第二引线之间的第二分离距离比第一分离距离和第三分离距离短。
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公开(公告)号:KR1020140007992A
公开(公告)日:2014-01-21
申请号:KR1020120074722
申请日:2012-07-09
Applicant: 삼성전자주식회사
IPC: H01L23/31
CPC classification number: H01L23/3107 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/5386 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012
Abstract: The present invention is to a semiconductor package and a method for forming the same. A package substrate provided by the package and the method includes a hole and a mold layer having no void. Also, solder ball arrangement freedom is increased by removing a part of the mold layer and exposing a lower conduction pattern.
Abstract translation: 本发明涉及一种半导体封装及其形成方法。 由封装提供的封装基板和方法包括孔和没有空隙的模层。 此外,通过去除模具层的一部分并暴露较低的导电图案来增加焊球布置自由度。
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公开(公告)号:KR1020110069681A
公开(公告)日:2011-06-23
申请号:KR1020100052827
申请日:2010-06-04
Applicant: 삼성전자주식회사
IPC: H01L23/00 , H01L21/56 , H01L25/10 , H01L23/045 , H01L23/13
CPC classification number: H01L21/568 , H01L24/73 , H01L24/97 , H01L25/105 , H01L2224/0401 , H01L2224/0557 , H01L2224/05571 , H01L2224/13025 , H01L2224/14181 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/92247 , H01L2224/97 , H01L2225/1023 , H01L2225/1058 , H01L2924/0002 , H01L2924/014 , H01L2924/07802 , H01L2924/15311 , H01L2924/15331 , H01L2924/15787 , H01L2924/181 , H01L2924/18161 , H01L2924/3025 , H01L2924/3511 , H01L23/045 , H01L23/13 , H01L2924/00012 , H01L2224/81 , H01L2924/00 , H01L2224/85 , H01L2924/00014 , H01L2224/05552
Abstract: PURPOSE: Semiconductor packages, a laminate structure thereof, and manufacturing methods thereof are provided to prevent or reduce interference of electric signals transmitted through signal transmission lines by arranging shielding ground interconnections between the signal transmission lines. CONSTITUTION: A lower semiconductor package(105L) includes a lower semiconductor chip(115L) arranged on the upper surface of a lower package substrate(110L). An upper semiconductor package(105U) includes an upper semiconductor chip(115U) arranged on the upper surface of an upper package substrate(110U). An inter-package connector(150a) connects the lower package substrate to the upper package substrate. A lower molding compound(130L) surrounds a chip bump(120). A solder ball(125) is formed on the lower side of the lower package semiconductor substrate.
Abstract translation: 目的:提供半导体封装及其制造方法,通过布置信号传输线之间的屏蔽接地互连来防止或减少通过信号传输线传输的电信号的干扰。 构成:下半导体封装(105L)包括布置在下封装衬底(110L)的上表面上的下半导体芯片(115L)。 上半导体封装(105U)包括布置在上封装衬底(110U)的上表面上的上半导体芯片(115U)。 封装间连接器(150a)将下封装基板连接到上封装基板。 下模塑料(130L)包围芯片凸块(120)。 在下封装半导体衬底的下侧形成焊球(125)。
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公开(公告)号:KR101902996B1
公开(公告)日:2018-10-01
申请号:KR1020120074722
申请日:2012-07-09
Applicant: 삼성전자주식회사
IPC: H01L23/31
CPC classification number: H01L23/3107 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/5386 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012
Abstract: 본발명은반도체패키지및 이의제조방법을제공한다. 이패키지및 방법에서제공되는패키지기판은구멍을포함하여, 보이드없이몰드막을형성할수 있다. 또한몰드막의일부를제거하여하부도전패턴을노출시킴으로써솔더볼배치자유도를증가시킬수 있다.
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公开(公告)号:KR1020160125830A
公开(公告)日:2016-11-01
申请号:KR1020150056843
申请日:2015-04-22
Applicant: 삼성전자주식회사
IPC: H01L21/033 , H01L21/3105
CPC classification number: H01L21/0337 , H01L21/31116 , H01L21/31144 , H01L21/3223 , H01L21/425 , H01L21/426 , H01L27/10855 , H01L27/10888
Abstract: 반도체소자의제조에서, 기판상에마스크막및 제1 박막을형성하고, 상기제1 박막을사진식각공정을통해패터닝하여 1차패턴을형성하고, 상기 1차패턴표면상에실리콘산화막을형성하고, 상기실리콘산화막표면상에실리콘을포함하는물질을코팅하여코팅막패턴을형성하고, 그리고상기 1차패턴, 상기실리콘산화막및 코팅막패턴을포함하는 2차패턴을식각마스크로이용하여상기마스크막을식각하여마스크패턴을형성한다. 상기방법에의하면, 균일한크기를갖는마스크패턴을형성할수 있다.
Abstract translation: 在制造半导体器件的方法中,掩模层和第一层可以顺序形成在衬底上。 可以通过光刻工艺来构图第一层以形成第一图案。 可以在第一图案上形成氧化硅层。 可以在氧化硅层上形成包括硅的涂层图案。 可以使用第二图案作为蚀刻掩模蚀刻掩模层以形成掩模图案,并且第二图案可以包括第一图案,氧化硅层和涂层图案。 掩模图案可以具有均匀的尺寸。
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公开(公告)号:KR101581431B1
公开(公告)日:2015-12-30
申请号:KR1020090083632
申请日:2009-09-04
Applicant: 삼성전자주식회사
IPC: H01L21/301
CPC classification number: H01L21/78 , H01L23/562 , H01L23/585 , H01L2924/0002 , H01L2924/00
Abstract: 가드링을갖는반도체칩이제공된다. 상기반도체칩은메인칩 영역및 상기메인칩 영역을둘러싸는스크라이브레인영역을구비하는반도체기판을구비한다. 상기반도체기판상에절연막이배치되고, 상기스크라이브레인영역내의상기절연막내에가드링이배치된다. 상기가드링은상기메인칩 영역의적어도일 부분을둘러싼다. 상기가드링은상기절연막의취성(brittleness)보다큰 취성을갖는다. 상기반도체칩의제조방법또한제공된다.
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公开(公告)号:KR101423539B1
公开(公告)日:2014-07-25
申请号:KR1020100130786
申请日:2010-12-20
IPC: G03F7/039 , G03F7/016 , H01L21/027
CPC classification number: G03F7/0233 , H01L23/293 , H01L2924/0002 , H01L2924/00
Abstract: (A) 하기 화학식 1의 반복단위를 포함하는 폴리벤조옥사졸 전구체; (B) 감광성 디아조퀴논 화합물; (C) 실란 화합물; (D) 페놀 화합물; 및 (E) 용매를 포함하는 것인 포지티브형 감광성 수지 조성물이 제공된다.
[화학식 1]
상기 식에서, 각 치환기의 정의는 명세서에 정의된 것과 동일하다.-
公开(公告)号:KR1020130111780A
公开(公告)日:2013-10-11
申请号:KR1020120033935
申请日:2012-04-02
Applicant: 삼성전자주식회사
IPC: H01L23/60
CPC classification number: H01L21/4817 , H01L21/50 , H01L23/552 , H01L23/585 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L24/97 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73257 , H01L2224/73265 , H01L2224/85 , H01L2224/97 , H01L2225/0651 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/07802 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/166 , H01L2924/181 , H01L2924/18161 , H01L2924/19107 , H01L2924/3025 , H01L2924/00 , H01L2224/81 , H01L2224/05599 , H01L2924/00012
Abstract: PURPOSE: A silicon device having an EMI shield is provided to improve a shielding effect by using a grounding part electrically connected to the silicon device. CONSTITUTION: A lower semiconductor chip is mounted on a lower substrate. The lower semiconductor package (110L) includes a ground wire. An upper semiconductor package (110U) is laminated on the lower semiconductor package. A package bump electrically connects the upper semiconductor package and the lower semiconductor package. A conductive cover (200) is electrically connected to the ground wire.
Abstract translation: 目的:提供具有EMI屏蔽的硅器件,以通过使用与硅器件电连接的接地部分来提高屏蔽效果。 构成:下半导体芯片安装在下基板上。 下半导体封装(110L)包括接地线。 上半导体封装(110U)层压在下半导体封装上。 封装凸块电连接上半导体封装和下半导体封装。 导电盖(200)电连接到接地线。
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公开(公告)号:KR1020120066924A
公开(公告)日:2012-06-25
申请号:KR1020100128278
申请日:2010-12-15
Applicant: 삼성전자주식회사
IPC: C07C205/35 , C07C205/42 , G03F7/039 , H01L21/027
CPC classification number: C07C205/42 , G03F7/0226 , G03F7/0233 , G03F7/0236 , G03F7/0751 , G03F7/0755 , C07C205/35 , G03F7/0395 , H01L21/0274
Abstract: PURPOSE: An ortho-nitrobenzyl ester compound is provided to restrain the dissolution of non-exposure part, and to provide a positive type photosensitive resin composition with excellent sensitivity, resolution, pattern formation, and removal of residue. CONSTITUTION: An ortho-nitrobenzyl ester compound comprises a compound in chemical formula 1. In chemical formula 1, R^1 and R^2 is respectively and independently C1-20 aliphatic organic group, or a substituted or unsubstituted cycloaliphatic organic group, R^3 and R^4 is respectively and independently single bond, or substituted or unsubstituted divalent C1-20 aliphatic organic group, and Z^1 and Z^2 is respectively and independently a hydroxy group, an amine group, a carboxy group, or an aldehyde group, n1 and n2 is respectively and independently an integer from 0-5, and n1+n2 is an integer from 1-5.
Abstract translation: 目的:提供邻硝基苄酯化合物以抑制非曝光部分的溶解,并提供具有优异的灵敏度,分辨率,图案形成和残留物去除的正型感光性树脂组合物。 构成:邻硝基苄基酯化合物包括化学式1中的化合物。在化学式1中,R 1和R 2分别为C 1-20脂族有机基团或取代或未取代的脂环族有机基团R 1, 3和R 4分别为单键或取代或未取代的二价C 1-20脂族有机基团,Z 1和Z 2分别独立地为羟基,胺基,羧基或 醛基,n1和n2分别为0-5的整数,n1 + n2为1-5的整数。
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公开(公告)号:KR1020120066923A
公开(公告)日:2012-06-25
申请号:KR1020100128277
申请日:2010-12-15
CPC classification number: G03F7/0226 , C07C69/84 , G03F7/0233
Abstract: PURPOSE: A positive type photosensitive composition is provided to improve physical properties and reliability of a membrane, and to boating excellent sensitivity, resolution, pattern formation, removal of residue, high elongation, high tensile strength, and low membrane shrinkage. CONSTITUTION: A phenol compound comprises one selected from a group consisting of a compound in chemical formula 1, a compound in chemical formula 2, and combinations thereof. A positive type photosensitive composition comprises 100.0 parts by weight of polybenzoxazole precursor, 5-100 parts by weight of a photosensitive diazoquinone compound, 1-30 parts by weight of a phenol compound, 0.1-30 parts by weight of a silane compound, and 50-300 parts by weight of a solvent. The polybenzoxazole precursor has the weight average molecular weight of 3,000-300,000.
Abstract translation: 目的:提供一种正型感光组合物,以改善膜的物理性能和可靠性,并且具有优异的灵敏度,分辨率,图案形成,残留物的去除,高伸长率,高拉伸强度和低膜收缩率。 构成:酚化合物包括选自化学式1中的化合物,化学式2中的化合物及其组合的一种酚化合物。 正型感光性组合物包含100.0重量份聚苯并恶唑前体,5-100重量份光敏重氮醌化合物,1-30重量份酚化合物,0.1-30重量份硅烷化合物和50 -300重量份溶剂。 聚苯并恶唑前体的重均分子量为3,000-300,000。
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