-
公开(公告)号:MY120319A
公开(公告)日:2005-10-31
申请号:MYPI9801534
申请日:1998-04-06
Applicant: IBM
Inventor: EDWARDS DAVID LINN , SHERIF RAED A , TOY HILTON T , DROFITZ STEPHEN S JR , CAMMARANO ARMANDO SALVATORE , COFFIN JEFFREY THOMAS , COURTNEY MARK GERARD , ELLSWORTH MICHAEL JOSEPH JR , GOLDMANN LEWIS SIGMUND , IRUVANTI SUSHUMNA , POMPEO FRANK LOUIS , SABLINSKI WILLIAM EDWARD
Abstract: THE PRESENT INVENTION RELATES GENERALLY TO A NEW SCHEME OF PROVIDING A SEAL BAND FOR SEMICONDUCTOR SUBSTRATES AND CHIP CARRIERS. MORE PARTICULARLY, THE INVENTION ENCOMPASSES A STRUCTURE AND A METHOD THAT USES A MULTI-LAYER METALLIC SEAL (23) TO PROVIDE PROTECTION TO CHIPS ON A CHIP CARRIER. THIS MULTI-LAYER METAL SEAL PROVIDES BOTH ENHANCED HERMETICITY LIFETIME AND ENVIRONMENTAL PROTECTION. FOR THE PREFERRED EMBODIMENT THE MULTI-LAYER METALLIC SEAL BAND IS A THREE LAYER, SOLDER SANDWICH STRUCTURE WHICH IS USED TO CREATE A LOW COST, HIGH RELIABILITY, HERMETIC SEAL FOR THE MODULE. THIS SOLDER SANDWICH HAS A HIGH MELTING TEMPERATURE THICK SOLDER INNER CORE (43), AND LOWER MELTING POINT THIN INTERCONNECTING SOLDER LAYERS (41, 45), WHERE THE THIN INTERCONNECTING SOLDER LAYERS MAY HAVE SIMILAR OR DIFFERENT MELTING POINTS. (FIGURE 3)
-
公开(公告)号:PL367099A1
公开(公告)日:2005-02-21
申请号:PL36709902
申请日:2002-07-26
Applicant: IBM
Inventor: ALCOE DAVID JAMES , COFFIN JEFFREY THOMAS , GAYNES MICHAEL ANTHONY , HAMEL HARVEY CHARLES , INTERRANTE MARIO , PETERSON BRENDA LEE , SHANNON MEGAN , SABLINSKI WILLIAM EDWARD , SPRING CHRISTOPHER TODD , STUTZMAN RANDALL JOSEPH , WEISMAN RENEE , ZITZ JEFFREY ALLEN
IPC: H01L23/29 , H01L23/31 , H01L23/552 , H05K9/00
Abstract: Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.
-
公开(公告)号:AU2003273330A8
公开(公告)日:2004-04-08
申请号:AU2003273330
申请日:2003-09-12
Applicant: IBM
Inventor: FARCOOQ MUKTA G , INTERRANTE MARIO , SABLINSKI WILLIAM EDWARD
IPC: B23K1/00 , B23K35/14 , B23K35/26 , B23K101/40 , B23K101/42 , C22C13/00 , H05K3/34 , B23K31/02 , B23K35/12 , B23K35/34
Abstract: A lead free solder hierarchy for use in the second level solder connection of electronic components such as joining an electronic module to a circuit board. An off-eutectic solder concentration of SnCu or SnAg is used for the module side connection. This off-eutectic solder contains sufficient intermetallics to provide the module side connection with a robust second level assembly and rework process. The off-eutectic composition provides an inter-metallic phase structure in the module side fillet during assembly. The inter-metallic phase structure eliminates problems of tilt and collapse during second level assembly and aids in rework by providing a more cohesive joint allowing removal of the columns from the board without simultaneous removal from the module.
-
公开(公告)号:AU2002319480A1
公开(公告)日:2003-02-17
申请号:AU2002319480
申请日:2002-07-26
Applicant: IBM
Inventor: ALCOE DAVID JAMES , WEISMAN RENEE , INTERRANTE MARIO , COFFIN JEFFREY THOMAS , STUTZMAN RANDALL JOSEPH , GAYNES MICHAEL ANTHONY , SPRING CHRISTOPHER TODD , PETERSON BRENDA LEE , SABLINSKI WILLIAM EDWARD , SHANNON MEGAN , HAMEL HARVEY CHARLES , ZITZ JEFFREY ALLEN
IPC: H01L23/29 , H01L23/31 , H01L23/552 , H05K9/00
Abstract: Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.
-
公开(公告)号:SG63843A1
公开(公告)日:1999-03-30
申请号:SG1998000886
申请日:1998-04-28
Applicant: IBM
Inventor: EDWARDS DAVID LINN , CAMMARANO ARMANDO SALVATORE , COFFIN JEFFERY THOMAS , COURTNEY MARK GERARD , DROFITZ STEPHEN S JR , ELLSWORTH MICHAEL JOSEPH JR , GOLDMANN LEWIS SIGMUND , IRUVANTI SUSHUMNA , SABLINSKI WILLIAM EDWARD , SHERIE RAED A , TOY HILTON T , POMPEO FRANK LOUIS
Abstract: A scheme of providing a seal band for semi-conductor substrates and chip carriers encompasses a structure and a method that uses a multi-layer metallic seal (23) to provide protection to chips on a chip carrier. This multi-layer metal seal provides both enhanced hermeticity lifetime and environmental protection. For the preferred embodiment the multi-layer metallic seal band is a three layer, solder sandwich structure which is used to create a low cost, high reliability. hermetic seal for the module. This solder sandwich has a high melting temperature thick solder inner core (43), and lower melting point thin interconnecting solder layers (41.45). where the thin interconnecting solder layers may have similar or different melting points.
-
-
-
-