12.
    发明专利
    未知

    公开(公告)号:DE10232788B4

    公开(公告)日:2010-01-14

    申请号:DE10232788

    申请日:2002-07-18

    Abstract: The device has at least one semiconducting chip, flat conductors, a heat conducting block for a system carrier and a housing of a synthetic material, whereby the chip is mounted on the heat conducting block by its passive rear side. Inner flat conductor ends are arranged in the block region to overlap and the electronic component has an organoceramic insulation, adhesive and heat conducting coating between the ends and the block in the overlap region. The device has at least one semiconducting chip, flat conductors, a heat conducting block for a system carrier and a housing of a synthetic material, whereby the chip is mounted on the heat conducting block by its passive rear side. Inner flat conductor ends are arranged in the block region to overlap and the electronic component has an organoceramic insulation, adhesive and heat conducting coating (6) between the ends and the block in the overlap region. Independent claims are also included for the following: (a) a system carrier (b) a method of manufacturing a system carrier (c) and a method of manufacturing an inventive electronic component with semiconducting chip.

    13.
    发明专利
    未知

    公开(公告)号:DE102009004451A1

    公开(公告)日:2009-08-13

    申请号:DE102009004451

    申请日:2009-01-13

    Abstract: This application relates to a method of manufacturing an electronic device comprising placing a first chip on a carrier; applying an insulating layer over the first chip and the carrier; applying a metal ions containing solution to the insulating layer for producing a first metal layer of a first thickness; and producing a second metal layer of a second thickness on the insulating layer wherein at least one of the first metal layer and the second metal layer comprises at least a portion that is laterally spaced apart from the respective other metal layer.

    14.
    发明专利
    未知

    公开(公告)号:DE102007040149A1

    公开(公告)日:2009-02-19

    申请号:DE102007040149

    申请日:2007-08-24

    Abstract: A method for fabricating a semiconductor chip module and a semiconductor chip package is disclosed. One embodiment provides a first layer, a second layer, and a base layer. The first layer is disposed on the base layer, and the second layer is disposed on the first layer. A plurality of semiconductor chips is applied above the second layer, and the second layer with the applied semiconductor chips is separated from the first layer.

    15.
    发明专利
    未知

    公开(公告)号:DE10042839B4

    公开(公告)日:2009-01-29

    申请号:DE10042839

    申请日:2000-08-30

    Abstract: The chip(s) (12-14) are arranged on a system substrate (2) with metallic track conductors (3). The substrate is located on a metal section (4) forming a heat sink (5). Its outer surface is exposed to the surrounding atmosphere (7). Its inner surface (8) supports the substrate. The inner surface of the metal section is electrically insulated from the tracks of the substrate by a metal oxide bonding layer. An Independent claim is included for the method of manufacture. The heat sink is oxidized, and the substrate is bonded to it. Chips are fixed to the substrate and bonded using wire or ball-grid array technology. The result is encapsulated, leaving the heat sink areas clear.

    20.
    发明专利
    未知

    公开(公告)号:DE10332015A1

    公开(公告)日:2005-03-03

    申请号:DE10332015

    申请日:2003-07-14

    Abstract: An optoelectronic module and a connecting piece for the module with respect to an optical fiber and with respect to a circuit board can have a semiconductor chip in the form of an optical transmitter chip, which has a light-wave-emitting top side and has a rear side contact as a cathode on its rear side. Further semiconductor chips are embedded in a plastics composition with the optical transmitter chip in such a way that a coplanar overall top side is formed from the plastics composition and the active top side.

Patent Agency Ranking