公开(公告)号：DE10355256A1

公开(公告)日：2005-04-14

申请号：DE10355256

申请日：2003-11-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MANTZ ULRICH ,  GENZ OLIVER

IPC: G01N21/21 ,  G01N21/95 ,  G01N21/956 ,  H01L23/544 ,  H01L21/66

Abstract: Method for determining the quality of the surface of a structure mounted on a support has the following steps: irradiation of an area of the structure with electromagnetic radiation with a given orientation; determination of a value of a characteristic parameter of the reflected radiation; comparison of the determined value with an expectation value of the characteristic parameter, whereby the difference between determined and expected values is a measure of the quality of the surface structure. The invention also relates to a corresponding device.

公开(公告)号：DE10304862A1

公开(公告)日：2004-07-22

申请号：DE10304862

申请日：2003-02-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GENZ OLIVER ,  WEGE STEPHAN

IPC: H01L21/311 ,  H01L21/336

Abstract: Preparation of a semiconductor structure in which over a semiconductor region with at least one trench (G), a carbon spacer layer (40) is anisotropically structured for removal of the spacer layer from the trench base, so that side wall spacers (40') remain at the trench walls away from the spacer layer (40).

公开(公告)号：DE10142266A1

公开(公告)日：2003-04-03

申请号：DE10142266

申请日：2001-08-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GRAF WERNER ,  KIESLICH ALBRECHT ,  SACHSE HERMANN ,  GENZ OLIVER

IPC: H01L21/8242 ,  H01L21/3213 ,  H01L21/8234

Abstract: Process for removing polysilicon (8) applied to a substrate (2) comprises completely removing the polysilicon in first regions (7) of an integrated semiconductor arrangement before the surface of the substrate is reached. A mask (11) is applied to the first regions before the polysilicon is completely removed from the second regions. Preferably an insulating layer, more preferably a gate oxide layer, is used as the substrate. The first regions occupy less space than the second regions. The polysilicon is completely removed by dry etching or wet etching. The first and/or second regions are provided with gate stacks.

公开(公告)号：DE102005032737A1

公开(公告)日：2007-01-11

申请号：DE102005032737

申请日：2005-07-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GENZ OLIVER

IPC: C23F4/00

Abstract: An etching medium, for dry etching of a substrate containing polycrystalline silicon and/or other types of silicon, contains a silicon component (1) to form a side-wall passivation layer (22) on the silicon (30). An independent claim is included for a dry etching method for a substrate containing polycrystalline silicon, in which an etching medium (10) as above is used for at least part of the time.

公开(公告)号：DE10355572A1

公开(公告)日：2005-07-07

申请号：DE10355572

申请日：2003-11-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MACHILL STEFAN ,  KOEPE RALF ,  GENZ OLIVER

IPC: H01L21/3105 ,  H01L21/311 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/306

Abstract: To reduce the edge roughness in dry etched structures in the production of semiconductors, the dry etching (a) is followed by the deposition of a dielectric balancing medium (20) with a photolacquer (30) on the surface (10) for a wet or dry isotropic etching stage (b). The deposition can be separate or combined with the isotropic etching.

公开(公告)号：DE10314274B3

公开(公告)日：2004-09-16

申请号：DE10314274

申请日：2003-03-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GRAF WERNER ,  HEINECK LARS ,  GENZ OLIVER ,  STAVREV MOMTCHIL ,  VOGT MIRKO

IPC: H01L21/60 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/283

Abstract: Production of a first contact perforated surface in a storage device having storage cells comprises preparing a semiconductor substrate (1) with an arrangement of gate electrode strips (2) on the semiconductor surface, forming an insulating layer (3) on the semiconductor surface, forming a sacrificial layer on the insulating layer, forming material plugs on the sacrificial layer, producing a glass-like layer (8) exposing sacrificial layer blocks over contact openings between the gate electrode strips, etching the sacrificial material, removing the exposed insulating layer over the contact openings, and filling the contact opening regions with a conducting material (9). The sacrificial layer is formed by depositing a first sacrificial layer on the insulating layer, planarizing and depositing a second sacrificial layer.

公开(公告)号：DE10303096B3

公开(公告)日：2004-08-12

申请号：DE10303096

申请日：2003-01-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STAVREV MOMTCHIL ,  GENZ OLIVER

IPC: H01L21/033 ,  H01L21/308 ,  G03F7/00

Abstract: The manufacturing method has a layer (3) to be structured provided with a structured mask layer (11) having an edge region (RB) with a height which is greater than the central region (MB) by provision of an auxiliary layer above the layer to be structured, formation of a trough in the auxiliary layer, deposition of the mask layer above the auxiliary layer for providing a step in the mask layer, surface polishing of the mask layer until the auxiliary layer is reached and final removal of the autxiliary layer.

公开(公告)号：DE10240099A1

公开(公告)日：2004-03-11

申请号：DE10240099

申请日：2002-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GENZ OLIVER ,  SCHMIDT BARBARA ,  REB ALEXANDER ,  WEGE STEPHAN ,  STEGEMANN MAIK ,  KIRCHHOFF MARKUS ,  STAVREV MOMTCHIL ,  MACHILL STEFAN

IPC: H01L21/027 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8244 ,  H01L21/31

Abstract: Production of a semiconductor structure comprises preparing a semiconductor substrate, providing a lower first, a middle second and an upper third mask layer (5,7,9) on a surface of the substrate, forming a first window (11) in the third mask layer, structuring the second mask layer using the window, structuring the first mask layer using the window, enlarging the window in the third mask layer to form a second window (13), restructuring the second mask layer using the second window, structuring the substrate using the structured third mask layer, restructuring the first mask layer using the second window, and restructuring the substrate using the third mask layer.