公开(公告)号：WO2004025714A3

公开(公告)日：2004-05-13

申请号：PCT/EP0309551

申请日：2003-08-28

Applicant: INFINEON TECHNOLOGIES AG ,  GENZ OLIVER ,  KIRCHHOFF MARKUS ,  MACHILL STEFAN ,  REB ALEXANDER ,  SCHMIDT BARBARA ,  STAVREV MOMTCHIL ,  STEGEMANN MAIK ,  WEGE STEPHAN

Inventor： GENZ OLIVER ,  KIRCHHOFF MARKUS ,  MACHILL STEFAN ,  REB ALEXANDER ,  SCHMIDT BARBARA ,  STAVREV MOMTCHIL ,  STEGEMANN MAIK ,  WEGE STEPHAN

IPC: H01L21/027 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8244

CPC classification number: H01L21/76811 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/3081 ,  H01L21/31144

Abstract: The invention relates to a method for production of a semiconductor structure, comprising the steps: preparation of a semiconductor substrate (1), generation of a lower first, a middle second and an upper third masking layer (5, 7, 9) on a surface of the semiconductor substrate (1), formation of at least one first window (11, 11a-h) in the upper third masking layer (9), structuring the middle second masking layer (7) using the first window (11, 11a-h) in the upper third masking layer (9) for the transfer of the first window (11, 11a-h), structuring the lower first masking layer (5) using the first window (11, 11a-h) in the middle second masking layer (7) for the transfer of the first window (11, 11a-h), enlarging the first window (11, 11a-h) in the upper third masking layer (9) to form a second window (13, 13a-b) in a maskless process step, restructuring the middle second masking layer (7) using the second window (13, 13a-b) in the upper third masking layer (9) for the transfer of the second window (13, 13a-b), structuring the semiconductor substrate (1), using the structured lower third masking layer (5), restructuring the lower first masking layer (5) using the second window (13, 13a-b) in the middle second masking layer (7) and restructuring the semiconductor substrate (1) using the restructured lower third masking layer (5).

Abstract translation: 本发明提供了一种半导体结构制造方法，包括以下步骤：提供半导体衬底（1）; 在所述半导体衬底（1）的表面上提供下第一掩膜层，中间第二掩膜层和上第三掩膜层（5,7,9）; 在所述上部第三掩模层（9）中形成至少第一窗口（11,11a-h）; 使用上部第三掩模层（9）中的第一窗口（11,11a-h）图案化中间第二掩模层（7）以传递第一窗口（11,11a-h）; 使用中间第二掩模层（7）中的第一窗口（11,11a-h）构造下部第一掩模层（5）以传送第一窗口（11,11a-h）; 扩大上部第三掩模层（9）中的第一窗口（11,11a-h）以在无掩模工艺步骤中形成第二窗口（13,13a-b）; 使用上部第三掩模层（9）中的第二窗口（13,13a-b）重构中央第二掩模层（7）以传送第二窗口（13,13a-b）; 使用图案化的下第三掩模层（5）图案化半导体衬底（1）; 使用中间第二掩模层（7）中的第二窗口（13,13a-b）重构下部第一掩模层（5）; 以及使用重构的下第三掩模层（5）重构半导体衬底（1）。

公开(公告)号：DE102005020342A1

公开(公告)日：2006-10-12

申请号：DE102005020342

申请日：2005-05-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WEIN GUENTER ,  LUDWIG CHRISTOPH ,  SCHLEY JAN-MALTE ,  SACHSE JENS-UWE ,  DEPPE JOACHIM ,  ISLER MARK ,  KRAUSE MATHIAS ,  MACHILL STEFAN

IPC: H01L21/8247

Abstract: The surfaces of wordline stacks and intermediate areas of a main substrate surface are covered with an oxynitride liner. Either sidewall spacers of BPSG are formed or a further liner of nitride is deposited and spacers of oxide are formed. These spacers are used in a peripheral area of addressing circuitry to implant doped source/drain regions. The oxynitride reduces the stress between the nitride and the semiconductor material and prevents charge carriers from penetrating out of a memory layer of nitride into the liner.

公开(公告)号：DE50312208D1

公开(公告)日：2010-01-21

申请号：DE50312208

申请日：2003-08-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GENZ OLIVER ,  KIRCHHOFF MARKUS ,  MACHILL STEFAN ,  REB ALEXANDER ,  SCHMIDT BARBARA ,  STAVREV MOMTCHIL ,  STEGEMANN MAIK ,  WEGE STEPHAN

IPC: H01L21/027 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8244

Abstract: Production of a semiconductor structure comprises preparing a semiconductor substrate, providing a lower first, a middle second and an upper third mask layer (5,7,9) on a surface of the substrate, forming a first window (11) in the third mask layer, structuring the second mask layer using the window, structuring the first mask layer using the window, enlarging the window in the third mask layer to form a second window (13), restructuring the second mask layer using the second window, structuring the substrate using the structured third mask layer, restructuring the first mask layer using the second window, and restructuring the substrate using the third mask layer.

公开(公告)号：DE10355572A1

公开(公告)日：2005-07-07

申请号：DE10355572

申请日：2003-11-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MACHILL STEFAN ,  KOEPE RALF ,  GENZ OLIVER

IPC: H01L21/3105 ,  H01L21/311 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/306

Abstract: To reduce the edge roughness in dry etched structures in the production of semiconductors, the dry etching (a) is followed by the deposition of a dielectric balancing medium (20) with a photolacquer (30) on the surface (10) for a wet or dry isotropic etching stage (b). The deposition can be separate or combined with the isotropic etching.

公开(公告)号：DE10240099A1

公开(公告)日：2004-03-11

申请号：DE10240099

申请日：2002-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GENZ OLIVER ,  SCHMIDT BARBARA ,  REB ALEXANDER ,  WEGE STEPHAN ,  STEGEMANN MAIK ,  KIRCHHOFF MARKUS ,  STAVREV MOMTCHIL ,  MACHILL STEFAN

IPC: H01L21/027 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8244 ,  H01L21/31

Abstract: Production of a semiconductor structure comprises preparing a semiconductor substrate, providing a lower first, a middle second and an upper third mask layer (5,7,9) on a surface of the substrate, forming a first window (11) in the third mask layer, structuring the second mask layer using the window, structuring the first mask layer using the window, enlarging the window in the third mask layer to form a second window (13), restructuring the second mask layer using the second window, structuring the substrate using the structured third mask layer, restructuring the first mask layer using the second window, and restructuring the substrate using the third mask layer.