INTERNAL PLASMA GRID FOR SEMICONDUCTOR FABRICATION

    公开(公告)号:SG10201708121VA

    公开(公告)日:2017-11-29

    申请号:SG10201708121V

    申请日:2014-04-04

    Applicant: LAM RES CORP

    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.

    ATOMIC LAYER ETCHING OF TUNGSTEN AND OTHER METALS

    公开(公告)号:SG10201606891SA

    公开(公告)日:2017-03-30

    申请号:SG10201606891S

    申请日:2016-08-18

    Applicant: LAM RES CORP

    Abstract: Provided herein are methods of atomic layer etching (ALE) of metals including tungsten (W) and cobalt (Co). The methods disclosed herein provide precise etch control down to the atomic level, with etching a low as 1 Å to 10 Å per cycle in some embodiments. In some embodiments, directional control is provided without damage to the surface of interest. The methods may include cycles of a modification operation to form a reactive layer, followed by a removal operation to etch only this modified layer. The modification is performed without spontaneously etching the surface of the metal.

    CONTROLLING ION ENERGY WITHIN A PLASMA CHAMBER

    公开(公告)号:SG10201403177UA

    公开(公告)日:2015-01-29

    申请号:SG10201403177U

    申请日:2014-06-12

    Applicant: LAM RES CORP

    Abstract: CONTROLLING ION ENERGY WITHIN A PLASMA Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold. Fig. lA 45

    RESIDUE FREE OXIDE ETCH
    15.
    发明专利

    公开(公告)号:SG10201909284PA

    公开(公告)日:2019-11-28

    申请号:SG10201909284P

    申请日:2016-05-06

    Applicant: LAM RES CORP

    Abstract: RESIDUEFREE OXIDE ETCH OF THE DISCLOSURE A method for selectively etching silicon oxide is provided. A surface reaction phase is provided comprising flowing a surface reaction gas comprising hydrogen, nitrogen and fluorine containing components to form silicon oxide into a compound comprising silicon, hydrogen, nitrogen, and fluorine, forming the surface reaction gas into a plasma, and stopping the flow of the surface reaction gas. The surface is wet treated to remove the compound. Fig. 15

    INTERNAL PLASMA GRID FOR SEMICONDUCTOR FABRICATION

    公开(公告)号:SG10201401112YA

    公开(公告)日:2014-11-27

    申请号:SG10201401112Y

    申请日:2014-03-31

    Applicant: LAM RES CORP

    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.

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