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公开(公告)号:KR20200142088A
公开(公告)日:2020-12-21
申请号:KR20207034799
申请日:2019-04-23
Applicant: LAM RES CORP
Inventor: LILL THORSTEN , FISCHER ANDREAS , BERRY III IVAN L , DRAEGER NERISSA SUE , GOTTSCHO RICHARD A
IPC: H01L21/306 , H01L21/02 , H01L21/311 , H01L21/324
Abstract: 열적에칭반응의에칭은머신러닝모델을사용하여예측된다. 미리결정된열적에칭반응의하나이상의반응경로들의에칭프로세스및 연관된에너지들의화학적특성들이양자역학시뮬레이션을사용하여식별된다. 에칭특성들을나타내는라벨들이미리결정된열적에칭반응의화학적특성들및 연관된에너지들과연관될수도있다. 머신러닝모델은상이한타입들의많은상이한에칭반응들에걸쳐독립변수들로서화학적특성들및 연관된에너지들및 종속변수들로서라벨들을사용하여트레이닝될수 있다. 신규열적에칭반응에대한화학적특성들및 연관된에너지들이머신러닝모델의입력들로서제공될때, 머신러닝모델은출력들로서신규열적에칭반응의에칭특성들을정확하게예측할수 있다.
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公开(公告)号:SG10201502437TA
公开(公告)日:2015-10-29
申请号:SG10201502437T
申请日:2015-03-27
Applicant: LAM RES CORP
Inventor: SHEN MEIHUA , SINGH HARMEET , TAN SAMANTHA S H , MARKS JEFFREY , LILL THORSTEN , JANEK RICHARD P , YANG WENBING , SHARMA PRITHU
Abstract: A method for etching a stack with at least one metal layer in one or more cycles is provided. An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. A reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds.
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公开(公告)号:SG10201406081QA
公开(公告)日:2015-04-29
申请号:SG10201406081Q
申请日:2014-09-25
Applicant: LAM RES CORP
Inventor: GUHA JOYDEEP , REDDY SIRISH K , CHATTOPADHYAY KAUSHIK , MOUNTSIER THOMAS W , EPPLER AARON , LILL THORSTEN , VAHEDI VAHID , SINGH HARMEET
Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.
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公开(公告)号:SG10201603608RA
公开(公告)日:2016-12-29
申请号:SG10201603608R
申请日:2016-05-06
Applicant: LAM RES CORP
Inventor: HSU CHIH-HSUN , SHEN MEIHUA , LILL THORSTEN
Abstract: A method for selectively etching silicon oxide is provided. A surface reaction phase is provided comprising flowing a surface reaction gas comprising hydrogen, nitrogen and fluorine containing components to form silicon oxide into a compound comprising silicon, hydrogen, nitrogen, and fluorine, forming the surface reaction gas into a plasma, and stopping the flow of the surface reaction gas. The surface is wet treated to remove the compound.
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公开(公告)号:SG10201502438RA
公开(公告)日:2015-10-29
申请号:SG10201502438R
申请日:2015-03-27
Applicant: LAM RES CORP
Inventor: TAN SAMANTHA S H , YANG WENBING , SHEN MEIHUA , JANEK RICHARD P , MARKS JEFFREY , SINGH HARMEET , LILL THORSTEN
Abstract: A method for etching a stack with at least one metal layer in one or more cycles is provided. An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. A reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds.
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公开(公告)号:SG10201401254VA
公开(公告)日:2014-11-27
申请号:SG10201401254V
申请日:2014-04-04
Applicant: LAM RES CORP
Inventor: PATERSON ALEX , SINGH HARMEET , MARSH RICHARD A , LILL THORSTEN , VAHEDI VAHID , WU YING , SRIRAMAN SARAVANAPRIYAN
Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.
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公开(公告)号:SG10201603090VA
公开(公告)日:2016-11-29
申请号:SG10201603090V
申请日:2016-04-19
Applicant: LAM RES CORP
Inventor: TAN SAMANTHA , KIM TAESEUNG , YANG WENBING , MARKS JEFFREY , LILL THORSTEN
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8.
公开(公告)号:SG10201600099VA
公开(公告)日:2016-08-30
申请号:SG10201600099V
申请日:2016-01-07
Applicant: LAM RES CORP
Inventor: KANARIK KEREN JACOBS , MARKS JEFFREY , SINGH HARMEET , TAN SAMANTHA , KABANSKY ALEXANDER , YANG WENBING , KIM TAESEUNG , HAUSMANN DENNIS M , LILL THORSTEN
Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
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公开(公告)号:SG10201506242SA
公开(公告)日:2016-03-30
申请号:SG10201506242S
申请日:2015-08-11
Applicant: LAM RES CORP
Inventor: BERRY III IVAN L , LILL THORSTEN , REYNOLDS KENNETH REESE
Abstract: One process used to remove material from a surface is ion etching. In certain cases, ion etching involves delivery of both ions and a reactive gas to a substrate. The disclosed embodiments permit local high pressure delivery of reactive gas to a substrate while maintaining a much lower pressure on portions of the substrate that are outside of the local high pressure delivery area. In many cases, the low pressure is achieved by providing an injection head that confines the high pressure reactant delivery to a small area and vacuums away excess reactants and byproducts as they leave this small area and before they enter the larger substrate processing region. The disclosed injection head may be used to increase throughput while minimizing deleterious collisions between ions and other species present in the substrate processing region. The disclosed injection head may also be used in other types of semiconductor wafer processing.
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公开(公告)号:SG11201907625UA
公开(公告)日:2019-09-27
申请号:SG11201907625U
申请日:2018-02-26
Applicant: LAM RES CORP
Inventor: FISCHER ANDREAS , LILL THORSTEN , JANEK RICHARD
IPC: H01L21/3065 , H01L21/311 , H01L21/3213
Abstract: OO\ O N O N O (12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (43) International Publication Date 30 August 2018 (30.08.2018) WIP0 I PCT onion °nolo loomoiloimoliflom (10) International Publication Number WO 2018/157090 Al (51) International Patent Classification: H01L 21/3065 (2006.01) H01L 21/3213 (2006.01) H01L 21/311 (2006.01) (21) International Application Number: PCT/US2018/019784 (22) International Filing Date: 26 February 2018 (26.02.2018) (25) Filing Language: English (26) Publication Language: English (30) Priority Data: 62/464,360 27 February 2017 (27.02.2017) US 15/615,691 06 June 2017 (06.06.2017) US (71) Applicant: LAM RESEARCH CORPORATION [US/US]; 4650 Cushing Parkway, Fremont, CA 94538 (US). (72) Inventors: FISCHER, Andreas; 4650 Cushing Parkway, Fremont, CA 94538 (US). LILL, Thorsten; 4650 Cush- ing Parkway, Fremont, CA 94538 (US). JANEK, Richard; 4650 Cushing Parkway, Fremont, CA 94538 (US). (74) Agent: LEE, David, F.; Martine Penilla Group, Llp, 710 Lakeway Drive, Suite 200, Sunnyvale, CA 94085 (US). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, (54) Title: CONTROL OF DIRECTIONALITY IN ATOMIC LAYER ETCHING A1 2 0 3 ATOP OF 100nm TEOS FLUORINATION 0-BIAS PLASMA LIGAND EXCHANGE Sn(acac) 2 VAPOR PUMP-OUT PLASMA TREATMENT CHAMBER VAPOR TREATMENT CHAMBER FIG. 3 (57) : A method for performing atomic layer etching (ALE) on a substrate is provided, including the following operations: performing a surface modification operation on a substrate surface, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer, wherein a bias voltage is applied during the surface modification operation, the bias voltage configured to control a depth of the substrate surface that is converted by the surface modification operation; performing a removal operation on the substrate surface, the removal operation configured to remove at least a portion of the modified layer from the substrate surface, wherein removing the portion of the modified layer is effected via a ligand exchange reaction that is configured to volatilize the portion of the modified layer. A plasma treatment can be performed to remove residues from the substrate surface following the removal operation. [Continued on next page] WO 2018/157090 Al I IIIII IIIIIIII II 111111 VIII IIIII VIII IIIII 31100111HOMOVOIS MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Published: — with international search report (Art. 21(3))
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