公开(公告)号：JP2003179925A

公开(公告)日：2003-06-27

申请号：JP2002275956

申请日：2002-09-20

Applicant: ST MICROELECTRONICS SRL

Inventor： BARTOLUCCI VILIM ,  PAU DANILO ,  EMILIANO PICCINELLI

IPC: H04N7/30 ,  G06T9/00 ,  H03M7/30 ,  H04N7/50 ,  H04N19/94

Abstract: PROBLEM TO BE SOLVED: To provide a method for compressing a signal at a higher level compression while maintaining the same quality level and main features of MPEG2 standards. SOLUTION: The process for compressing a digital video signal comprises the steps of starting a frame for constituting the digital video signal from a microblock for receiving movement compensations (13, 14), dividing the frame into the blocks, assembling the set of the coefficient generated by using a discrete cosine transfer (15) so as to generate each set of the coefficients in each block, constituting them to the set of the vectors by masking (M 1 , M 2 , M 3 and M 4 ), detecting the dispersion of the vector, digitizing the vector for usable multiple bits by a pyramid vector digitizer (22), linking the vector to individual digitized pyramids having decided size in response to the number of usable bits, and encoding the digitized vector by corresponding code word. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2003174144A

公开(公告)日：2003-06-20

申请号：JP2002353352

申请日：2002-12-05

Applicant: ST MICROELECTRONICS SRL ,  OVONYX INC

Inventor： BEZ ROBERTO ,  PELLIZZER FABIO ,  RIVA CATERINA ,  ZONCA ROMINA

IPC: H01L27/10 ,  G11C16/02 ,  H01L27/105 ,  H01L27/24 ,  H01L45/00

Abstract: PROBLEM TO BE SOLVED: To provide a high performance phase change memory cell of the minute contact structure. SOLUTION: The contact structure comprises a first conductive area having a first thin film portion of a first sublithographic size in a first direction, and a second conductive area having a second thin film portion of a second sublithographic size in a second direction crossing the first direction. The first and second thin film portions are electrically in contact with each other to form a contact surface including the sublithographic extending area. The thin film portions are formed with a deposition method in place of the lithography method. The first thin film portion is deposited to the wall of an aperture within a first dielectric material layer. The second thin film portion may be formed by depositing a sacrifice area to the perpendicular wall of a first limit layer, depositing a second limit layer to the side surface where the sacrifice area is not deposited, removing thereafter the sacrifice area, forming a sublithographic aperture for etching the mold aperture in the mold layer, and then filling the mold aperture. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2002319293A

公开(公告)日：2002-10-31

申请号：JP2002107937

申请日：2002-04-10

Applicant: ST MICROELECTRONICS SRL

Inventor： GREGORI STEFANO ,  MICHELONI RINO ,  PIERIN ANDREA ,  KHOURI OSAMA ,  TORELLI GUIDO

IPC: G11C16/02 ,  G11C11/56 ,  G11C16/12

Abstract: PROBLEM TO BE SOLVED: To realize a method for speedily and highly precisely programming a memory cell. SOLUTION: In the method for programming a non-volatile memory cell 1, at least first and second programming pulse trains F1, F2 having pulse width increasing in stages are applied continuously to a control terminal 2 of the memory cell 1, but amplitude increment between a pulse in the first programming train F1 and the next one is made larger than the amplitude increment between a pulse in the second programming train F2 and the next one. Advantageously, third programming pulse trains F0, F3, having pulse width which increases in stages, are applied to the control terminal 2 of the memory cell 1 before the first programming pulse train F1, but amplitude increment between a pulse and the next one is made smaller than the amplitude increment in the first programming train F1, and is substantially equal to the amplitude increment in the second programming train F2 or larger than the amplitude increment in the first programming train F1.

公开(公告)号：JP2002260395A

公开(公告)日：2002-09-13

申请号：JP2002006591

申请日：2002-01-15

Applicant: ST MICROELECTRONICS SRL

Inventor： CAMPARDO GIOVANNI ,  MICHELONI RINO

IPC: G11C16/06 ,  G11C7/06 ,  G11C11/56 ,  G11C16/02 ,  G11C16/26

Abstract: PROBLEM TO BE SOLVED: To provide a method and a circuit which is operated appropriately only when a cell current exists though it is minute and which reads out a multi- level memory cell. SOLUTION: A method for reading out a memory cell is based on time integration of current supplied to a memory cell by a capacitive element. The capacitive element is charged first, after that, linear-discharged within a time previously set. During this period, the memory cell is in a biased state by a fixed voltage. In a first operation mode, a first capacitor (22) and a second capacitor (23) are charged respectively to a first charge value and a second charge value first. The second capacitor is discharged with a fixed current within a time previously decided through the memory cell. The first charge value is divided by the first capacitor and the second capacitor, after that, divided electric charges are measured.

公开(公告)号：JP2002186282A

公开(公告)日：2002-06-28

申请号：JP2001311377

申请日：2001-10-09

Applicant: ST MICROELECTRONICS SRL

Inventor： BRAMBILLA MASSIMILIANO ,  NESSI MAURIZIO

IPC: G11B21/08 ,  G11B21/10 ,  H02P25/06 ,  H03F3/187 ,  H03F3/30 ,  H02P7/00 ,  G11B21/02

Abstract: PROBLEM TO BE SOLVED: To provide a drive circuit for voice coil motor that ensures high accuracy in the position of a read/write head in track following mode. SOLUTION: A control circuit is provided with a first and a second class AB amplifiers. The outputs of the class AB amplifiers are connected with a terminal of a first resistor in series with a voice coil motor so that current will be passed through the voice coil motor and the first resistor. The circuit is provided with a sense amplifier the input terminal of which is coupled with the terminal of the first resistor; and a device at the input of which there is a signal equivalent to the sum of an external signal and an output signal of the sense amplifier. The control circuit drives the first amplifier and the second amplifier in a phase inverted by an output signal generated by the above device. A second resistor is placed in series with the first resistor so that the above current will be passed through the first and the second resistors in series. The sense amplifier is provided with a means for including an input terminal coupled with the terminals of the resistors in series.

公开(公告)号：JP2002027682A

公开(公告)日：2002-01-25

申请号：JP2000382392

申请日：2000-12-15

Applicant: ST MICROELECTRONICS SRL

Inventor： MAGGIONI GIAMPIETRO ,  GALLINARI MAURIZIO ,  SERRATONI CLAUDIO ,  MORELLI MARCO

IPC: H02J7/16 ,  B60R16/02 ,  B60R16/03 ,  H02J7/14 ,  H02J7/24 ,  H02P9/04 ,  H02P9/14 ,  H02P9/30

Abstract: PROBLEM TO BE SOLVED: To provide a loop-type voltage regulating device for regulating the voltage, especially of an automatic electrical system. SOLUTION: This device is of such a type, that it includes at least one heat engine (15), a voltage regulator (13), and a synchronous generator (11) capable of operating to provide the regulated voltage signal (A+) of the system and to receive a regulation signal (DF) from the voltage regulator (13), for a loop- type voltage regulating device for regulation of the voltage, especially of an automatic electrical system. This voltage regulating device advantageously includes further a control unit (14) within a regulation loop, and the unit is connected between the heat engine (15) and the voltage regulator (13), and also it is applied to supply the latter (the voltage regulator) with a signal related to engine operation.

公开(公告)号：JP2002009070A

公开(公告)日：2002-01-11

申请号：JP2001125728

申请日：2001-04-24

Applicant: ST MICROELECTRONICS SRL

Inventor： VULPIO MICHELE

IPC: C23C16/42 ,  C23C16/30 ,  H01L21/312 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To provide a method for depositing a low dielectric constant film on a semiconductor by CVD. SOLUTION: A low dielectric constant film is deposited on the surface of a substrate of semiconductor material by CVD(chemical vapor deposition) providing use a wide range of precursor monomer compounds known as organosilane.

公开(公告)号：JP2001291707A

公开(公告)日：2001-10-19

申请号：JP2001055064

申请日：2001-02-28

Applicant: ST MICROELECTRONICS SRL

Inventor： VULPIO MICHELE

IPC: C23C16/511 ,  C23C16/40 ,  C23C16/452 ,  H01L21/31 ,  H01L21/316

Abstract: PROBLEM TO BE SOLVED: To provide a method of applying an SACVD method of stopping up a gap well, giving adhesion, and improving a deposition reactor more in throughput than an current system. SOLUTION: A method of applying an SAVCD method to a semiconductor integrated circuit manufacturing process and a reactor related to the method are as follows. This method includes a process of introducing a reactive gas into a deposition reactor (1) and depositing a dielectric material layer. It is advantageous that remote plasma of oxygen (O2) as a reactive gas exposed to microwaves in a gas feed pipe (3) is used in the reactor (1) to generate free radicals of gas enough in amount to induce a deposition reaction.

公开(公告)号：JP2001285027A

公开(公告)日：2001-10-12

申请号：JP2001040561

申请日：2001-02-16

Applicant: ST MICROELECTRONICS SRL

Inventor： PISATI VALERIO ,  PORTALURI SALVATORE ,  CAZZANIGA MARCO ,  CASTELLO RINALDO

IPC: H03F1/42 ,  H03H11/04

Abstract: PROBLEM TO BE SOLVED: To obtain a feedforward type circuit structure, having programmable zero which composes a time-continual filter, a delaychain, etc. SOLUTION: A couple of amplification cells (14, 15) are connected to each other at a node A and connected between a 1st signal (Vin) input IN of a 1st cell 14 and an output terminal U of a 2nd cell 15, and each cell is equipped with a couple of transistors (10, 2; 6, 7) which have a common conduction terminal and other conduction terminals coupled with a 1st voltage reference Vcc through respective bias members. Furthermore, a node X of the 1st cell 14 is connected to the output terminal U and a transistor 8 has a control terminal connected to a node X of the 1st cell 14, a 1st conduction terminal connected to an output terminal U, and a 2nd conduction terminal coupled with a 2nd voltage reference GND through a capacitor Cc. The transistor 8 is equipped with a circuit leg 13.

公开(公告)号：JP2001249161A

公开(公告)日：2001-09-14

申请号：JP2001010262

申请日：2001-01-18

Applicant: ST MICROELECTRONICS SRL

Inventor： DALLAVALLE CARLO

IPC: G01R31/26 ,  G01R31/28 ,  G01R31/30 ,  H01L21/66 ,  H01L21/822 ,  H01L27/04

Abstract: PROBLEM TO BE SOLVED: To improve discrimination between normality and defect of a device, and heighten yield. SOLUTION: This test method comprises a process for forming first and second measuring transistors of n-channel and p-channel in each integrated circuit, a process for biasing the measuring transistors in a breaking region, a process for measuring sub-threshold currents of the measuring transistors, a process for calculating sub-threshold currents per unit channel area relative to the n-channel transistor and the p-channel transistor from the sub-threshold currents and channel areas of the measuring transistors, a process for obtaining the total channel area of the n-channel transistor and the p-channel transistor in the breaking state when the integrated circuits are in the steady state and in the idling state, a process for calculating the products between the total channel area and the sub-threshold currents per unit channel area, a process for calculating an absorption current by the integrated circuits in the steady state and in the idling state by adding the products and a process for obtaining a threshold current by adding an increase portion of a current prescribed beforehand to the absorption current.