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    Method of manufacturing a printed circuit assembly
    191.
    发明授权
    Method of manufacturing a printed circuit assembly 失效
    制造印刷电路组件的方法

    公开(公告)号：US5839188A

    公开(公告)日：1998-11-24

    申请号：US583645

    申请日：1996-01-05

    Applicant: Richard J. Pommer

    Inventor： Richard J. Pommer

    IPC: H05K1/14 ,  H05K3/30 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H05K3/46

    CPC classification number: H05K3/462 ,  H05K1/141 ,  H01L2224/83138 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/09701 ,  H05K2201/0195 ,  H05K2201/10378 ,  H05K2201/10666 ,  H05K2201/10977 ,  H05K2203/063 ,  H05K2203/1189 ,  H05K3/305 ,  H05K3/3436 ,  H05K3/368 ,  H05K3/4069 ,  H05K3/4623 ,  H05K3/4647 ,  Y10T29/49117 ,  Y10T29/49126

    Abstract: A printed circuit assembly and method of making the same utilize in one embodiment an adhesive layer including a plurality of non-conductive "gauge particles" disposed within a non-conductive adhesive. When the adhesive layer is disposed between opposing printed circuit layers (be they insulating substrates, conductive layers, or other layers), individual gauge particles are interposed or sandwiched at various points between the layers such that the diameters of the particles control the layer separation throughout overlapping areas of thereof, thereby permitting careful control over layer separation. A printed circuit assembly and method of making the same utilize in another embodiment an interlayer interconnecting technology incorporating conductive posts that are deposited on one of a pair of contact pads formed on opposing printed circuit boards and thereafter bonded to the other in the pair of contact pads during lamination. Fusible material may be utilized in the conductive posts to facilitate mechanical bonding to a contact pad, and the posts project through a dielectric layer disposed between the printed circuit boards, thereby forming the electrical connections between the boards at discrete locations.

    Abstract translation: 印刷电路组件及其制造方法在一个实施例中用于设置在非导电粘合剂内的多个非导电“规格颗粒”的粘合剂层。 当粘合剂层设置在相对的印刷电路层（绝缘基板，导电层或其他层）之间时，各个规格颗粒被插入或夹在层之间的各个点处，使得颗粒的直径控制层间分离 其重叠区域，从而允许对层分离的仔细控制。 一种印刷电路组件及其在另一实施例中的应用方法，其中包括导电柱的层间互连技术，所述导电柱沉积在形成在相对的印刷电路板上的一对接触焊盘中的一个上，然后在所述一对接触焊盘 在层压期间。 在导电柱中可以使用可熔材料，以便于与接触垫的机械接合，并且柱突出穿过布置在印刷电路板之间的电介质层，从而在离散位置处形成电路板之间的电连接。

    Method of making multi-layer circuit
    196.
    发明授权
    Method of making multi-layer circuit 失效
    制作多层电路的方法

    公开(公告)号：US5640761A

    公开(公告)日：1997-06-24

    申请号：US478420

    申请日：1995-06-07

    Applicant: Thomas H. DiStefano ,  Igor Y. Khandros ,  Gary W. Grube

    Inventor： Thomas H. DiStefano ,  Igor Y. Khandros ,  Gary W. Grube

    IPC: H01L21/48 ,  H01L23/538 ,  H05K1/00 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H05K3/36

    CPC classification number: H05K3/462 ,  H01L21/4857 ,  H01L23/5383 ,  H01L23/5385 ,  H01R12/523 ,  H05K1/0287 ,  H05K1/029 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0298 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2201/09945 ,  H05K2201/10378 ,  H05K2201/10666 ,  H05K2203/175 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4623 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: Multilayer circuit assemblies are made by stacking circuit panels having contacts on their top surfaces, through conductors extending between top and bottom surfaces and terminals connected to the bottom end of each through conductor. The terminals and contacts are arranged so that when the panels are stacked the terminals on the bottom of one panel are in alignment with the contacts on the top surface of the immediately underlying panel. The panels are selectively treated on their top and/or bottom surfaces so as to selectively disconnect or connect each contact to a terminal on the bottom surface of the same panel. For example, the top surface of the panel may be selectively etched to disconnect a contact from one through conductor and hence from the associated terminal. The aligned terminals and contacts are nonselectively connected to one another at each interface so that wherever a terminal and contact on adjacent panels are aligned with one another there are connected to one another. This forms composite vertical conductors extending through a plurality of the panels. The selective treatment of the panel top and bottom surfaces provides selective interruptions in the vertical conductors. A circuit panel precursor having the through conductors and methods of making the same are also provided.

    Abstract translation: 多层电路组件通过在其顶表面上具有接触的电路板堆叠，通过在顶表面和底表面之间延伸的导体以及连接到每个贯通导体的底端的端子而制成。 端子和触点被布置成使得当面板堆叠时，一个面板的底部上的端子与紧邻的底板的顶表面上的触点对准。 在其顶表面和/或底表面上选择性地处理这些面板，以便选择性地将每个接触件断开或连接到同一面板的底表面上的端子。 例如，可以选择性地蚀刻面板的顶表面以将接触从一个导体断开，并因此从相关联的端子断开。 对准的端子和触点在每个接口处彼此非选择性地连接，使得相邻面板上的端子和触点彼此对准的位置彼此连接。 这形成延伸穿过多个面板的复合垂直导体。 面板顶部和底部表面的选择性处理在垂直导体中提供选择性的中断。 还提供了具有贯通导体的电路板前体及其制造方法。

    Multi-layer circuit construction methods and structures with customization features and components for use therein
    197.
    发明授权
    Multi-layer circuit construction methods and structures with customization features and components for use therein 失效
    多层电路构造方法和结构，具有用于其中的定制特征和组件

    公开(公告)号：US5583321A

    公开(公告)日：1996-12-10

    申请号：US443706

    申请日：1995-05-15

    Applicant: Thomas H. DiStefano ,  Igor Y. Khandros ,  Gary W. Grube

    Inventor： Thomas H. DiStefano ,  Igor Y. Khandros ,  Gary W. Grube

    IPC: H01L21/48 ,  H01L23/538 ,  H05K1/00 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H05K1/02

    CPC classification number: H05K3/462 ,  H01L21/4857 ,  H01L23/5383 ,  H01L23/5385 ,  H01R12/523 ,  H05K1/0287 ,  H05K1/029 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0298 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2201/09945 ,  H05K2201/10378 ,  H05K2201/10666 ,  H05K2203/175 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4623 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: Multilayer circuit assemblies are made by stacking circuit panels having contacts on their top surfaces, through conductors extending between top and bottom surfaces and terminals connected to the bottomend of each through conductor. The terminals and contacts are arranged so that when the panels are stacked the terminals on the bottom of one panel are in alignment with the contacts on the top surface of the immediately underlying panel. The panels are selectively treated on their top and/or bottom surfaces so as to selectively disconnect or connect each contact to a terminal on the bottom surface of the same panel. For example, the top surface of the panel may be selectively etched to disconnect a contact from one through conductor and hence from the associated terminal. The aligned terminals and contacts are nonselectively connected to one another at each interface so that wherever a terminal and contact on adjacent panels are aligned with one another there are connected to one another. This forms composite vertical conductors extending through a plurality of the panels. The selective treatment of the panel top and bottom surfaces provides selective interruptions in the vertical conductors. A circuit panel precursor having the through conductors and methods of making the same are also provided.

    Abstract translation: 多层电路组件通过在其顶表面上堆叠具有触点的电路板，通过在顶表面和底表面之间延伸的导体以及连接到每个贯通导体的底端的端子而形成。 端子和触点被布置成使得当面板堆叠时，一个面板的底部上的端子与紧邻的底板的顶表面上的触点对准。 在其顶表面和/或底表面上选择性地处理这些面板，以便选择性地将每个接触件断开或连接到同一面板的底表面上的端子。 例如，可以选择性地蚀刻面板的顶表面以将接触从一个导体断开，并因此从相关联的端子断开。 对准的端子和触点在每个接口处彼此非选择性地连接，使得相邻面板上的端子和触点彼此对准的位置彼此连接。 这形成延伸穿过多个面板的复合垂直导体。 面板顶部和底部表面的选择性处理在垂直导体中提供选择性的中断。 还提供了具有贯通导体的电路板前体及其制造方法。

    Multi-Layer circuit construction method and structure
    198.
    发明授权
    Multi-Layer circuit construction method and structure 失效
    多层电路构造方法与结构

    公开(公告)号：US5570504A

    公开(公告)日：1996-11-05

    申请号：US393165

    申请日：1995-02-21

    Applicant: Thomas H. DiStefano ,  Igor Y. Khandros ,  Gary W. Grube

    Inventor： Thomas H. DiStefano ,  Igor Y. Khandros ,  Gary W. Grube

    IPC: H01L21/48 ,  H01L23/538 ,  H05K1/00 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H05K3/36

    CPC classification number: H05K3/462 ,  H01L21/4857 ,  H01L23/5383 ,  H01L23/5385 ,  H01R12/523 ,  H05K1/0287 ,  H05K1/029 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0298 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2201/09945 ,  H05K2201/10378 ,  H05K2201/10666 ,  H05K2203/175 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4623 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: Multilayer circuit assemblies are made by stacking circuit panels having contacts on their top surfaces, through conductors extending between top and bottom surfaces and terminals connected to the bottomend of each through conductor. The terminals and contacts are arranged so that when the panels are stacked the terminals on the bottom of one panel are in alignment with the contacts on the top surface of the immediately underlying panel. The panels are selectively treated on their top and/or bottom surfaces so as to selectively disconnect or connect each contact to a terminal on the bottom surface of the same panel. For example, the top surface of the panel may be selectively etched to disconnect a contact from one through conductor and hence from the associated terminal. The aligned terminals and contacts are nonselectively connected to one another at each interface so that wherever a terminal and contact on adjacent panels are aligned with one another there are connected to one another. This forms composite vertical conductors extending through a plurality of the panels. The selective treatment of the panel top and bottom surfaces provides selective interruptions in the vertical conductors. A circuit panel precursor having the through conductors and methods of making the same are also provided.

    Abstract translation: 多层电路组件通过在其顶表面上堆叠具有触点的电路板，通过在顶表面和底表面之间延伸的导体以及连接到每个贯通导体的底端的端子而形成。 端子和触点被布置成使得当面板堆叠时，一个面板的底部上的端子与紧邻的底板的顶表面上的触点对准。 在其顶表面和/或底表面上选择性地处理这些面板，以便选择性地将每个接触件断开或连接到同一面板的底表面上的端子。 例如，可以选择性地蚀刻面板的顶表面以将接触从一个导体断开，并因此从相关联的端子断开。 对准的端子和触点在每个接口处彼此非选择性地连接，使得相邻面板上的端子和触点彼此对准的位置彼此连接。 这形成延伸穿过多个面板的复合垂直导体。 面板顶部和底部表面的选择性处理在垂直导体中提供选择性的中断。 还提供了具有贯通导体的电路板前体及其制造方法。

    Electrical connections with shaped contacts
    199.
    发明授权
    Electrical connections with shaped contacts 失效
    与成型触点的电气连接

    公开(公告)号：US5354205A

    公开(公告)日：1994-10-11

    申请号：US51598

    申请日：1993-04-23

    Applicant: Haim Feigenbaum ,  William R. Crumly ,  Christopher M. Schreiber

    Inventor： Haim Feigenbaum ,  William R. Crumly ,  Christopher M. Schreiber

    IPC: G01R1/073 ,  G01R31/02 ,  H01H1/14 ,  H01L21/66 ,  H01R12/00 ,  H05K1/11 ,  H05K3/20 ,  H05K3/32 ,  H05K3/36 ,  H05K3/40 ,  H01R9/09

    CPC classification number: G01R1/073 ,  H05K3/205 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/10666 ,  H05K2203/0113 ,  H05K2203/0152 ,  H05K2203/0726 ,  H05K2203/167 ,  H05K3/365 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158

    Abstract: Shaped contacts (40,42) for interconnecting circuits or for use in an integrated circuit test probe are electroplated as integral parts of circuit traces (34) upon a stainless steel mandrel (10). A shaped, hardened steel indentation tool (16,18,26,28) makes indentations (24a,24b) of predetermined shape in the surface of the mandrel (10), which is provided with a pattern of dielectric, such as Teflon (12), or photoresist. Areas of the steel mandrel, including the indentations (24a,24b), are electroplated with a pattern of conductive material (34,36,38), and a dielectric substrate (32) is laminated to the conductive material. The circuit features formed by the indentations define raised contacts of a conical (18) or pyramidal (28) shape, having free ends with a small area that allows higher pressures to be applied to a surface against which the contacts are pressed. This enables the contacts to penetrate foreign materials, such as oxides, that may form on the surface of the pads (56,58), to which the contacts are to be connected to ensure a good contact without any need for wiping action. The projecting contacts can also be pressed into plated holes (82,84) in a substrate, such as a printed wiring board, to which mateable/demateable electrical connection is to be made.

    Abstract translation: 用于互连电路或用于集成电路测试探针的成形触头（40,42）作为电路迹线（34）作为不锈钢芯棒（10）的一部分进行电镀。 成型的硬化钢压痕工具（16,18,26,28）在心轴（10）的表面中形成具有预定形状的凹部（24a，24b），其设置有电介质图案，例如特氟隆（12） ）或光致抗蚀剂。 包括凹陷（24a，24b）的钢心轴的区域用导电材料（34,36,38）的图案电镀，并且电介质基底（32）层压到导电材料上。 由凹口形成的电路特征限定了锥形（18）或金字塔形（28）形状的凸起接触，其具有小的面积的自由端，允许更高的压力施加到触点抵靠的表面。 这使得触点能够渗透可能形成在焊盘（56,58）的表面上的诸如氧化物的异物，触点将被连接到其上，以确保良好的接触而不需要擦拭动作。 突出的触点也可以被压入到将要制造可配对/可分离的电连接的基板（例如印刷电路板）中的电镀孔（82,84）中。

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