公开(公告)号：JPH10160954A

公开(公告)日：1998-06-19

申请号：JP25327297

申请日：1997-09-18

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： TEI SHOJUTSU ,  SO SEKIKO

IPC: G02B6/30 ,  G02B6/10 ,  G02B6/12 ,  G02B6/122 ,  G02B6/34 ,  G02F1/365

Abstract: PROBLEM TO BE SOLVED: To design a structure having coupling efficiency of an optical bistable characteristic by constituting with a linear optical waveguide having a refractive index larger than the refractive index of a nonlinear optical waveguide and containing an optical waveguide grating patterned on the linear optical waveguide when power of incident light is smaller than a prescribed critical value. SOLUTION: When the incident light having the power smaller than the critical power is made incident on the area of the linear optical waveguide 13 of a nonlinear optical waveguide grating structure, since the linear refractive index of the nonlinear optical waveguide 12 is smaller than the refractive index of the linear optical waveguide 13, the incident light is restricted in the inside of the linear optical waveguide 13. Waveguided light restricted in the inside of the linear optical waveguide 13 is diffracted by a grating structure 14 to be discharged from a substrate side to the outside. On the other hand, when the power of the incident light is larger than the critical power, the refractive index of the nonlinear optical waveguide 12 becomes larger than the refractive index of the linear optical waveguide 13 by the nonlinearity of the nonlinear optical waveguide 12. Thus, the dower of the incident light is transmitted to the area of the nonlinear optical waveguide 12, and advances along a path of a nonlinear thin film.

公开(公告)号：JPH10144971A

公开(公告)日：1998-05-29

申请号：JP18850997

申请日：1997-07-14

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： JO SEIDAI ,  SEI KENYO

IPC: C30B29/22 ,  H01L21/3205 ,  H01L39/00 ,  H01L39/14 ,  H01L39/22 ,  H01L39/24

Abstract: PROBLEM TO BE SOLVED: To dissolve elastic stresses by depositing an amorphous insulating film gate to the top of a grain boundary channel, and depositing metallic electrodes to each top of the source of a superconducting film, the drain of a superconducting film, and the gate of an amorphous insulating film. SOLUTION: A high-temperature superconducting film is deposited onto a twin-crystal substrate 1, and a grain-boundary channel 5 is made at the grain boundary of the twin-crystal substrate 1. A superconducting film source 3 and a superconducting film drain 4 are made on both sides of this grain boundary channel 5. Then, an insulating film gate 6A is made on the top of the grain boundary channel 5, and further An metallic electrode pads 7A, 7B, and 7C are made severally on the gate 6A of an insulating film, the source 3 of a superconducting film, and the drain 4 of a superconducting film. Hereby, the occurrence of elastic stress of the superconducting film can be avoided.

公开(公告)号：JPH10136001A

公开(公告)日：1998-05-22

申请号：JP19219497

申请日：1997-07-17

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUN

Inventor： SHA EIKYOKU ,  KIN SHOGO ,  ZEN SHOGAN ,  KIN EKIKIN ,  RI KEIKO

IPC: H04Q3/00 ,  H04L12/42 ,  H04L12/813 ,  H04L12/825 ,  H04L12/853 ,  H04Q7/24 ,  H04L12/28

Abstract: PROBLEM TO BE SOLVED: To cancel congested state of traffic by permitting a wideband terminal equipment (B-TE) to execute transmission by means of exceeding bond width mediated by call/connection acceptance control and canceling a state, in which the loss of a cell in a ring easily occurs. SOLUTION: When B-TE*311 receives the cell from BTE*303 positioned on the upper stage of the ring, the cell is dropped from a CRAD part 319 to an AAL reception part 318, if the transmission destination of the cell is for oneself. When the transmission destination is not for oneself, the cell is relayed to the ring in the direction of downstream via the CRAD part 319. Then, the functions of drop and relay are executed simultaneously. The cell in respective B-TE* is dropped and relayed, based on information of a virtual channel identifier and virtual route identifier in the header of the ATM cell. Four kinds of queues are used for respective B-TE*311 which are the multi-access wide band terminals.

公开(公告)号：JPH1063183A

公开(公告)日：1998-03-06

申请号：JP12452497

申请日：1997-05-14

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUN AUTHORITY

Inventor： JIYANUON RII ,  HIYUNSUUKU CHIYOO ,  JIYONSEOOKU CHIYAE ,  KIYOON HO

IPC: G09C1/00 ,  H04B1/38 ,  H04H20/00 ,  H04L9/06 ,  H04N21/2347 ,  H04N21/266 ,  H04H1/00 ,  H04N7/16

Abstract: PROBLEM TO BE SOLVED: To make a data encryption method not inferior in terms of execution speed as well while maintaining high safety and confidentiality, by adding a byte shift function and dynamic allocation transform scheme to conventional data encryption standard algorithm. SOLUTION: The bit shift function(BSF) is executed before a right side block (32 bit)) is applied to the next round to deal with a linear cryptoanalysis. Namely, the bit shift function(BSF) is a method for comparing the input and output of an S box, analyzing the correlative relation thereof and determining a linear approximation equation relating to the nonlinear S box. The input of the bit shift function(BSF) is shifted by using a module path as an element for dealing with relating to the linear cryptoanalysis method. The dynamic allocation transform (DATA) is executed by using the round key (Ki) formed in order to intensify the function of an (f) function after the bit shift function(BSF) is executed. The confidentiality of the data is improved by proving the method with the element relating to differential cryptoanalysis.

公开(公告)号：JPH1031610A

公开(公告)日：1998-02-03

申请号：JP3063197

申请日：1997-02-14

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： HAKU EISHOKU ,  CHIN SEIJITSU ,  KIN YOKETSU

IPC: G06F12/16 ,  G06F11/00 ,  G06F12/00 ,  G06F12/08 ,  G11C29/00

Abstract: PROBLEM TO BE SOLVED: To perform backup/recovery operation in every block and to attain the locking of a small unit by outputting an address signal and a backup/ recovery control signal to perform a backup process after the data stored in a volatile memory block of a double plane nonvolatile memory means are updated. SOLUTION: An address signal and a backup/recovery control signal are outputted to a double plane nonvolatile memory part 402, and original text data stored in a nonvolatile memory 405 are copied (recovered) to a volatile memory 404 at every part. A data processing part 403 of a database outputs an address read/write control signal and updates the data which are copied to the memory 404. The part 403 also updates the block that is copied to the memory 404 and then outputs both address and backup/recovery control signals to the part 402 to perform the control (backup) so as to overwrite the data of the memory 404 into the memory 405.

公开(公告)号：JPH09259115A

公开(公告)日：1997-10-03

申请号：JP29170596

申请日：1996-11-01

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIN KENSHIYU ,  CHIYOU JIYUNKA ,  KEN YOSHIHIRO

IPC: G11C7/00 ,  G06F7/78 ,  G06F17/16 ,  G11C8/00

Abstract: PROBLEM TO BE SOLVED: To convert respective inputted data into bit-serial data and speedily perform transposing operation for a matrix by storing respective registers with K/N-bit data selected by an output multiplexer module means, and then integrating N K/N-bit data into one data and outputting it as K-bit data. SOLUTION: A bit-serial transposing module means 12 selects and outputs shifted K/N-bit data, outputted by an input shift register module means 11, with a switching control signal. The output multiplexer module means 13 selects and outputs the K/N-bit data, outputted by the bit-serial transposing module means 12, by respective multiplexers. An output register module means 14 stores the respective registers with the K/N-bit data selected by the output multiplexer module means 13, and then integrates N K/N-bit data into one data, which is outputted as K-bit data.

公开(公告)号：JPH09212486A

公开(公告)日：1997-08-15

申请号：JP25333396

申请日：1996-09-25

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KAN HIDEYASU ,  KOU SHIYOUSHIYAKU ,  KEN YOSHIHIRO

IPC: H03H17/00 ,  G06F17/14 ,  H03M7/30 ,  H04B1/66

Abstract: PROBLEM TO BE SOLVED: To provide a composition filter of a decoder which is improved in calculation speed and reduced in the use of an unnecessary memory. SOLUTION: The result of conversion of a 1st multiplier and accumulator 13 which performs the conversion by multiplying subband data in a 1st memory 16 and a cosine coefficient in a 1st ROM 15 by each other is stored in a 2nd memory 18 and copied to a 3rd memory 19, and the audio signal synthesized by processing the data stored in the 3rd memory and a window coefficient in a 2nd ROM 17 by a 2nd multiplier and accumulator 14 is stored in a first-in first-out part 20. Then this audio signal is restored by a digital-analog converter 21 to a sound signal, which is outputted to a speaker; and the multiplying and accumulating operations of the 1st and 2nd multiplier and accumulators 13 and 14 are controlled by a controller 10.

公开(公告)号：JPH09198879A

公开(公告)日：1997-07-31

申请号：JP34432196

申请日：1996-12-24

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： IEONHO PAAKU ,  JIYONAAMU JIYUN

IPC: G06F12/08 ,  G11C15/04 ,  H04L12/70 ,  H04L12/701 ,  H04L12/741

Abstract: PROBLEM TO BE SOLVED: To make it possible to rapidly address convert without limit of the accessing time and without delay at the time of accessing by providing a null controller, lookup table, reception back selector and transmission back selector. SOLUTION: The registered data to be transmitted from a CPU controller 11 is divided at the time of registering, and these data are stored at the moment that a write address signal and a write control signal simultaneously become '1'. When the data are received via a transmission line, a reception lookup table compares the received data with the storage data of each row of the latch circuit group, outputs a comparison result of '0' value only from a matching detector of the rows where all the bits coincide, and the detector outputs the value of the corresponding address of tx match [n] as along as the comparison result of the '0' value and empty of '1' value are input. The other transmission lookup table similarly operates to the reception lookup table.

公开(公告)号：JPH09181324A

公开(公告)日：1997-07-11

申请号：JP19051096

申请日：1996-07-19

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： YOONHO SON ,  JIYONDEE KIMU ,  KIYONIKU CHIYOO

IPC: G02F1/136 ,  G02F1/1368 ,  H01L21/02 ,  H01L21/336 ,  H01L27/12 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To allow driving a polycrystalline silicon thin film transistor from a low voltage, to greatly shortern the production process time of the transistor and moreover, to make it possible to accomplish the whole production process of the transistor at a low temperature of 600 deg.C or lower. SOLUTION: An amorphous silicon thin film formed on an insulating substrate 61 is subjected to heat treatment in an oxygen atmosphere of normal pressures or higher to a high pressure of 100atm or lower and at a temperature of 600 deg.C or lower to form simultaneously a polycrystalline silicon film 62 and an oxide film 63 and after a gate electrode 64 is formed on the above oxide film 63, a gate 64, a source 65 and a drain 65 are formed by an implantation of dopant impurities and a dopant activation treatment and moreover, an interlayer oxide film 66 and a metal electrode 17 are formed.

公开(公告)号：JPH09181314A

公开(公告)日：1997-07-11

申请号：JP21554396

申请日：1996-08-15

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： JIYONHO RII ,  UONGU KAN ,  JIYONSUN RIYUU

IPC: H01L29/78 ,  H01L21/335 ,  H01L21/336

Abstract: PROBLEM TO BE SOLVED: To highly integrate a semiconductor device by a method wherein a gate electrode is made to self-align with a channel region, and at the same time the width of the gate electrode is minimized. SOLUTION: A second aperture 16 is formed in such a way that the upper part of a channel formation region is exposed, a polysilicon film 18 is deposited on the front surface of a nitride film 13, this polysilicon film 18 is pattered to make the polysilicon film 18 remain only in the interior of the aperture 16 and this remained polysilicon film 18 is formed on a gate electrode 21 so that the electrode 20 may be self-aligned with a channel region. This can realized that the width of a gate electrode 20 is minimized.