公开(公告)号：EP2747529A4

公开(公告)日：2015-05-06

申请号：EP13791078

申请日：2013-04-10

Applicant: NGK SPARK PLUG CO

Inventor： NISHIDA TOMOHIRO ,  MORI SEIJI ,  WAKAZONO MAKOTO

IPC: H05K3/28

CPC classification number: H05K3/28 ,  H01L21/563 ,  H05K1/11 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/09881 ,  H05K2201/10977 ,  H05K2203/025 ,  H05K2203/0783

Abstract: To obtain a wiring board that allows improving flowability of an underfill to be filled up a clearance between an electronic component and the wiring board. The wiring board according to the present invention is a wiring board with a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body, a filling member filled up between the plurality of connecting terminals, and a solder resist layer laminated on the laminated body. The filling member is in contact with at least a part of each side surface of the plurality of connecting terminals. The solder resist layer includes an opening that exposes the plurality of connecting terminals. The filling member has a surface roughness rougher than a surface roughness of a top surface of the solder resist layer.

公开(公告)号：EP2784807A4

公开(公告)日：2015-01-28

申请号：EP13824470

申请日：2013-05-27

Applicant: NGK SPARK PLUG CO

Inventor： HAYASHI TAKAHIRO ,  NAGAI MAKOTO ,  ITO TATSUYA ,  MORI SEIJI ,  WAKAZONO MAKOTO ,  NISHIDA TOMOHIRO

IPC: H01L23/498 ,  H01L21/48 ,  H05K3/34

CPC classification number: H05K3/4007 ,  H01L21/4846 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/81 ,  H01L2224/10175 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K1/0298 ,  H05K1/0366 ,  H05K3/28 ,  H05K3/3452 ,  H05K3/4661 ,  H05K3/4688 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2201/10674 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

公开(公告)号：EP1621278B1

公开(公告)日：2014-09-17

申请号：EP04018152.1

申请日：2004-07-30

Applicant: Unimicron Technology Corp.

Inventor： Hsu, Shih-Ping ,  Hu, Chu-Chin

IPC: B23K1/20 ,  H01L21/60

CPC classification number: H01L23/49816 ,  B23K3/0623 ,  B23K2201/42 ,  H01L21/4853 ,  H01L21/563 ,  H01L24/28 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/351 ,  H05K3/1216 ,  H05K3/28 ,  H05K3/3473 ,  H05K3/3484 ,  H05K2201/09881 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/0723 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05552

公开(公告)号：EP2337171A1

公开(公告)日：2011-06-22

申请号：EP09819195.0

申请日：2009-10-06

Applicant: Showa Denko K.K.

Inventor： ONISHI, Mina ,  ISHIHARA, Yoshimitsu ,  INOUE, Hirofumi ,  AZUMA, Yukihiko

IPC: H01T4/10 ,  H01C7/10 ,  H05K1/02

CPC classification number: H01C7/12 ,  H01T4/10 ,  H05K1/0259 ,  H05K2201/09672 ,  H05K2201/09881

Abstract: The present invention provides an electrostatic discharge protector capable of protecting electronic circuit boards having various designs from electrostatic discharge freely, simply and easily. The electrostatic discharge protector of the present invention comprises at least three conductive members containing one pair of electrodes and the conductive members other than the electrodes, the conductive members are each disposed in such a way that the gap between one conductive member and the other conductive member has a width of 0.1 to 10 µm, an insulating member is disposed and embedded in at least one of gaps having a width of 0.1 to 10 µm which are adjacent to each conductive member and one electrode is connected to the other electrode paired with the one electrode through the insulating member and the conductive members other than electrodes.

Abstract translation: 本发明提供一种静电放电保护器，其能够简单且容易地保护具有各种设计的电子电路板免受静电放电。 本发明的静电放电保护器包括至少三个包含一对电极的导电构件和除电极之外的导电构件，导电构件各自设置成使得一个导电构件和另一个导电构件之间的间隙 具有0.1至10μm的宽度，绝缘构件设置并嵌入到与每个导电构件相邻的宽度为0.1至10μm的间隙中的至少一个中，并且一个电极连接到与该一个电极配对的另一个电极 电极通过绝缘构件和除电极之外的导电构件。

公开(公告)号：EP1981317A3

公开(公告)日：2008-10-29

申请号：EP08011580.1

申请日：1996-12-19

Applicant: IBIDEN CO., LTD.

Inventor： Mori, Yoji ,  Kawamura, Yoichiro

IPC: H05K1/11 ,  H05K3/46 ,  H05K1/02

CPC classification number: H05K1/0201 ,  H05K1/0224 ,  H05K1/0253 ,  H05K1/115 ,  H05K1/116 ,  H05K3/4602 ,  H05K2201/062 ,  H05K2201/093 ,  H05K2201/09454 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09627 ,  H05K2201/09681 ,  H05K2201/09727 ,  H05K2201/0979 ,  H05K2201/09881

Abstract: A multilayered printed wiring board in which an interlayer insulating layer (134) is formed on a base material (131) on which a lower conductor circuit (132A) is formed, an upper conductor circuit (137) is formed on the interlayer insulating layer and the lower and upper conductor circuits are electrically connected via plural via holes (136) which are collectively formed. Preferably, said via holes share their land and the form of said land is any of the shape of a tear, an ellipse and a circle.

Abstract translation: 一种多层印刷电路板，其中在形成有下导体电路（132A）的基底材料（131）上形成有层间绝缘层（134），在所述层间绝缘层上形成上导体电路（137） 下导体电路和上导体电路通过共同形成的多个通孔（136）电连接。 优选地，所述通孔共享它们的陆地，并且所述平台的形式是泪液，椭圆形和圆形的任何形状。

公开(公告)号：EP1737284A3

公开(公告)日：2008-06-04

申请号：EP06012739.6

申请日：2006-06-21

Applicant: CANON KABUSHIKI KAISHA

Inventor： Furukawa, Masao Canon K.K. ,  Tsuruoka, Yuji Canon K.K. ,  Mori, Takashi Canon K.K. ,  Yamaguchi, Nobuhito Canon K.K. ,  Kamiya, Seiichi Canon K.K.

IPC: H05K3/12

CPC classification number: H05K3/125 ,  H05K3/245 ,  H05K3/4664 ,  H05K2201/09881 ,  H05K2203/013 ,  H05K2203/1476 ,  Y10S428/901

Abstract: A circuit pattern forming method is provided which can reduce a possibility of undesired short-circuits being produced in the circuit by satellites formed when fabricating a conductive pattern and thereby can form a highly reliable printed circuit board. To that end, this invention overlappingly draws a conductive pattern (11) and an insulating pattern (13) of a predetermined thickness by scanning a liquid ejection head and a substrate (10) relative to each other a plurality of times while ejecting droplets of a conductive pattern forming solution (11) and an insulating pattern forming solution (13). When forming the conductive pattern and the insulating pattern that adjoin each other on the substrate, the step of forming the insulating pattern of at least one scan is executed between the conductive pattern forming steps that are executed the plurality of times until the conductive pattern has a predetermined thickness.

公开(公告)号：EP1744609A3

公开(公告)日：2007-06-27

申请号：EP06123074.4

申请日：2000-05-25

Applicant: IBIDEN CO., LTD.

Inventor： Asai, Motoo Ogaki-kita-kojou, Ibiden Co., Ltd. ,  Wang, Dongdong Ogaki-kita-kojou, Ibiden Co., Ltd. ,  Mori, Takahiro Ogaki-kita-kojou, Ibiden Co., Ltd.

IPC: H05K3/46

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: The present invention relates to a multi-layer printed circuit board comprising a core substrate (30) having through holes (36); and an interlayer resin insulating layer (40) built up on said core substrate, wherein said through holes are constituted by filling a first metal layer (24) formed by electroplating, a metal film formed by electroless plating, sputtering or evaporation and a second metal layer (32) formed by electroplating.

Abstract translation: 本发明涉及一种包括具有通孔（36）的核心基板（30）的多层印刷电路板; 和在所述核心基板上形成的层间树脂绝缘层（40），其中所述通孔由通过电镀形成的第一金属层（24），通过无电镀形成的金属膜，溅射或蒸发和第二金属 通过电镀形成的层（32）。

公开(公告)号：EP1786250A1

公开(公告)日：2007-05-16

申请号：EP06255825.9

申请日：2006-11-14

Applicant: TDK Corporation

Inventor： Kobuke, Hisashi c/o TDK Corporation ,  Miyakoshi, Toshinobu c/o TDK Corporation ,  Uematsu, Hiroyuki c/o TDK Corporation

IPC: H05K3/46 ,  H05K3/40

CPC classification number: H05K3/281 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/0269 ,  H05K1/0306 ,  H05K3/4007 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0367 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/09881 ,  H05K2203/1189 ,  H05K2203/308 ,  H01L2924/00

Abstract: A composite wiring board includes a ceramic substrate (1), a resin layer (2, 3) in contact with at least one surface of the ceramic substrate and a sintered metal conductor (6) piercing through the resin layer. The composite wiring board is manufactured by a method including the steps of forming a through hole in a sheet (17) having a shrinkage-suppressing effect and filling the through hole with conductive paste (18) to obtain a sheet (15, 16, 61, 71, 81, 82) for formation of a conductor, firing the conductor formation sheet and a green sheet (11) for a substrate in their laminated state to obtain a ceramic substrate having a surface provided with a sintered metal conductor (6), removing from the surface of the ceramic substrate a fired product of the sheet having the shrinkage-suppressing effect and forming a resin layer (2, 3) on the surface of the ceramic substrate.

Abstract translation: 复合布线板包括陶瓷基板（1），与陶瓷基板的至少一个表面接触的树脂层（2,3）和穿过树脂层的烧结金属导体（6）。 复合布线板通过以下方法制造：在具有收缩抑制效果的片材（17）中形成通孔的步骤，并且用导电浆料（18）填充通孔以获得片材（15,16,61 ，71,81,82），用于形成导体，烧结导体形成片和用于基板的生片（11），以形成其层压状态，以获得具有设置有烧结金属导体（6）的表面的陶瓷基板， 从陶瓷基板的表面除去具有收缩抑制效果的片材的烧成品，并在陶瓷基板的表面上形成树脂层（2,3）。

公开(公告)号：EP1768215A2

公开(公告)日：2007-03-28

申请号：EP06121218.9

申请日：2006-09-25

Applicant: Samsung SDI Co., Ltd.

Inventor： Kim, Chul-Hong c/o Legal & IP Team Samsung SDI Co. ,  Jung, Jin-Keun c/o Legal & IP Team Samsung SDI Co.

IPC: H01R12/08 ,  H01R12/16 ,  H05K3/36

CPC classification number: H05K3/323 ,  H01J2211/46 ,  H01R4/04 ,  H01R12/62 ,  H05K3/305 ,  H05K3/361 ,  H05K2201/09881 ,  H05K2203/1189

Abstract: The present invention relates to a plasma display panel which includes a plasma display panel, a driving circuit for driving the plasma display panel, an electrical signal transmitting wire for electrically connecting an electrode extended from the plasma display panel to the driving circuit, and an adhesive film interposed between the terminal end of the electrical signal transmitting wire and the terminal end of the electrode of the plasma display panel and electrically connecting between terminal ends. The adhesive film includes an anisotropic conductive film layer having a plurality of conductive particles and an insulated dummy at either or both ends of the anisotropic conductive film layer. Alternatively, the adhesive film may include a plurality of conductive particles with an insulated layer on each side.

Abstract translation: 等离子体显示面板技术领域本发明涉及等离子体显示面板，其包括等离子体显示面板，用于驱动等离子体显示面板的驱动电路，用于将从等离子体显示面板延伸的电极电连接到驱动电路的电信号传输线以及粘合剂 薄膜夹在电信号传输线的末端和等离子显示面板的电极的末端之间并电连接在末端之间。 所述粘合膜包括各向异性导电膜层，所述各向异性导电膜层在所述各向异性导电膜层的任一端或两端具有多个导电粒子和绝缘虚设。 或者，粘合剂膜可以包括多个在每侧具有绝缘层的导电颗粒。

公开(公告)号：EP1649734B1

公开(公告)日：2006-11-15

申请号：EP04767817.2

申请日：2004-07-29

Applicant: Novatec

Inventor： BOURRIERES, Francis ,  KAISER, Clément ,  CICERO, Antonio ,  NOVELLO, Osvaldo

IPC: H05K3/28

CPC classification number: B05C3/18 ,  H05K3/28 ,  H05K3/4053 ,  H05K2201/09881 ,  H05K2203/0139 ,  H05K2203/0143

Abstract: The invention relates to a method and device for filling areas located in hollows (4) which do not open out onto the surface of a substrate (1) without a mask or silk screen. According to the invention, said method consists in associating the following objects according to the order of the direction of relative displacement of a head (12) of a filling product (2) in relation to the substrate (1) i.e. a spreading element (10) for the product to be filled (2) on the surface of the substrate (1); an element for displacing (3) the filling product (2) in the area to be filled (4); an element (7) for adjusting the thickness or raking off the excess filling product (2) such that the above-mentioned filling product (2) remains constantly in contact with the area to be filled (4) from the beginning of the filling operation until raking off of the excess product.