公开(公告)号：JPH11232100A

公开(公告)日：1999-08-27

申请号：JP30756298

申请日：1998-10-28

Applicant: MICROCHIP TECH INC

Inventor： DRAKE RODNEY J ,  TRIECE JOSEPH W ,  WOJEWODA IGOR ,  JOHANSEN DARREL ,  YACH RANDY L ,  BOLES BRIAN

IPC: G06F9/35

Abstract: PROBLEM TO BE SOLVED: To generate an indirect addressing mode address by providing a multiplexer circuit connected to the respective output terminals of a data pointer register, an incrementer and an adder. SOLUTION: A data pointer register 12 stores the current address of an operand used in a simple indirect addressing mode. An incrementer 14 increases the current address of the operand stored in the data pointer register 12. An adder 16 adds the current address and an offset value stored in the data pointer register 12. A multiplexer circuit 18 having a first input terminal connected to the output terminal of the data pointer register 12, a second input terminal connected to the output terminal of the incrementer 14 and a third input terminal connected to the output terminal of the adder 16 selects a desired generated indirect addressing mode address and outputs the selected address to an instruction register.

公开(公告)号：JP2001136099A

公开(公告)日：2001-05-18

申请号：JP2000291328

申请日：2000-09-25

Applicant: MICROCHIP TECH INC

Inventor： MARNEWECK WILLEM ,  SCHIEKE PETER ,  SMIT WILLEM

IPC: H04B1/59 ,  H03F1/30 ,  H03F3/195

Abstract: PROBLEM TO BE SOLVED: To provide a wireless frequency transponder that effectively and skillfully utilizes an input output pin to connect a parallel resonance circuit on an integrated circuit package to a transponder circuit of the integrated circuit. SOLUTION: The wireless frequency transponder includes a wireless frequency tuning circuit having 1st and 2nd terminals and the integrated circuit having a 1st capacitor, a wireless frequency amplifier, 1st and 2nd current sources, and a bias control circuit. The 1st and 2nd current sources are connected to the wireless Frequency amplifier and generate the bias level of the amplifier and control The gain of the amplifier. The bias control circuit generate a bias level and is connected to the 1st and 2nd current sources, the integrated circuit has signal connection and common connection terminals and the input of the wireless frequency amplifier is connected to the signal connection terminal. The 1st capacitor is connected between the 1st terminal of the wireless frequency tuning circuit and the signal connection terminal and the 2nd terminal of the wireless frequency tuning circuit is connected to the common connection terminal.

公开(公告)号：JP2001132295A

公开(公告)日：2001-05-15

申请号：JP2000210493

申请日：2000-07-11

Applicant: MICROCHIP TECH INC

Inventor： WILLEM J MAANWEKKU ,  JOHANES ALBERTAS VAN NIIKAAKU

IPC: E05B49/00 ,  B60R25/20 ,  B60R25/24 ,  E05B65/20 ,  G07C9/00 ,  G08B13/24 ,  H04B1/16 ,  H04B1/59 ,  H04Q5/22 ,  H04Q9/00

Abstract: PROBLEM TO BE SOLVED: To prevent unnecessary actuation of a power circuit of a key entry system, which is in a non-operating state. SOLUTION: A key entry and security system having a passive signal discriminator for decreasing erroneous starting of a power consuming circuit, is comprised of an interrogator, a receiver, a starting logic, and an asymmetric time constant low-pass filter interposed between an output from the receiver and an input from the starting logic. If a first signal is present in the asymmetric time constant low-pass filter over a desired period of time, a second signal is generated from the asymmetric time constant lowpass filter. On the other hand, if the first signal is not present over the predetermined period of time, the second signal is not generated.

公开(公告)号：JPH11353300A

公开(公告)日：1999-12-24

申请号：JP471699

申请日：1999-01-11

Applicant: MICROCHIP TECH INC

Inventor： IGOR WOJUWODA ,  BOLES BRIAN E ,  RODNEY J DRAKE

IPC: G06F3/00 ,  G06F1/22 ,  G06F15/78 ,  H03K19/173

Abstract: PROBLEM TO BE SOLVED: To provide a system and a method to designate the functions of one or more semiconductor device pins. SOLUTION: A semiconductor device pin 500 is designated in a programmable way. The pin 500 includes a combination of a programming port 100 which receives plural pin designating instructions, a configuration logic 300 which is connected to the port 100 and stores those pin designating instructions, a selection logic 400 which is connected to the port 100 and selects a function to designate at least one pin, and at least one pin which is connected to the logic 400 and designated in a programmable way to execute one of plural I/O functions.

公开(公告)号：JPH11224192A

公开(公告)日：1999-08-17

申请号：JP30756098

申请日：1998-10-28

Applicant: MICROCHIP TECH INC

Inventor： DRAKE RODNEY J ,  YACH RANDY L ,  TRIECE JOSEPH W ,  CHIAO JENNIFER ,  WOJEWODA IGOR ,  ALLEN STEVE

IPC: G06F9/32 ,  G06F9/34 ,  G06F9/38

Abstract: PROBLEM TO BE SOLVED: To increase a memory base capable of addressing by providing a second address bus for supplying all the address values of a two-word instruction to a linearized program memory in one cycle. SOLUTION: A first address bus 14 is connected to the linearized program memory 12 and is used for sending the address of a fetched instruction to the linearized program memory 12. A pointer 16 is connected to the first address bus 14. The second address bus 20 is provided with a first end part connected to the output of the linearized program memory 12 and the second end part of the second address bus 20 is connected to the first address bus 14. The second address bus 20 is used for arranging the address of the operand of the second word (word fetched during the execution of a first word) of the two-word instruction on the first address bus 14 after the address of the operand of the first word of the two-word instruction is arranged on the first address bus 14.

公开(公告)号：JPH11177027A

公开(公告)日：1999-07-02

申请号：JP26053198

申请日：1998-09-14

Applicant: MICROCHIP TECH INC

Inventor： FERNANDEZ JOSEPH ,  FUREY LEE

IPC: H01L21/822 ,  G06K19/077 ,  H01L23/64 ,  H01L27/04

Abstract: PROBLEM TO BE SOLVED: To obtain a substrate having excellent deposition and adhesive characteristics of a gold-flash evaporated layer forming an inductive coil by installing the single substrate, the inductive coil placed on one surface of the single substrate and at least one terminal pad electrically connected to at least a part of the inductive coil in a single-sided package. SOLUTION: A gold flash layer having gold in thickness of 7 μ inch is evaporated through a mask, and the coil 10 is formed onto the top face of the substrate 12. The substrate 12 is formed of an epoxy glass plate type material known as an FR4 epoxy glass plate. The chip 14 is mounted on the inside of the inductive coil 10 as the same side as the inductive coil 10 of the substrate 12, and a wire-bonding electrical- connection wiring 18 is formed to sections up to an inductive spot 22 on the substrate 12 from the end section 20 of the outer circumferential turn of the inductive coil 10 and further sections up to the terminal pad 24 of the chip 14 by using a wire bonding technique. Another inductive wire bonding 26 is mounted for connecting the end section 28 of the inner circumferential turn of the inductive coil 10 to the terminal pad 30 of the chip 14.

公开(公告)号：JPH11154727A

公开(公告)日：1999-06-08

申请号：JP26214998

申请日：1998-09-16

Applicant: MICROCHIP TECH INC

Inventor： FUREY LEE ,  FERNANDEZ JOSEPH

IPC: H01L23/12 ,  G06K19/077 ,  H01L23/495 ,  H01L23/50 ,  H01L25/00

Abstract: PROBLEM TO BE SOLVED: To bond an integrated circuit semiconductor chip and a passive element to a single lead frame package, by combining a lead frame arranged in a horizontal plane with the integrated circuit semiconductor chip having terminal pads electrically connected to the coil structure portion of the lead frame. SOLUTION: A package 10 includes a plastic sealing envelope 12 receiving a lead frame structure 14 shaped like an induction coil. The lead frame structure 14 has three tie members 16, for example, which are cut off from the neighboring tie member of a coil-shaped lead frame having the same structure. The tie bar 16 has a function of holding a die paddle in the same plane as a coil 14. Two terminal pads 26, 28 of an integrated circuit semiconductor chip 24 are connected to an outer end portion 30 and an inner end portion 32 of the induction coil 14 by conductive wire bondings 34, 36, respectively.

公开(公告)号：JP2001298977A

公开(公告)日：2001-10-26

申请号：JP2001094421

申请日：2001-03-28

Applicant: MICROCHIP TECH INC

Inventor： BUTLER DAN

IPC: H02P1/28 ,  G05F1/10 ,  H02M3/157 ,  H02P1/04 ,  H02P1/16 ,  H02P1/26 ,  H02P5/00 ,  H02P29/02

Abstract: PROBLEM TO BE SOLVED: To provide a uniform and multi-purpose device and method since a new method is required to adjust a start current to an electric motor. SOLUTION: A data processor control system for controlling current to a circuit is provided with a current limiter that is constructed and configured to adjust current to the circuit, a clock that is constructed and configured to provide a time indicator, a memory that is constructed and configured to store the values of a two-dimensional table while the table has a first dimension including a time value and a second dimension including a current value, and a processor that is constructed and configured to control the current limiter and accesses the two-dimensional table in the memory and is constructed and configured to receive the time indicator from the clock.

公开(公告)号：JPH11340415A

公开(公告)日：1999-12-10

申请号：JP11292099

申请日：1999-04-20

Applicant: MICROCHIP TECH INC

Inventor： SCHROEDER ERIC ,  ROGERS CLARK ,  HULL RICHARD L

IPC: H01L25/18 ,  H01L23/495 ,  H01L23/50 ,  H01L25/04

Abstract: PROBLEM TO BE SOLVED: To improve functionality of devices in a package by combining a first device with a second device, the second device having at least one feedthrough connector for coupling the first device to one of a plurality of pins via the second device. SOLUTION: A plurality of different devices 12 can be mounted on one lead frame 14 die paddle 16 construction without requiring an excessive bond wire length and bond angle i.e., without extending a bond wire on a second device 12B, while maintaining pin compatibility by an IC package 10. The IC package 10 enables this by providing a first device 12A coupled to one of a plurality of pins 20 via the second device 12B by a feedthrough connector 28 located on the second device 12B.

公开(公告)号：JPH11298299A

公开(公告)日：1999-10-29

申请号：JP35977998

申请日：1998-12-17

Applicant: MICROCHIP TECH INC

Inventor： NOLAN JAMES B ,  DARMAWASKITA HARTONO

IPC: H03B5/04 ,  H03B5/20 ,  H03K3/011 ,  H03K3/0231 ,  H03L1/02

Abstract: PROBLEM TO BE SOLVED: To provide a buffer oscillator with which a stable clock frequency can be maintained independently of a temperature. SOLUTION: A precise relaxation oscillator 1 having temperature compensation generates the stable clock frequency over the wide fluctuation of a surrounding temperature. This oscillator has a vibration generator 100 and two independent current generators 200. The outputs of two programmable independent current generators are coupled for supplying a capacitor charging current independent of the temperature. The precise relaxation oscillator 1 having the temperature compensation is provided on a single monolithic integrated circuit.