公开(公告)号：KR100421037B1

公开(公告)日：2004-03-03

申请号：KR1020010013192

申请日：2001-03-14

Applicant: 삼성전자주식회사

Inventor： 김정엽 ,  하상록

IPC: H01L21/304

CPC classification number: H01L21/31053 ,  H01L21/31055

Abstract: A method of manufacturing a semiconductor device is capable of preventing a dishing phenomenon from occurring without using dummy patterns. A plurality of conductive patterns are formed along the entire surface of a semiconductor substrate with an irregular pattern density. The conductive patterns have a first stopper layer at the top thereof. An interlayer insulating layer is formed on the conductive patterns. Next, a second stopper layer is formed on the interlayer insulating layer. An etching mask is formed on the second stopper layer so as to expose a first region having a conductive pattern density that is higher than that of another region(s). By using the etching mask, the second stopper layer and part of the interlayer insulating layer are etched at the first region. The resultant structure is then first polished to expose the first stopper layer at the first region, by using a slurry that provides a polishing rate for the interlayer insulating layer that is higher than that for either the first and second stopper layers. The resultant structure is then polished for a second time to remove the second stopper layer form the region(s) of lower pattern density, by using a slurry that provides a polishing rate that is higher for the second stopper layer than for either the first stopper layer and the interlayer insulating layer.

Abstract translation: 制造半导体器件的方法能够在不使用虚设图案的情况下防止发生凹陷现象。 多个导电图案沿着具有不规则图案密度的半导体衬底的整个表面形成。 导电图案在其顶部具有第一阻挡层。 在导电图案上形成层间绝缘层。 接下来，在层间绝缘层上形成第二阻挡层。 在第二阻挡层上形成蚀刻掩模，以暴露具有比另一个区域更高的导电图案密度的第一区域。 通过使用蚀刻掩模，在第一区域蚀刻第二阻挡层和部分层间绝缘层。 然后通过使用提供高于第一和第二阻挡层的抛光速率的浆料，首先抛光所得结构以暴露第一区域处的第一阻挡层。 然后通过使用提供第二阻挡层的抛光速率高于第一阻挡层的抛光速率的浆料，第二次抛光所得结构以从形成图案密度较低的区域移除第二阻挡层 层和层间绝缘层。

公开(公告)号：KR100396883B1

公开(公告)日：2003-09-02

申请号：KR1020000070008

申请日：2000-11-23

Applicant: 삼성전자주식회사

Inventor： 이종원 ,  윤보언 ,  하상록

IPC: H01L21/302

CPC classification number: H01L21/3212 ,  C09G1/04 ,  C23F3/04 ,  C23F3/06 ,  H01L21/76879

Abstract: A solution used for chemical mechanical polishing of a copper metal interconnection layer and a method of manufacturing a copper metal interconnection layer using the solution are provided. The method of manufacturing the copper metal interconnection layer includes the steps of forming a barrier layer along a stepped portion over the surface of the interdielectric layer having a recessed region; forming a copper seed layer along a stepped portion on the barrier layer, and exposing the barrier layer until exposing the surface of the interdielectric layer by chemical mechanical polishing using the solution including an oxidizing agent, a pH controlling agent, a chelate reagent, and deionized water. The oxidizing agent is hydrogen peroxide (H2O2), an oxidizing agent of a ferric series, or an oxidizing agent of an ammonium series. The pH controlling agent is an acidic or a basic solution. The chelate reagent is diammonium sodium salt (DASS), citric acid, malic acid, gluconic acid, gallic acid, tannic acid, ethylenediaminetetraacetic (EDTA) or benzotriazole (BTA).

Abstract translation: 提供了用于铜金属互连层的化学机械抛光的溶液以及使用该溶液制造铜金属互连层的方法。 制造铜金属互连层的方法包括以下步骤：沿着具有凹陷区域的中间介电层的表面上的台阶部分形成阻挡层; 使用包含氧化剂，pH控制剂，螯合剂和去离子剂的溶液，通过化学机械抛光使阻挡层暴露直至暴露出中间电介质层的表面为止，形成铜晶种层 水。 氧化剂是过氧化氢（H 2 O 2），铁系氧化剂或铵系氧化剂。 pH控制剂是酸性或碱性溶液。 螯合剂为二铵盐（DASS），柠檬酸，苹果酸，葡萄糖酸，没食子酸，单宁酸，乙二胺四乙酸（EDTA）或苯并三唑（BTA）。

公开(公告)号：KR100389917B1

公开(公告)日：2003-07-04

申请号：KR1020000052661

申请日：2000-09-06

Applicant: 삼성전자주식회사

Inventor： 박임수 ,  이근택 ,  권영민 ,  하상록 ,  심우관 ,  고형호

IPC: H01L21/30

CPC classification number: C02F1/4618 ,  C02F2001/46161 ,  C02F2201/46115 ,  C02F2201/46145 ,  C02F2209/04 ,  C02F2209/06 ,  H01L21/0206 ,  H01L21/02063 ,  H01L21/02068 ,  H01L21/02071 ,  H01L21/02074 ,  Y02E60/366

Abstract: A wet process performed in the manufacture of semiconductor devices with cathode water and anode water produced from electrolyte using a 3-cell electrolyzer having an intermediate cell for the electrolyte. The 3-cell electrolyzer includes an anode cell, a cathode cell, and an intermediate cell between the anode and cathode cells, which are partitioned by ion exchange membranes. Deionized water is supplied into the anode and cathode cells, and the intermediate cell is filled with an electrolytic aqueous solution to perform electrolysis. The anode water containing oxidative substances or the cathode water containing reductive substances, which are produced by the electrolysis process, are used in the wet process.

Abstract translation: 在制造具有阴极水和阳极水的半导体器件中使用具有用于电解质的中间单元的3单元电解器的湿法工艺。 3电池电解槽包括阳极槽，阴极槽和阳极槽和阴极槽之间的中间槽，它们通过离子交换膜隔开。 将去离子水供应到阳极和阴极单元中，并且用电解水溶液填充中间单元以执行电解。 在湿法中使用通过电解过程产生的含氧化物质的阳极水或含还原物质的阴极水。

公开(公告)号：KR100378180B1

公开(公告)日：2003-03-29

申请号：KR1020000027503

申请日：2000-05-22

Applicant: 삼성전자주식회사

Inventor： 박영래 ,  김정엽 ,  윤보언 ,  김광복 ,  부재필 ,  이종원 ,  하상록 ,  김경현 ,  홍창기

IPC: H01L21/304

CPC classification number: H01L21/76224 ,  B24B37/044 ,  C09G1/02 ,  H01L21/31053

Abstract: 화학기계적 연마 공정의 수행에 따라 슬러리에 노출되는 표면이 소수성을 띠는 물질층, 예를 들어 폴리실리콘층을 정지막으로 하여, 그 노출 표면이 친수성을 띠는 피연마 물질층, 예를 들어 실리콘산화막을 연마할 시 유용하게 사용할 수 있는 슬러리가 제공되며, 상기 슬러리는 물, 연마입자 및 친수성 작용기와 소수성 작용기를 동시에 갖는 폴리머 첨가제를 포함한다.

公开(公告)号：KR1020020066448A

公开(公告)日：2002-08-17

申请号：KR1020010006623

申请日：2001-02-10

Applicant: 삼성전자주식회사

Inventor： 이근택 ,  한용필 ,  하상록

IPC: H01L21/304

CPC classification number: B08B3/12 ,  B08B3/08 ,  Y10S134/902

Abstract: PURPOSE: A single wafer type cleaning apparatus and a method for cleaning a wafer using the same are provided to increase density of ozone in a cleaning solution and use ozone of high temperature and other cleaning solutions. CONSTITUTION: A wafer is loaded in a chamber(11). A deionized water supply portion is installed at one side of the chamber(11). The deionized water supply portion includes pure water supply sources(D1,D2), valves(V5,V9), and pure water supply lines(13a,13b). A gas injection device(15) injects a gas to the wafer. A gas supply portion supplies the gas to the gas injection device(15). The gas supply portion is formed with has supply sources(G1-G4), a gas line(17a), valves(V1-V8), a mass flow controller(MFC1-MFC5), gas measuring gauges(G1,G2), and a mixer(17b). The mixer(17b) supplies a mixed gas to the gas injection device(15).

Abstract translation: 目的：提供单晶片型清洁装置和使用其的晶片清洁方法，以增加清洁溶液中的臭氧的密度，并使用高温和其它清洁溶液的臭氧。 构成：将晶片装载在腔室（11）中。 去离子水供应部分安装在腔室（11）的一侧。 去离子水供给部包括纯水供给源（D1，D2），阀（V5，V9）和纯水供给管路（13a，13b）。 气体注入装置（15）将气体注入到晶片。 气体供给部将气体供给到气体注入装置（15）。 气体供给部分形成有供给源（G1-G4），气体管线（17a），阀（V1-V8），质量流量控制器（MFC1-MFC5），气体测量计（G1，G2）和 混合器（17b）。 混合器（17b）向气体注入装置（15）供应混合气体。

公开(公告)号：KR100343146B1

公开(公告)日：2002-07-05

申请号：KR1020000065049

申请日：2000-11-02

Applicant: 삼성전자주식회사

Inventor： 황홍규 ,  박영래 ,  김정엽 ,  전정식 ,  윤보언 ,  하상록

IPC: H01L21/336

Abstract: 게이트 전극용 도전층을 필드산화막에 의해 리세스(recess) 된 활성영역에 다마신 구조 형성되는 반도체 소자 및 그 형성방법을 설명한다. 본 발명에 의하면, 활성영역에서는 게이트전극용 도전층이 형성되고 비활성영역에서는 게이트 전극용 도전층이 형성되지 않기 때문에 후속공정에서 층간절연막을 증착할 때, 층간절연막의 두께를 줄여서 층간절연막 내부에서 보이드(void)가 발생하는 것을 억제하고, 활성영역의 바닥면에 선택적 성장에 의한 폴리실리콘막을 다시 성장시키기 때문에 활성영역의 바닥면에서 발생되는 마이크로 스크래치(micro scratch), 피팅(pitting) 및 스트링거의 영향을 최소화시킬 수 있다.

公开(公告)号：KR1020020034635A

公开(公告)日：2002-05-09

申请号：KR1020000065049

申请日：2000-11-02

Applicant: 삼성전자주식회사

Inventor： 황홍규 ,  박영래 ,  김정엽 ,  전정식 ,  윤보언 ,  하상록

IPC: H01L21/336

CPC classification number: H01L21/76897 ,  H01L21/28123 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/823437 ,  H01L21/823481

Abstract: PURPOSE: A method for fabricating a semiconductor device having a gate electrode of a damascene structure is provided to control generation of a void in an interlayer dielectric deposited after a gate line is formed, and to minimize a defect like a micro scratch, pitting or stringer. CONSTITUTION: An insulation layer for a filed oxide layer(106) is formed in a trench formed by patterning a pad oxide layer and a polishing stop layer formed on a semiconductor substrate(100). A chemical mechanical polishing(CMP) process for forming a shallow trench isolation(STI) is performed to define an active region and an inactive region. The polishing stop layer and the pad oxide layer in the active region are removed to form a gate oxide layer. A conductive layer for a gate electrode is deposited. A CMP process is performed to make the conductive layer for the gate electrode have a damascene structure by using the filed oxide layer in the inactive region as a polishing stop layer. A silicide layer and a gate upper insulation layer are stacked and patterned on the substrate to form respective gates in the active and inactive regions. A gate line having a spacer is formed on the sidewall of the gate stack, and a polysilicon layer(120) is grown on the bottom surface of the active region by a selective growth method. An etch stop layer(122) is formed by a blanket etch method. An interlayer dielectric is formed on the semiconductor substrate having the etch stop layer and is etched back.

Abstract translation: 目的：提供一种用于制造具有镶嵌结构的栅电极的半导体器件的方法，以控制在栅极线形成之后沉积的层间电介质中的空隙的产生，并且使诸如微划痕，点蚀或纵向的缺陷最小化 。 构成：在通过图案化形成在半导体衬底（100）上的衬垫氧化物层和抛光停止层形成的沟槽中形成用于氧化物层（106）的绝缘层。 执行用于形成浅沟槽隔离（STI）的化学机械抛光（CMP）工艺以限定有源区和非活性区。 有源区中的抛光停止层和焊盘氧化物层被去除以形成栅极氧化物层。 沉积用于栅电极的导电层。 通过使用非活性区域中的氧化物层作为抛光停止层，进行CMP工艺以使栅电极的导电层具有镶嵌结构。 硅化物层和栅极上绝缘层在衬底上堆叠和图案化以在有源区域和非活性区域中形成相应的栅极。 具有间隔物的栅极线形成在栅叠层的侧壁上，并且通过选择生长法在活性区的底表面上生长多晶硅层（120）。 通过覆盖蚀刻方法形成蚀刻停止层（122）。 在具有蚀刻停止层的半导体衬底上形成层间电介质并被回蚀刻。

公开(公告)号：KR1020010076979A

公开(公告)日：2001-08-17

申请号：KR1020000004465

申请日：2000-01-29

Applicant: 삼성전자주식회사

Inventor： 정승필 ,  장규환 ,  권영민 ,  하상록

IPC: H01L21/24

CPC classification number: H01L21/02068 ,  H01J37/32192 ,  H01J37/32357 ,  H01L21/02063 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/31116 ,  H01L21/76814

Abstract: PURPOSE: A method for fabricating a semiconductor device comprising a silicide film is provided, which includes a cleaning process for cleaning a contaminant and a native oxide on a surface of the silicide film or a silicon substrate without damaging or contaminating the silicon substrate or the silicide film. CONSTITUTION: After forming an interlayer insulation film(122) on a silicon substrate(120), a photoresist pattern confining a contact hole is formed. A contact hole revealing a surface of the silicon substrate is formed by etching the interlayer insulation film using the photoresist pattern. Then, the first metal film deposition pre-cleaning process is performed to remove a surface contaminant or a native oxide which can be remaining after forming the contact hole on the revealed surface of the silicon substrate in the contact hole before depositing the first metal film in the contact hole. The first metal film is deposited on the contact hole with a silicide formation material, which is a refractory metal like W, Ti, Co, Ni, Mo, Ta, Pt and Pd. And a silicide film(130) is formed on a bottom of the contact hole by performing a silicidation process accompanying with a thermal treatment. Then, the not-responded first metal film is removed by a dry or wet etching, and thus the silicide film remains only in the contact hole. Then, the contact hole is buried or a metal line is formed by depositing the second metal film(132) in the contact hole. Before depositing the second metal film, a cleaning process is performed to prevent the formation of a native oxide on the silicide film.

Abstract translation: 目的：提供一种制造包括硅化物膜的半导体器件的方法，其包括用于清洁硅化物膜或硅衬底的表面上的污染物和天然氧化物的清洁工艺，而不损坏或污染硅衬底或硅化物 电影。 构成：在硅衬底（120）上形成层间绝缘膜（122）之后，形成限制接触孔的光刻胶图案。 通过使用光致抗蚀剂图案蚀刻层间绝缘膜来形成露出硅衬底的表面的接触孔。 然后，在将第一金属膜沉积在第一金属膜之前，进行第​​一金属膜沉积预清洁处理以去除在接触孔中的硅基板的露出表面上形成接触孔之后可以残留的表面污染物或天然氧化物 接触孔。 第一金属膜与硅化物形成材料沉积在接触孔上，硅化物形成材料是W，Ti，Co，Ni，Mo，Ta，Pt和Pd等难熔金属。 并且通过进行伴随热处理的硅化工艺，在接触孔的底部形成硅化物膜（130）。 然后，通过干蚀刻或湿蚀刻去除未响应的第一金属膜，因此硅化物膜仅保留在接触孔中。 然后，埋入接触孔，或者通过将第二金属膜（132）沉积在接触孔中形成金属线。 在沉积第二金属膜之前，进行清洁处理以防止在硅化物膜上形成天然氧化物。

公开(公告)号：KR1020010058668A

公开(公告)日：2001-07-06

申请号：KR1019990066022

申请日：1999-12-30

Applicant: 삼성전자주식회사

Inventor： 이근택 ,  박임수 ,  권영민 ,  하상록

IPC: C11D7/02

CPC classification number: C11D11/0047

Abstract: PURPOSE: A cleansing solution for removing impurities from semiconductor substrate is provided to effect etching function to smooth surface or etched side of defected film after the etching process and to remove various impurities remaining on the substrate. CONSTITUTION: The cleansing solution comprises electrolytic ionic liquid and fluoride base compound containing 0.01-50 wt.% HF or NH4. The cleansing method comprises a first step of preparing the electrolytic ionic liquid by means of an apparatus for producing the ionic liquid; a second step of adding the fluoride base compound into the apparatus; a third step of producing the cleansing solution with both of the ionic liquid and the fluoride compound; and a fourth step of contacting the cleansing solution to the semiconductor substrate by means of any cleansing equipments. The adding step is to flow the fluoride compound into the apparatus through an intermediate chamber equipped to the apparatus.

Abstract translation: 目的：提供一种用于从半导体衬底去除杂质的清洁溶液，以实现蚀刻功能，以在蚀刻工艺之后使缺陷膜的表面或蚀刻侧光滑，并去除残留在衬底上的各种杂质。 构成：清洁溶液包含含0.01-50重量％HF或NH 4的电解离子液体和氟化物碱化合物。 清洗方法包括通过用于制备离子液体的装置制备电解离子液体的第一步骤; 将氟化物碱化合物添加到该装置中的第二步骤; 用离子液体和氟化物二者制备清洗液的第三步骤; 以及通过任何清洁设备将清洁溶液与半导体衬底接触的第四步骤。 添加步骤是通过配备到该设备的中间室将氟化合物流入设备。

公开(公告)号：KR1020010002743A

公开(公告)日：2001-01-15

申请号：KR1019990022700

申请日：1999-06-17

Applicant: 삼성전자주식회사

Inventor： 장규환 ,  권영민 ,  하상록

IPC: H01L21/302

Abstract: PURPOSE: An apparatus for etching an oxide layer is provided to improve etching uniformity of an oxide layer, by generating surface wave plasma, by uniformly supplying hydrogen radicals on a wafer through a dispersing plate, and by disposing a heating lamp as a honey-comb type to have the wafer annealed evenly. CONSTITUTION: An apparatus for etching an oxide layer comprises a ring-type wave guide(32), a slot antenna(34), a round insulator(36), a heating block(40), a plasma generating unit, a susceptor(48), a reaction chamber and a dispersing plate(38). The slot antenna is mounted in a lower portion of the wave guide to transfer a micro wave to the round insulator. The round insulator is mounted in a lower portion of the slot antenna to generate a surface wave by the micro wave. The heating block includes heating lamps disposed on the wave guide and in the central portion of the wave guide. The plasma generating unit is composed of the first gas injector for a hydrogen gas injection established on a chamber wall located in a lower portion of the round insulator. The susceptor fixes a wafer. The reaction chamber is composed of the second gas injector for injecting etching gas into the wafer. The dispersing plate disperses hydrogen radicals between the plasma generating unit and the reaction chamber to be supplied to the wafer.

Abstract translation: 目的：提供一种用于蚀刻氧化物层的设备，通过产生表面波等离子体，通过分散板均匀地在晶片上提供氢自由基，并通过设置加热灯作为蜂蜜梳来提高氧化层的蚀刻均匀性 类型使晶片均匀退火。 构造：用于蚀刻氧化物层的装置包括环形波导（32），缝隙天线（34），圆形绝缘体（36），加热块（40），等离子体产生单元，基座（48） ），反应室和分散板（38）。 缝隙天线安装在波导的下部，以将微波传递到圆形绝缘体。 圆形绝缘体安装在缝隙天线的下部，以通过微波产生表面波。 加热块包括设置在波导管和波导的中心部分中的加热灯。 等离子体发生单元由建立在位于圆形绝缘子的下部的室壁上的用于氢气注入的第一气体注入器组成。 感受器固定晶圆。 反应室由用于将蚀刻气体注入晶片的第二气体注入器组成。 分散板将等离子体发生单元和反应室之间的氢自由基分散以供应到晶片。