Abstract:
PURPOSE: Apparatus and method for preventing corrosion are provided to prevent corrosion with a front vehicle by comparing vehicle speed with speed of a front vehicle. CONSTITUTION: Apparatus for preventing corrosion comprises: a camera part(110) obtaining image of a front vehicle; an image recognition part(120) recognize the number of the front vehicle by image-treating of the image of the front vehicle; a wireless communication part collects information about preventing corrosion including a front vehicle identifier and a front vehicle speed through communication with the front vehicle; a speed sensing part(140) senses the speed of the front vehicle; a determination controller(170) identifies the front vehicle through matching the front vehicle identifier and the number of the front vehicle, and generates a control signal for preventing corrosion with the front vehicle through comparison of vehicle speed.
Abstract:
PURPOSE: Obstacle sensing system and method are provided to accurately determine obstacles in front of a vehicle by obtaining 2D image information on actual surrounding environment. CONSTITUTION: An obstacle sensing system comprises a first image obtaining unit(121), a second image obtaining unit(122), an image recognition unit(130), and a danger determining unit(140). The first image obtaining unit selects only laser beam irradiated to the ground of a target distance from at least one laser source and obtains first image information. The second image obtaining unit obtains image of actual surrounding environment as second image information. The image recognition unit processes the line information of a laser beam with 3D shape recognition signals using the first image information.
Abstract:
본 발명은 SoC에서 효율적인 인터럽트 처리를 위한 인터럽트 처리 시스템에 관한 것이다. 본 발명에 따른 인터럽트 처리 시스템은 인터럽트 신호를 각각 생성하는 복수의 인터럽트 소스; 및 하나 또는 그 이상의 특정한 인터럽트 신호가 활성화된 경우, 활성화된 복합 인터럽트 신호를 생성하는 복합 인터럽트 생성기를 포함하고, 상기 복합 인터럽트 생성기는 모드 선택 신호에 따라 앤드 연산 또는 오어 연산을 선택적으로 수행하여 상기 복합 인터럽트 신호를 생성하기 위한 논리 연산부; 및 제 1 제어 신호를 참조하여 상기 인터럽트 신호의 논리 상태를 검출하고, 제 2 제어 신호를 참조하여 상기 인터럽트 신호의 논리 상태를 선택적으로 상기 논리 연산부에 전달하는 복수의 인터럽트 신호 수신부를 포함한다. 본 발명에 따른 인터럽트 처리 시스템은 처리되는 작업의 성격에 따라 인터럽트 신호 생성 여부를 결정함으로써 상황에 따라 유연한 인터럽트 처리가 가능해진다. 결국, 본 발명에 의하면 시스템의 인터럽트 처리 효율이 향상된다.
Abstract:
PURPOSE: An apparatus and method for recognizing image are provided to increase the recognition rate with a small amount of operation and quickly and accurately recognize an object by classifying the input image into True/False on the basis of the threshold value for the True and False image. CONSTITUTION: A characteristic detecting part(300A) inputs the value obtained by using an x / y- axis coordinate value, an axis gradient, and an x / y- axis gradient into an Haar like filter, and extracts a feature of the input image. An image classification part(300B) classifies the input image into True or False using the feature of the input image and threshold value for the True and False image step by step. The characteristic detecting part includes a gradient generator, an absolute value calculation part, an Haar like filter unit, and a normalization part.
Abstract:
A high energy efficiency processor applying DVS is provided to maximize energy efficiency represented as 'performance/total power consumption' by using a simple structure, support a parallel processing architecture by using a plurality of processors, and realize a parallel processor including the plurality of processing elements performing parallel processing. A function unit block(200) performs operation according to an instruction received from an instruction register(110). Each parallel unit block(400) communicates data with an external device. An instruction interpreter(120) interprets the received instruction, and determines an operation mode of the function and parallel unit block required for executing the interpreted instruction. A function unit block operator(300) applies a different voltage level from the operation mode of the function unit block. A parallel unit block operator(500) applies the different voltage level from the operation mode of the parallel unit block. The function unit block includes more than two function units and more than two function unit operators for applying the different voltage level by control of the instruction interpreter.
Abstract:
본발명의실시예에따른차동드라이버회로는제 1 드라이버, 제 2 드라이버, 제 1 축전기, 제 2 축전기, 과도구간전압합산회로, 그리고과도구간비대칭보상회로를포함할수 있다. 제 1 드라이버는제 1 구동신호에따라제 1 패드를제 1 전압으로구동할수 있다. 제 2 드라이버는제 2 구동신호에따라제 2 패드를제 2 전압으로구동할수 있다. 제 1 축전기는제 1 및제 2 패드의전압이변화하는과도구간에서, 제 1 패드의전압변화를일단으로제공받아타 단으로전달할수 있다. 제 2 축전기는과도구간에서제 2 패드의전압변화를일단으로제공받아타 단으로전달할수 있다. 과도구간전압합산회로는제 1 및제 2 축전기를통해각각전달된전압을합산할수 있다. 과도구간비대칭보상회로는과도구간전압합산회로의합산된전압에따라제 1 및제 2 구동신호중 적어도하나의슬로프(Slope)를조절하여과도구간에서의제 1 및제 2 드라이버의슬루율비대칭을보정할수 있다.
Abstract:
PURPOSE: A bus bridge apparatus is provided to maximize data transmission performance among interconnections, by transmitting and receiving data by considering characteristics among different interconnections. CONSTITUTION: A slave port (210) performs interface with a master device of a bus based interconnection (110), and receives read and write transmission command, address data and write data from the master device, and transmits read data to the master device. A command controller (220) receives the transmission command, and an address buffer (230) stores the address data. A write data buffer (240) stores the write data, and a read data buffer (270) stores the read data. A protocol converter (260) outputs the write data of the master device to the slave device, by using the address and write data in case of the write transmission command. [Reference numerals] (200) Bus bridge apparatus; (210) Slave port; (220) Bus based interconnection; (230) Address buffer; (240) Write data buffer; (250) Transmission mode controller; (260) Protocol converter; (270) Read data buffer; (AA) Bus based interconnection; (BB) Network based interconnection
Abstract:
PURPOSE: A pedestrian detection method of a pedestrian detection device is provided to perform pedestrian detection on a search window using a second classifier with high accuracy after reducing the number of search windows, thereby performing highly accurate detection of an object while reducing the complexity of detection procedure and power consumption. CONSTITUTION: A pedestrian detection device obtains an image from a digital image device and performs blocking of search windows(210,220). The pedestrian detection device selects a specific block from blocks determined by a pre-learned classifier(230) and produces a specific vector of HOG features from the selected block(240,250). The pedestrian detection device calculates a SVM(Support Vector Machine) response value using the produced feature vector, and performs a first object detection by applying the response value to an AdaBoost Classifier(260,270). If a pedestrian is detected at the first object detection, the pedestrian detection device performs a second object detection to the search window(280). [Reference numerals] (210) Obtain an image; (220) Performs blocking of search windows; (230) Pre-learned classifier; (240) Select a specific block; (250) Produce a specific vector; (260) Calculates a SVM response value; (270) Perform a first object detection; (280) Perform a second object detection; (290) Output decision; (AA) No; (BB) Yes
Abstract:
본 발명은 영상 인식 장치 및 방법에 관한 것으로, 본 발명의 일 실시 예에 따른 위치 정보 기반 영상 인식 장치는, 현재 위치 정보를 수신하는 GPS 수신부; 주변 영상을 촬영하여 주변 영상 데이터를 취득하는 주변 영상 정보 취득부; 각각의 영상 인식 대상에 대한 영상 인식 학습 정보를 저장하는 영상 인식 학습 정보 데이터 베이스; 상기 수신된 현재 위치 정보를 기반으로 현재 위치의 지리적 특성에 연관된 영상 인식 학습 정보를 상기 영상 인식 학습 정보 데이터 베이스로부터 선택하는 영상 인식 학습 정보 선택부; 및 상기 선택된 영상 인식 학습 정보에 기반하여 상기 취득된 주변 영상 데이터의 영상 인식을 수행하는 영상 인식 처리부를 포함한다. 상술한 바와 같은 본 발명은, 현재 위치의 지리적 특성에서 나타날 수 있는 대상에 대한 영상 인식 학습 정보만을 추출하여, 이를 주변 영상 정보와 비교함으로써 영상 인식 처리에 소모되는 연산량을 줄일 수 있는 이점이 있다. 영상 인식, 위치 정보, 지리적 특성
Abstract:
PURPOSE: A memory system comprising a plurality of DMA channels and an integrating management method for a plurality of DMA channels are provided to improve data transmission efficiency of a memory controller by the integrated management of multichannel memory controller and connected multiple DMA channels. CONSTITUTION: A memory controller(200) performs data transceiving operation with a memory(100). The memory controller comprises multiple channels which are physically separated each other. A DMA controller (300) is connected to the multiple channels of the memory controller and includes multiple DMA channels which are physically separated each other. The DMA controller performs data transceiving operation with the memory through the multiple DMA channels and the memory controller. An access module(400) connects the channels of the memory controller with the DMA channels each other.