公开(公告)号：DE102012018611B3

公开(公告)日：2013-10-24

申请号：DE102012018611

申请日：2012-09-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRASE GABRIELA ,  NELLE PETER ,  SCHINDLER GUENTHER ,  ZUNDEL MARKUS

IPC: H01L29/06 ,  H01L21/76 ,  H01L29/78

Abstract: Die Beschreibung bezieht sich auf Halbleiterbauelement mit einem Halbleiterkörper, einer Isolation an dem Halbleiterkörper und einem Zellenfeld, welches zumindest teilweise in dem Halbeleiterkörper angeordnet ist. Das Zellenfeld weist zumindest einen p-n Übergang und zumindest eine Kontaktierung auf. Die Isolation ist in lateraler Richtung des Halbleiterkörpers von einer umlaufenden Diffusionsbarriere begrenzt. Die Diffusionsbarriere umfasst einen Graben, welcher die Isolation durchschneidet und in den Zellenbereich der Isolation und eine Randisolation teilt.

公开(公告)号：DE10310161B4

公开(公告)日：2009-04-09

申请号：DE10310161

申请日：2003-03-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER

IPC: B81B3/00 ,  B81B7/02 ,  H01L21/822 ,  H01L27/04 ,  H02K35/02 ,  H02M1/00

Abstract: A monolithic integrated circuit (100) comprises a functional unit on a substrate (101) with a coupled energy supply unit comprising an inductance (103) and a permanent magnet (102) which moves with respect to the inductance on vibration to generate an electrical supply for the functional unit, which is preferably a sensor.

公开(公告)号：DE502004007025D1

公开(公告)日：2008-06-19

申请号：DE502004007025

申请日：2004-03-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER

IPC: B81B3/00 ,  H02K35/02 ,  H01L21/822 ,  H01L27/04

Abstract: A monolithic integrated circuit (100) comprises a functional unit on a substrate (101) with a coupled energy supply unit comprising an inductance (103) and a permanent magnet (102) which moves with respect to the inductance on vibration to generate an electrical supply for the functional unit, which is preferably a sensor.

公开(公告)号：DE50015110D1

公开(公告)日：2008-05-29

申请号：DE50015110

申请日：2000-06-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  DEHM CHRISTINE

IPC: H01L21/8242 ,  H01L27/108 ,  H01L21/02 ,  H01L21/8246 ,  H01L27/105

Abstract: The invention provides a semiconductor memory component with random access, also having a structure which is differentiated into memory cells and logic regions and has a lower oxide layer arranged on a silicon substrate and an upper oxide layer arranged on the lower oxide layer, each memory cell comprising at least one transistor in the transition region between silicon substrate and lower oxide layer and a capacitor in the transition region between lower oxide layer and upper oxide layer, which capacitor is connected to the transistor via a contact hole, which is filled with metal, in the lower oxide layer and comprises a ferroelectric arranged between two electrodes, the electrode which is connected to the transistor and adjoins the lower oxide layer having a relatively great thickness, and each logic region comprising at least one transistor in the transition region between silicon substrate and lower oxide layer, which transistor is connected to an electrode on the topside of the upper oxide layer via a contact hole, which is filled with metal, in the lower oxide layer and the upper oxide layer. According to the invention, it is provided that between the capacitors of the memory cells and the contact holes in the logic regions, level compensation between the topology of the memory cells and of the logic regions is created by dummy structures.

公开(公告)号：DE102005047111B3

公开(公告)日：2007-06-21

申请号：DE102005047111

申请日：2005-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STICH ANDREAS ,  SCHRENK MICHAEL ,  SCHINDLER GUENTHER ,  ENGELHARDT MANFRED

IPC: H01L27/08 ,  H01L21/768 ,  H01L21/822

Abstract: Capacitor has a capacitor electrode (E1) formed on a surface of an intermediate dielectric (1). Another intermediate dielectric (4) is formed on the intermediate dielectric (1) and includes an opening for exposing a part of the capacitor electrode. An electrically conductive diffusion-barrier layer (5) is formed on the surface of the capacitor electrode. Another capacitor electrode (E2) is formed on a surface of a capacitor dielectric (6) and includes only another electrically conductive diffusion-barrier layer (7). One of the capacitor electrodes includes titanium, tantalum, tantalum nitride and/or titanium nitride. An independent claim is also included for a method of manufacturing a metal-insulator-metal capacitor.

公开(公告)号：DE102005004366A1

公开(公告)日：2006-08-10

申请号：DE102005004366

申请日：2005-01-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STEINLESBERGER GERNOT ,  STEINHOEGL WERNER ,  DUESBERG GEORG ,  SCHINDLER GUENTHER

IPC: H01L21/768

Abstract: The method involves applying an electrically insulating layer (72) on a planarized surface of an integrated switching arrangement after the application of an electro conductive nucleation layer (74) on the surface. The insulating layer is structured so that areas of the nucleation layer are laid open. An electro conductive material is galvanically deposited on the areas laid open.

公开(公告)号：DE59709925D1

公开(公告)日：2003-05-28

申请号：DE59709925

申请日：1997-09-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HARTNER WALTER ,  SCHINDLER GUENTHER ,  MAZURE-ESPEJO CARLOS

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/108 ,  H01L29/92

Abstract: The invention relates to a semiconductor device for integrated circuits with a stack cell located in an insulating layer (2) having a plug (1) filled contact hole (8) with a capacitor with a lower electrode (5) turned towards the plug (1), a paraelectric or ferroelectric dielectric (6) and an upper electrode (7). A barrier layer (3) is located between the plug (1) and the lower electrode (5). Said layer is surrounded by a silicon nitride collar (4) preventing effective oxidation of barrier layer (3).

公开(公告)号：DE59708837D1

公开(公告)日：2003-01-09

申请号：DE59708837

申请日：1997-09-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HARTNER WALTER ,  SCHINDLER GUENTHER ,  BRUCHHAUS RAINER ,  PRIMIG ROBERT

IPC: H01L21/8247 ,  C23C14/34 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108 ,  H01L27/115 ,  H01L27/11502 ,  H01L29/788 ,  H01L29/792

Abstract: The process provides a multistage procedure, in which, in the first step the layer is sputtered at low temperature, in the second step an RTP process is carried out in an inert atmosphere at medium or high temperature, and in the third step the layer is heat treated in an atmosphere containing oxygen at low or medium temperature. The levels of heating are considerably reduced compared with conventional processes, so that when the process is being employed for producing an integrated memory cell it is possible to prevent oxidation of an underlying barrier layer.

公开(公告)号：DE10127934A1

公开(公告)日：2002-12-19

申请号：DE10127934

申请日：2001-06-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  ENGELHARDT MANFRED

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522

Abstract: A strip conductor arrangement comprises a first layer (101) made from a first insulating material; a second layer (106) made from a second insulating material arranged on the first layer; a third layer (108) made from a third insulating material arranged on the second layer; a strip conductor integrated in the first layer and a strip conductor integrated in the third layer; and an electrical contact (104) electrically coupling the strip conductor in the first layer with the strip conductor in the third layer. The strip conductors and the electrical contact are made from an electrically conducting material and are surrounded by an encapsulating layer (103) made from a capsule material which is mechanically harder than the electrically conducting material. An Independent claim is also included for the production of an encapsulated strip conductor coupling. Preferred Features: The first, second and third insulating materials are mechanically softer than the electrically conducting material and are made from an organic material. The capsule material is a nitrogen compound, preferably silicon nitride, titanium nitride and/or tantalum nitride.

公开(公告)号：DE10066082A1

公开(公告)日：2002-09-12

申请号：DE10066082

申请日：2000-06-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  KROENKE MATTHIAS

IPC: H01L27/108 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L21/283 ,  H01L21/308

Abstract: The method involves applying at least one raised auxiliary structure of auxiliary material to cover part of the substrate surface, applying the coating to be opened to the auxiliary structure to cover a related surface area of the substrate and auxiliary structure and removing coating material and if appropriate other material by essentially planar etching until the coating on the auxiliary structure is opened and the auxiliary material exposed. The method involves applying at least one raised auxiliary structure (11) of auxiliary material (13) on a substrate (1,5,7,9), if appropriate containing structures, so that it covers part of the substrate surface, applying the coating (15) to be opened to the auxiliary structure so that it covers a related surface area of the substrate and auxiliary structure and removing coating material and if appropriate other material on the surface by essentially planar etching until the coating on the auxiliary structure is opened and the auxiliary material exposed.