-
公开(公告)号：KR101152266B1
公开(公告)日：2012-06-08
申请号：KR1020100025448
申请日：2010-03-22
Applicant: 성균관대학교산학협력단
IPC: H05K9/00
Abstract: 본발명은동박적층필름상에포토리소그래피공정을통해포토레지스트를사용하여도트형태의패턴을형성하는단계; 상기동박적층필름상에형성된도트형태의패턴에연자성체를도금하는단계; 상기연자성체를도금한후 포토레지스트를제거하는단계; 및상기단계를거쳐도트형태로연자성체가도금된동박적층필름의구리층을에칭액을사용하여에칭하는단계를포함하는동박적층필름을이용한전자파흡수시트의제조방법에관한것이다. 본발명은전자파흡수시트를제조함에있어롤투롤방식을이용한연속제조공정이가능하며, 전자파흡수시트를플렉서블하고현재상용화된제품에비해두께를현저히얇게제조할수 있는동박적층필름을이용한전자파흡수시트의제조방법을제공한다.
-
Patent Agency Ranking
公开(公告)号：KR101044973B1
公开(公告)日：2011-06-29
申请号：KR1020090053852
申请日：2009-06-17
Applicant: 성균관대학교산학협력단
Abstract: 본 발명은 고저항체로 사용할 수 있는 고저항 서멧 저항체 및 그 형성방법에 관한 것이다.
본 발명에 의한 고저항 서멧 저항체의 형성방법은, 고저항체로 사용되는 서멧 저항체를 형성하는 방법에 있어서, 양극산화가 쉽게 이루어지는 활성물질과 양극산화에 안정한 안정금속을 함께 증착하여 혼합체를 형성하고, 상기 혼합체를 양극산화하여 상기 활성물질만 선택적으로 산화된 서멧을 형성하는 것을 특징으로 한다. 또한 본 발명에 의한 고저항 서멧 저항체는 양극산화가 쉽게 이루어지는 활성물질을 양극산화한 산화물을 기반으로 하여 양극산화에 안정한 안정금속 입자가 분산된 상태의 서멧으로 이루어진 것을 특징으로 한다.
본 발명에 따르면, 증착공정을 실시한 뒤에 양극산화공정을 실시하여 산소결핍의 문제를 방지함으로써, 뛰어난 열안정성 및 고주파특성을 갖는 고저항체를 제조할 수 있으며, 서멧을 직접 증착하지 않기 때문에 증착과정에서 옥사이드 타겟 또는 산소기체를 사용하지 않음으로써, 증착용 챔버의 오염을 막을 수 있는 효과가 있다.
양극산화, 애노다이징, 서멧, cermet, 저항-
公开(公告)号：KR1020100104484A
公开(公告)日：2010-09-29
申请号：KR1020090022927
申请日：2009-03-18
Applicant: 성균관대학교산학협력단
CPC classification number: H01L2224/11472 , H01L2224/11906 , H01L2224/131 , H01L2224/45 , H01L2224/45147 , H01L2924/00014 , H01L2924/01005 , H01L2924/01014 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/10253 , H01L2224/48 , H01L2924/00012
Abstract: PURPOSE: The manufacturing method of the free lead solder bump in which the mechanical reliability is improved is that solder the front side of the formed copper post is the capping is formed in substrate. The resistance about the shear stress is increased. CONSTITUTION: A copper wire(2) is formed on the substrate(1). The photoresist layer(3) is formed on the copper wire. According to the pattern of the photoresist layer, the copper post(5) is formed on the copper wire. The photoresist layer(4) is formed in order to have the pattern of the same diameter as the diameter of the bottom part of the copper post. The solder(10) is formed so that the frontal face of upper part of the copper post be capped.
Abstract translation: 目的：提高机械可靠性的自由铅焊料凸块的制造方法是在基板上形成形成铜柱的前侧的焊料为封盖。 关于剪切应力的阻力增加。 构成：在基板（1）上形成铜线（2）。 光致抗蚀剂层（3）形成在铜线上。 根据光致抗蚀剂层的图案，铜柱（5）形成在铜线上。 形成光致抗蚀剂层（4）以具有与铜柱的底部的直径相同直径的图案。 焊料（10）被形成为使得铜柱的上部的正面被盖住。
-
公开(公告)号：KR1020100011215A
公开(公告)日：2010-02-03
申请号：KR1020080072338
申请日：2008-07-24
Applicant: 성균관대학교산학협력단
CPC classification number: H01L21/76832 , H01L21/02263 , H01L21/0274 , H01L21/3213 , H01L21/76838 , H01L21/76897
Abstract: PURPOSE: A method of manufacturing a multi-layer circuit board using selective plating by forming a middle-layer is provided to manufacture a multiple layers through a simple process by selectively forming and plating an interlayer. CONSTITUTION: A metal layer is formed on the surface of a material layer, and a first protective covering pattern is formed on the surface of the metal layer. The material layer is selectively processed by anode oxidation and a first protective covering pattern is removed. An interlayer is formed on the surface from which the first protective covering was removed. The second protective covering pattern is formed on the surface of the intermediate layer. The intermediate layer is selectively etched by the second protective covering pattern.
Abstract translation: 目的：提供一种通过形成中间层制造使用选择性镀覆的多层电路板的方法，通过简单的工艺通过选择性地形成和镀覆中间层来制造多层。 构成：在材料层的表面上形成金属层，在金属层的表面上形成第一保护覆盖图案。 通过阳极氧化选择性地处理材料层，并且去除第一保护覆盖图案。 在去除了第一保护层的表面上形成中间层。 第二保护覆盖图案形成在中间层的表面上。 中间层被第二保护覆盖图案选择性地蚀刻。
-
公开(公告)号：KR1020090104378A
公开(公告)日：2009-10-06
申请号：KR1020080029778
申请日：2008-03-31
Applicant: 성균관대학교산학협력단
CPC classification number: H01L21/76838 , H01L21/31144 , H01L21/76802 , H01L23/12
Abstract: PURPOSE: A multilayer manufacturing method using the anode oxidation is provided to apply the aluminum oxide to the interlayer dielectric layer and to improve the high electrical characteristic of insulation performance. CONSTITUTION: The multilayer manufacturing method using the anode oxidation comprises as follows. The first metal layer is formed in the surface of a substrate(S1). The first circuit has the first part oxidative region and the first metal wirings by oxidizing the first metal layer partially. The interlayer dielectric layer is formed by anodizing extensively the first metal layer and the first part oxidative region(S3). The penetration hole is formed by partially etching the interlayer dielectric layer. The second metal layer is formed within the surface and penetration hole of the interlayer dielectric layer(S5). The second circuit has the second part oxidative region and the second metal wirings.
Abstract translation: 目的：提供使用阳极氧化的多层制造方法以将氧化铝施加到层间电介质层，并提高绝缘性能的高电特性。 构成：使用阳极氧化的多层制造方法如下。 第一金属层形成在基板的表面（S1）中。 第一电路通过部分氧化第一金属层而具有第一部分氧化区和第一金属布线。 通过对第一金属层和第一部分氧化区域进行阳极氧化而形成层间电介质层（S3）。 穿透孔通过部分蚀刻层间电介质层而形成。 第二金属层形成在层间介质层的表面和贯通孔内（S5）。 第二电路具有第二部分氧化区和第二金属布线。
-
公开(公告)号：KR1020090014543A
公开(公告)日：2009-02-11
申请号：KR1020070078588
申请日：2007-08-06
Applicant: 성균관대학교산학협력단
Abstract: A method for forming high ordered aluminum anodizing oxidation holes and a method for forming magnetic recording media using the same are provided to form high ordered nano-holes regularly by controlling the formation position on the aluminium layer through a guide pattern. A method for forming high ordered aluminum anodizing oxidation holes comprises a step of selectively forming a guide pattern(14a) for guiding the forming position of anode oxidation holes formed during anode oxidation by selectively blocking aluminium area exposed on an aluminum layer(12), and a step of regularly forming a plurality of nano-holes in which alumina is formed on the outside surface by performing anode oxidation on the exposed aluminium area and controlling formation position of nano-hole(12b) according to the kind of the guide pattern masking the exposed aluminium area.
Abstract translation: 提供一种形成高阶铝阳极化氧化孔的方法以及使用其形成磁记录介质的方法，以通过引导图案控制铝层上的形成位置来规则地形成高有序纳米孔。 一种形成高阶铝阳极化氧化孔的方法，包括以下步骤：选择性地形成引导图案（14a），用于通过选择性地阻挡暴露在铝层（12）上的铝区域来引导在阳极氧化期间形成的阳极氧化孔的形成位置，以及 通过在露出的铝区域上进行阳极氧化，并且根据导电图案的种类来控制纳米孔（12b）的形成位置，从而在外表面上规则地形成多个纳米孔，其中在外表面上形成氧化铝， 暴露铝面积。
-
-
-
-
-
Search Results
36
records
(took 0.021 seconds)
