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公开(公告)号：KR1020170086907A
公开(公告)日：2017-07-27
申请号：KR1020160006517
申请日：2016-01-19
Applicant: 한국전자통신연구원
IPC: H01L21/02 , H01L21/04 , H01L21/324 , H01L21/3215
Abstract: 본발명은반도체소자의선택적도핑방법에관한것이다. 이에따른본 발명은, 반도체소자의선택적도핑방법으로, 기판상에증착된희생층상에도핑영역을정의하기위한마스크층을형성하는단계, 상기마스크층 상에증착되는도펀트물질을상기기판내부로확산하여도핑영역을형성하는제1 열처리단계, 상기도핑영역으로확산된도펀트물질을활성화하는제2 열처리단계및 상기희생층을제거하는단계를포함하는것을특징으로하는선택적도핑방법에관한것이다.
Abstract translation: 本发明涉及一种半导体器件的选择性掺杂方法。 在本发明中，半导体器件的选择性掺杂方法，包括：形成掩模层，以限定一个掺杂区域沉积在基底上的牺牲层上，使掺杂剂扩散的材料被沉积在掩模层到衬底按照 第一热处理以形成一个掺杂区，用于激活掺杂剂材料扩散到掺杂区和一个选择性掺杂方法，包括移除所述牺牲层的步骤的第2热处理工序。
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公开(公告)号：KR1020170059520A
公开(公告)日：2017-05-31
申请号：KR1020150163258
申请日：2015-11-20
Applicant: 한국전자통신연구원
IPC: H01L29/43 , H01L29/778 , H01L29/45 , H01L29/772 , H01L21/02
Abstract: 본발명의실시예에따른전계효과트랜지스터는서로마주하는제1 면및 제2 면을포함하는활성층; 상기활성층의상기제1 면상에형성되고, 상기활성층의상기제1 면을노출하는제1 개구영역을포함하는캡핑층; 상기캡핑층상에형성된소스오믹전극및 드레인오믹전극; 상기활성층의상기제1 면상부에배치되고, 상기제1 개구영역내부에배치된일부를포함하는전면게이트; 상기활성층의상기제2 면상부에배치되고, 상기소스오믹전극및 상기드레인오믹전극사이의상기활성층의상기제2 면을노출하는제2 개구영역을포함하는반도체기판; 및상기활성층의상기제2 면상부에배치되고, 상기제2 개구영역내부에배치되어상기전면게이트에중첩된후면게이트를포함할수 있다.
Abstract translation: 根据本发明实施例的场效应晶体管包括：有源层，包括彼此面对的第一表面和第二表面; 覆盖层，形成在有源层的第一表面上并且包括暴露有源层的第一表面的第一开口区域; 形成在覆盖层上的源欧姆电极和漏欧姆电极; 布置在有源层的第一侧上并且包括设置在第一开口区内的部分的前栅极; 半导体衬底，所述半导体衬底设置在所述有源层的所述第二表面上并且包括暴露所述源极欧姆电极和所述漏极欧姆电极之间的所述有源层的所述第二表面的第二开口区域; 以及布置在有源层的第二侧之上并设置在第二开口区域内以与前栅极重叠的后栅极。
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公开(公告)号：KR1020160001744A
公开(公告)日：2016-01-07
申请号：KR1020140078693
申请日：2014-06-26
Applicant: 한국전자통신연구원
IPC: H01L29/778 , H01L21/336
CPC classification number: H01L21/28264 , H01L29/2003 , H01L29/407 , H01L29/42316 , H01L29/4236 , H01L29/452 , H01L29/51 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66462 , H01L29/7786
Abstract: 본발명의일 실시예에따른반도체소자는, 기판, 상기기판위에형성되는활성층, 상기활성층위에형성되며제1 개구부를갖는보호층, 상기보호층위에형성되는소스전극, 구동게이트전극및 드레인전극및 상기제1 개구부위에형성되는제1 추가게이트전극을포함하며, 상기소스전극, 상기드레인전극및 상기구동게이트전극에각각인가되는전압으로인해상기활성층, 상기보호층및 상기구동게이트전극에전기장이인가되며, 상기제1 추가게이트전극은상기활성층, 상기보호층및 상기구동게이트전극중 적어도일부에인가되는전기장의크기를감쇄시킨다.
Abstract translation: 根据本发明的一个实施例的半导体器件包括：衬底; 形成在所述基板上的有源层; 形成在有源层上并具有第一开口单元的保护层; 源电极，驱动栅电极和形成在保护层上的漏电极; 以及形成在所述第一开口单元上的第一附加栅电极。 通过分别施加到源电极，漏电极和驱动栅电极的电压，向有源层，保护层和驱动栅电极施加电场。 第一附加栅电极衰减施加到有源层，保护层和驱动栅电极的至少一部分的电场的尺寸。
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公开(公告)号：KR1020140019984A
公开(公告)日：2014-02-18
申请号：KR1020120086230
申请日：2012-08-07
Applicant: 한국전자통신연구원
IPC: H01L31/107
CPC classification number: H01L31/18 , H01L31/02002 , H01L31/035272 , H01L31/107
Abstract: The present invention relates to an avalanche photodiode having a guard ring structure for reducing edge-breakdown thanks to an external voltage applied through a metal pad attached on the guard ring and a manufacturing method thereof. The avalanche photodiode having a guard ring structure includes: a plurality of semiconductor layers which are stacked on a substrate; an active area which is formed on part of the top of the semiconductor layers; a guard ring which is formed on the top of the semiconductor layers, is separated from the active area, and has a ring shape surrounding the active area; and a connection unit which is formed on the top of the semiconductor layers and is connected to the guard ring to apply an external voltage onto the guard ring. Therefore, the external voltage is applied onto the guard ring of the avalanche diode through the connection unit so that edge-breakdown can be reduced.
Abstract translation: 本发明涉及一种具有保护环结构的雪崩光电二极管及其制造方法，该保护环结构用于通过附着在防护环上的金属焊盘施加的外部电压来减少边缘击穿。 具有保护环结构的雪崩光电二极管包括：层叠在基板上的多个半导体层; 形成在半导体层顶部的一部分上的有源区; 形成在半导体层顶部的保护环与有源区分离，并且具有围绕有源区的环形形状; 以及连接单元，其形成在所述半导体层的顶部并连接到所述保护环，以将外部电压施加到所述保护环上。 因此，通过连接单元将外部电压施加到雪崩二极管的保护环上，从而可以减少边缘击穿。
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公开(公告)号：KR1020130139162A
公开(公告)日：2013-12-20
申请号：KR1020130051216
申请日：2013-05-07
Applicant: 한국전자통신연구원
Abstract: Provided is a focal plane array (FPA) module capable of improving the quality of an obtained three-dimensional image by adjusting the interval and size of an array of optical detectors in the FPA module for obtaining a three-dimensional image. The FPA module for obtaining a three-dimensional image according to an embodiment of the present invention comprises multiple optical detectors which detect light reflected from a monitored object, wherein the multiple optical detectors are arranged at different intervals according to the location of the optical detectors.
Abstract translation: 提供了一种焦平面阵列（FPA）模块，其能够通过调整FPA模块中的光学检测器阵列的间隔和尺寸来获得三维图像来提高所获得的三维图像的质量。 根据本发明实施例的用于获得三维图像的FPA模块包括检测从被监视对象反射的光的多个光学检测器，其中根据光学检测器的位置以不同的间隔布置多个光学检测器。
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Patent Agency Ranking
公开(公告)号：KR1020130068156A
公开(公告)日：2013-06-26
申请号：KR1020110134352
申请日：2011-12-14
Applicant: 한국전자통신연구원
CPC classification number: H04B10/614 , H04B10/0799
Abstract: PURPOSE: A device for measuring the performance of a coherent light receiver is provided to measure a common mode removal rate directly and accurately. CONSTITUTION: A device for measuring the performance of a coherent light receiver comprises a beam splitter(210), a first optical modulator(221), a variable optical attenuator(230), a second optical modulator(222), a variable optical retarder(240), a first polarization controller, a second polarization controller(252), a network analyzer(260), and a controller(270). The beam splitter splits lights received from a light source into first and second route lights. The first optical modulator receives the first route lights of the beam splitter and performs optical modulation. The variable optical attenuator controls the optical power of the output of the first optical modulator, thereby outputting. The first polarization controller transmits first output signals in which the polarization of the output of the variable optical attenuator is controlled to a coherent light receiver. The second optical modulator receives the second route lights of the beam splitter. The variable optical retarder outputs the output of the second optical modulator by delaying the time of the output of the second optical modulator. [Reference numerals] (210) Beam splitter; (221) First optical modulator; (222) Second optical modulator; (230) Variable optical attenuator; (240) Variable optical retarder; (251) First polarization controller; (252) Second polarization controller; (260) Network analyzer; (270) Controller; (AA) Electric signal
Abstract translation: 目的：提供一种用于测量相干光接收机性能的设备，用于直接和准确地测量共模移除速率。 构成：用于测量相干光接收机的性能的装置包括分束器（210），第一光调制器（221），可变光衰减器（230），第二光调制器（222），可变光延迟器 240），第一偏振控制器，第二偏振控制器（252），网络分析器（260）和控制器（270）。 分束器将从光源接收的光分成第一和第二路线灯。 第一光调制器接收分束器的第一路由光并执行光调制。 可变光衰减器控制第一光调制器的输出的光功率，从而输出。 第一偏振控制器传输第一输出信号，其中可变光衰减器的输出的极化被控制到相干光接收器。 第二光调制器接收分束器的第二路灯。 可变光学延迟器通过延迟第二光学调制器的输出时间来输出第二光学调制器的输出。 （附图标记）（210）分束器; （221）第一光调制器; （222）第二光调制器; （230）可变光衰减器; （240）可变光学延迟器; （251）第一偏振控制器; （252）第二偏振控制器; （260）网络分析仪; （270）控制器; （AA）电信号
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公开(公告)号：KR101263310B1
公开(公告)日：2013-05-13
申请号：KR1020090026352
申请日：2009-03-27
Applicant: 한국전자통신연구원
IPC: H01L31/09 , H01L29/737
CPC classification number: Y02E10/50
Abstract: 광수신기및 그형성방법이제공된다. 광수신기는기판후면에집적된렌즈, 기판전면상의광검출기및 기판전면상의이종접합바이폴라트랜지스터를포함하되, 렌즈는입사되는광신호를집광하여광검출기에전송한다.
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公开(公告)号：KR101211085B1
公开(公告)日：2012-12-12
申请号：KR1020090043174
申请日：2009-05-18
Applicant: 한국전자통신연구원
IPC: H01L27/146
Abstract: 본발명에다른고유포토다이오드이미지센서는포토다이오드, 상기포토다이오드로부터의전자를집속하는확산영역, 상기포토다이오드와상기확산영역을연결하는트랜스퍼트랜지스터및 상기확산영역으로부터신호를득출하는득출회로를포함하는적어도 2개이상의단위화소를포함하는이미지센서에있어서, 이웃한상기단위화소는상기포토다이오드가서로이웃하도록대칭적으로배치되어하나의공유포토다이오드를형성한다. 따라서, 공유포토다이오드이미지센서는성능에제한을주는암전류를발생하는소자분리막를제거할뿐만아니라, 소자분리막과관련된기본적인최소설계요구조건(간격, 면적)을제거하여, 이러한영역을포토다이오드로사용할수 있거나, 추가적인화소스케일링에이용할수 있도록함으로써포토다이오드자체의스케일링한계를획기적으로개선하고, 화소의스케일링에도픽셀성능을유지할수 있도록한다.
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公开(公告)号：KR1020120069127A
公开(公告)日：2012-06-28
申请号：KR1020100130537
申请日：2010-12-20
Applicant: 한국전자통신연구원
IPC: H01L31/107 , H01L31/18 , H01L31/02
CPC classification number: H01L31/107 , H01L31/184 , Y02E10/544 , H01L31/02027 , H01L2924/12043
Abstract: PURPOSE: A method for manufacturing an avalanche photo diode is provided to improve process efficiency by forming a guard ring area and a junction area through one diffusion process. CONSTITUTION: An epitaxy wafer is formed on the front of a substrate. A protection layer for protecting a diffusion control layer is formed on a diffusion control layer(106). An etching unit(108) is formed by etching an amplification layer(105) with a preset depth from the protection layer. A first patterning unit is formed by patterning the protection layer. A junction area and a guard ring area are formed on the amplification layer by diffusing diffusion materials on the etching unit and the first patterning unit. The diffusion control layer and the protection layer are removed. A first electrode connected to the junction area is formed on the amplification layer. A second electrode is formed on the rear of the substrate.
Abstract translation: 目的：提供一种制造雪崩光电二极管的方法，通过一个扩散过程形成保护环面积和结面积来提高工艺效率。 构成：在基板的前部形成外延晶片。 用于保护扩散控制层的保护层形成在扩散控制层（106）上。 通过从保护层蚀刻具有预定深度的放大层（105）形成蚀刻单元（108）。 通过图案化保护层形成第一图案形成单元。 在扩散层上通过在扩散材料上扩散蚀刻单元和第一图案形成单元形成接合区域和保护环区域。 去除扩散控制层和保护层。 连接到结区的第一电极形成在放大层上。 第二电极形成在基板的后部。
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公开(公告)号：KR1020110065285A
公开(公告)日：2011-06-15
申请号：KR1020100073374
申请日：2010-07-29
Applicant: 한국전자통신연구원
IPC: G01J1/44 , H01L27/146
CPC classification number: G11C27/024
Abstract: PURPOSE: A optical detector including the coupling capacitor is provided to control the movement characteristic deviation of each detectors easily by using the coupling capacitor and operating each avalanche photo diode with different bias voltage. CONSTITUTION: The optical detector(100) having a coupling capacitor includes: an avalanche photodiode(APD); a bias circuit(110); a detection circuit(120); and a coupling capacitor(Cc). The bias circuit offers the bias voltage(Vb) to one end of the avalanche photo diode. The detection circuit is connected to the other end of the avalanche photo diode and detects the photo current generated in the avalanche photo diode. The coupling capacitor is first of all connected to the fist or the other end of avalanche photo diode. The coupling voltage for driving the avalanche photo diode to the Geiger mode is offered. The coupling capacitor is formed into the fixed type. The size of the coupling voltage is varied according to the size of the overdrive voltage(Vod) offered to the coupling capacitor. The bias voltage is lower than the break down voltage of the avalanche photo diode.
Abstract translation: 目的：提供一个包括耦合电容的光学检测器，通过使用耦合电容器和操作具有不同偏置电压的每个雪崩光电二极管，轻松控制每个探测器的运动特性偏差。 构成：具有耦合电容器的光检测器（100）包括：雪崩光电二极管（APD）; 偏置电路（110）; 检测电路（120）; 和耦合电容器（Cc）。 偏置电路为雪崩光电二极管的一端提供偏置电压（Vb）。 检测电路连接到雪崩光电二极管的另一端，并检测在雪崩光电二极管中产生的光电流。 耦合电容器首先连接到雪崩光电二极管的第一端或另一端。 提供了将雪崩光电二极管驱动到盖革模式的耦合电压。 耦合电容器形成固定型。 耦合电压的大小根据提供给耦合电容器的过驱动电压（Vod）的大小而变化。 偏置电压低于雪崩光电二极管的击穿电压。
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