公开(公告)号：DE10152636A1

公开(公告)日：2003-01-30

申请号：DE10152636

申请日：2001-10-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KROENKE MATTHIAS ,  BRUCHHAUS RAINER ,  ENDERS GERHARD ,  HARTNER WALTER ,  MIKOLAJICK THOMAS ,  NAGEL NICOLAS ,  ROEHNER MICHAEL

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/108 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11507

Abstract: Semiconductor memory has capacitor devices (10-1,...., 10-4) each vertically extending from a substrate (20) and/or a passivating region (21) and/or a surface region (20a). A three dimensional arrangement or structure is formed for each capacitor device. An Independent claim is also included for a process for the production of a semiconductor memory. Preferred Features: The capacitor devices each have a first electrode arrangement (14), a second electrode arrangement (18) with a dielectric (16) arranged between the arrangements. The capacitor devices are a stacked structure of form part of a stacked structure.

公开(公告)号：DE10131626A1

公开(公告)日：2003-01-30

申请号：DE10131626

申请日：2001-06-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KROENKE MATTHIAS ,  BRUCHHAUS RAINER ,  ENDERS GERHARD ,  HARTNER WALTER ,  MIKOLAJICK THOMAS ,  NAGEL NICOLAS ,  ROEHNER MICHAEL

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11507 ,  H01L21/8239

Abstract: Production of a semiconductor memory comprises forming a semiconductor substrate (20), a passivating region (21) and/or a surface region (20a,21a) having a CMOS structure; forming capacitor arrangements (10-1, ..., 10-4) in the region of the substrate, passivating region and/or surface region; and providing first and second contact regions or plug regions (P1, P2) to contact with the capacitor arrangements. Preferred Features: The contact regions or plug regions are formed after forming the CMOS structure. Each capacitor arrangement has a first lower or bottom electrode device (14), a second upper or top electrode arrangement (18), and a dielectric (16) formed between the two electrode arrangements.

公开(公告)号：DE10131490A1

公开(公告)日：2003-01-16

申请号：DE10131490

申请日：2001-06-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KROENKE MATTHIAS ,  BRUCHHAUS RAINER ,  ENDERS GERHARD ,  HARTNER WALTER ,  MIKOLAJICK THOMAS ,  NAGEL NICOLAS ,  ROEHNER MICHAEL

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8239

Abstract: Production of capacitor arrangement comprises: removing lower layer (14) of a sequence of layers (14, 16) formed in surface region (20a) of semiconductor substrate (20) or passivating region (21) outside a region of predefined sites (K2) up to a reduced layer thickness (d); forming raised region (E) of lower layer; and forming subsequent layer (16) on lower layer, especially in the raised region. Preferred Features: The lower layer is removed by local deposition and/or local formation of a mask in the region of the predefined sites on the lower layer and by etching in the region of the mask. The layers of the layer sequence are applied in a common process step on the surface region of the substrate or on the passivating region, and then etched in a common process step and/or structured and/or after tempering.

公开(公告)号：DE19957122C2

公开(公告)日：2002-08-29

申请号：DE19957122

申请日：1999-11-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  HARTNER WALTER

IPC: H01L21/02 ,  H01L21/3105 ,  H01L21/314 ,  H01L27/115 ,  H01L27/11502 ,  H01G7/06 ,  H01G4/008 ,  H01L21/8239

公开(公告)号：DE10057444A1

公开(公告)日：2002-05-29

申请号：DE10057444

申请日：2000-11-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HARTNER WALTER ,  WEINRICH VOLKER ,  KROENKE MATTHIAS

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/8239

Abstract: Production of a capacitor arrangement comprises filling exposed intermediate regions (24) of the surface (21) of the substrate (20) with an electrically insulating intermediate layer (30) up to the level of an upper layer (18) of a capacitor device (10). Preferred Features: A contact layer (50) is applied and/or structured on the intermediate layer to provide an electrical contact with the upper layer of the capacitor device.

公开(公告)号：DE10039411A1

公开(公告)日：2002-02-28

申请号：DE10039411

申请日：2000-08-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HINTERMAIER FRANK ,  WEINRICH VOLKER ,  HARTNER WALTER ,  SCHINDLER GUENTHER ,  ENGELHARDT MANFRED

IPC: H01L21/02 ,  H01L21/311

Abstract: The invention relates to methods for structuring ferroelectric layers on semiconductor substrates. The inventive methods retain or regenerate the adherence and breakdown voltage resistance of the ferroelectric layer, which is especially significant for producing storage capacitors in large-scale integrated FeRAM and DRAM memory components.

公开(公告)号：DE59705912D1

公开(公告)日：2002-01-31

申请号：DE59705912

申请日：1997-09-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  HARTNER WALTER ,  HINTERMAIER FRANK ,  MAZURE-ESPEJO CARLOS

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8247 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11517

Abstract: A method for producing an integrated semiconductor memory configuration, in particular uses ferroelectric materials as storage dielectrics. A conductive connection between a first electrode of a storage capacitor and a selection transistor is produced only after deposition of the storage dielectric.

公开(公告)号：DE10010288C1

公开(公告)日：2001-09-20

申请号：DE10010288

申请日：2000-02-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WEINRICH VOLKER ,  KASKO IGOR ,  HARTNER WALTER ,  SCHINDLER GUENTHER

IPC: H01L27/105 ,  H01L21/02 ,  H01L21/8246 ,  H01L21/8239

Abstract: The manufacturing method has a ferroelectric layer (13) of varying thickness applied to an electrode structure (11) which has at least 2 different height levels, before application of a second electrode structure (12) to the ferroelectric layer. The different height levels are formed in the first electrode structure by formed etched edges, or by providing a step in a barrier layer (14) before deposition of the electrode structure, with a centrifugal coating process used for deposition of the ferroelectric layer.

公开(公告)号：DE10008617A1

公开(公告)日：2001-09-06

申请号：DE10008617

申请日：2000-02-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WINTERAUER FRANZ ,  HINTERMAIER FRANK ,  HARTNER WALTER ,  SCHWINDLER GUENTHER ,  WEINRICH VOLKER ,  CERVA HANS ,  HOEPFNER JOACHIM

IPC: H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8246 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11507 ,  H01G4/12 ,  H01L41/187 ,  H01L21/8239

Abstract: The invention relates to a method for producing a ferroelectric layer. According to the invention, the application of an outer electrical field facilitates the crystallisation of the material in accordance with a predetermined direction. In this way, it is possible to produce ferroelectric layers whose domains are preferably aligned in such a way that their polarisation vectors are positioned perpendicularly to the electrodes of the storage capacitor in a storage cell. As a result, the overall polarisation vector for the domains runs essentially parallel to the field of the storage capacitor while the storage device is in operation and the polarisation produced has a correspondingly high level of remanence. The level of the signal that can be read out of the storage capacitors is also correspondingly high.

公开(公告)号：DE19959711A1

公开(公告)日：2001-06-21

申请号：DE19959711

申请日：1999-12-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BEITEL GERHARD ,  SAENGER ANNETTE ,  HARTNER WALTER

IPC: C23C14/02 ,  C23C14/16 ,  C23C14/58 ,  C23C16/40 ,  H01L21/02 ,  H01L21/321 ,  H01L21/8239 ,  H01L21/768 ,  H01L21/3205 ,  C23C14/14

Abstract: Production of a structured layer comprises preparing a pre-structured substrate; applying a precious metal and a donor material containing an additive which is not a precious metal in two or more layers onto the substrate; heat treating the layers at 400-800 degrees C so that the additive diffuses into the precious metal; and chemical-mechanical polishing the alloying layer.