公开(公告)号：US20130279134A1

公开(公告)日：2013-10-24

申请号：US13862038

申请日：2013-04-12

Applicant: CANON KABUSHIKI KAISHA

Inventor： Seiji Hayashi ,  Takuya Kondo ,  Shoji Matsumoto

IPC: H05K1/02

CPC classification number: H05K1/0216 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/48227 ,  H05K1/0228 ,  H05K1/0242 ,  H05K1/0298 ,  H05K1/11 ,  H05K1/114 ,  H05K1/116 ,  H05K1/14 ,  H05K1/141 ,  H05K1/162 ,  H05K1/18 ,  H05K2201/0939 ,  H05K2201/09418 ,  H05K2201/09454 ,  H05K2201/09463 ,  H05K2201/09636 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/10734

Abstract: First and second signal wiring patterns are formed in a first conductor layer. A first electrode pad electrically connected to the first signal wiring pattern through a first via and a second electrode pad electrically connected to the second signal wiring pattern through a second via are formed in a second conductor layer as a surface layer. A third conductor layer is disposed between the first conductor layer and the second conductor layer with an insulator interposed between those conductor layers. A first pad electrically connected to the first via is formed in the third conductor layer. The first pad includes an opposed portion which overlaps the second electrode pad as viewed in a direction perpendicular to the surface of a printed board and which is opposed to the second electrode pad through intermediation of the insulator. This enables reduction of crosstalk noise caused between the signal wirings.

Abstract translation: 第一和第二信号布线图案形成在第一导体层中。 通过第一通孔电连接到第一信号布线图案的第一电极焊盘和通过第二通孔电连接到第二信号布线图案的第二电极焊盘形成在作为表面层的第二导体层中。 第三导体层设置在第一导体层和第二导体层之间，绝缘体插在这些导体层之间。 电连接到第一通孔的第一焊盘形成在第三导体层中。 第一焊盘包括与垂直于印刷电路板的表面的方向观察的与第二电极焊盘重叠并且通过绝缘体与第二电极焊盘相对的相对部分。 这使得能够减少在信号布线之间引起的串扰噪声。

公开(公告)号：US20130220662A1

公开(公告)日：2013-08-29

申请号：US13854792

申请日：2013-04-01

Applicant: Kabushiki Kaisha Toshiba

Inventor： Kenji Hasegawa ,  Tsuyoshi Kozai ,  Terunari Kanou

IPC: H05K1/02 ,  H05K5/02

CPC classification number: H05K1/02 ,  H05K1/0215 ,  H05K1/116 ,  H05K3/325 ,  H05K5/0247 ,  H05K7/142 ,  H05K9/0064 ,  H05K2201/09463 ,  H05K2201/10409

Abstract: According to an aspect of the present invention, there is provided a printed wiring board including: a substrate including an edge and a fixing hole located adjacent to the edge, the fixing hole configured to receive a bolt; and a land formed in a vicinity of the fixing hole and extending in at least a first direction and a second direction, the first direction being a direction from the fixing hole toward a center of the substrate, the second direction being direction along the edge.

Abstract translation: 根据本发明的一个方面，提供了一种印刷线路板，包括：基板，其包括边缘和邻近边缘定位的固定孔，所述固定孔构造成接收螺栓; 以及形成在所述固定孔附近并且沿至少第一方向和第二方向延伸的台阶，所述第一方向是从所述固定孔朝向所述基板的中心的方向，所述第二方向是沿着所述边缘的方向。

公开(公告)号：US20100059264A1

公开(公告)日：2010-03-11

申请号：US12470400

申请日：2009-05-21

Applicant: Kenji HASEGAWA ,  Tsuyoshi KOZAI

Inventor： Kenji HASEGAWA ,  Tsuyoshi KOZAI

IPC: H05K1/02

CPC classification number: H05K1/116 ,  H05K1/0215 ,  H05K3/325 ,  H05K3/3452 ,  H05K2201/09463 ,  H05K2201/09909 ,  H05K2201/10409 ,  H05K2201/2036

Abstract: According to an aspect of the present invention, there is provided a printed wiring board including: a substrate including a pair of edges and a fixing hole adjacent to the pair of edges and configured to receive a bolt; a land provided in a vicinity of the fixing hole and extending in a direction from the fixing hole toward a center of the substrate and along the pair of edges; and an insulating height adjuster provided between the fixing hole and the pair of edges and configured to have substantially the same height as the land.

Abstract translation: 根据本发明的一个方面，提供了一种印刷线路板，其包括：基板，包括一对边缘和与所述一对边缘相邻的固定孔，并被构造成容纳螺栓; 设置在所述固定孔附近并沿着从所述固定孔朝向所述基板的中心并沿着所述一对边缘的方向延伸的台阶; 以及设置在所述固定孔和所述一对边缘之间的绝缘高度调节器，并且构造成具有与所述平台大致相同的高度。

公开(公告)号：US07632150B2

公开(公告)日：2009-12-15

申请号：US12007017

申请日：2008-01-04

Applicant: Ming-Ta Chen

Inventor： Ming-Ta Chen

IPC: H01M2/10

CPC classification number: H01R43/0256 ,  H01M10/425 ,  H05K1/116 ,  H05K3/3405 ,  H05K3/3447 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/09463 ,  H05K2201/09854 ,  H05K2201/10818

Abstract: A printed circuit board (PCB), which can be implemented on a battery set, having a plurality of soldering holes thereon. A soldering portion and a non-soldering portion are separately arranged around each of the soldering holes on both surfaces of the PCB. Each corresponding conductive stick can respectively pierce each soldering hole and be fixed to each soldering portion of the PCB with the fused solder or move from the soldering portion to the non-soldering portion in the soldering hole. Thus, this invention provides a convenient and efficient way for assembling the PCB on the battery set or disassembling the PCB apart from the battery set.

公开(公告)号：US20080266826A1

公开(公告)日：2008-10-30

申请号：US11937358

申请日：2007-11-08

Applicant: ZHEN HOU ,  CHING-LIANG WANG

Inventor： ZHEN HOU ,  CHING-LIANG WANG

IPC: H05K7/00 ,  H01R12/00

CPC classification number: H01R43/0256 ,  H05K1/116 ,  H05K3/3447 ,  H05K2201/09463 ,  H05K2201/09709 ,  H05K2201/10689 ,  H05K2201/10696

Abstract: An exemplary assemblable substrate for an SIP includes a substrate and a group of welding pads. The substrate defines a receiving portion therein for receiving a line of pins of the SIP. The group of welding pads is formed on the substrate for electrically coupling the line of pins to the substrate; the group of welding pads being distributed around the receiving portion, two welding pads corresponding to two adjacent pins in the same line being distributed on opposing sides of the receiving portion.

Abstract translation: 用于SIP的示例性可组装衬底包括衬底和一组焊垫。 衬底限定其中的接收部分，用于接收SIP的引脚线。 一组焊垫形成在基板上，用于将引脚线电耦合到基板; 所述一组焊垫分布在接收部分周围，对应于同一直线中的两个相邻销的两个焊垫分布在接收部分的相对侧上。

公开(公告)号：US07389929B2

公开(公告)日：2008-06-24

申请号：US11442698

申请日：2006-05-26

Applicant: William H. Havens ,  Robert J. Hennick ,  John Izzo ,  Michael D. Robinson

Inventor： William H. Havens ,  Robert J. Hennick ,  John Izzo ,  Michael D. Robinson

IPC: G06K7/10

CPC classification number: G06K7/10584 ,  G06K7/10722 ,  G06K7/10801 ,  G06K7/10861 ,  G06K7/14 ,  H05K1/18 ,  H05K3/244 ,  H05K2201/09072 ,  H05K2201/09463 ,  H05K2201/0949 ,  H05K2201/09645 ,  H05K2201/09809 ,  H05K2201/10121

Abstract: An indicia decoding device can have an image sensor and a laser diode assembly configured to project laser light onto a substrate. When a trigger signal is received by the indicia decoding device, the device can calculate a delay and enable the laser diode assembly if a delay threshold is satisfied. The indicia decoding device, in one embodiment, can include a hand held housing and an imaging module carrying the image sensor.

Abstract translation: 标记解码装置可以具有被配置为将激光投射到基板上的图像传感器和激光二极管组件。 当标记解码装置接收到触发信号时，如果延迟阈值被满足，则该装置可以计算延迟并启用激光二极管组件。 在一个实施例中，标记解码装置可以包括手持外壳和承载图像传感器的成像模块。

公开(公告)号：US20070159545A1

公开(公告)日：2007-07-12

申请号：US11436946

申请日：2006-05-18

Applicant: James Wehrly ,  Ron Orris ,  Leland Szewerenko ,  Tim Roy ,  Julian Partridge ,  David Roper

Inventor： James Wehrly ,  Ron Orris ,  Leland Szewerenko ,  Tim Roy ,  Julian Partridge ,  David Roper

IPC: G06F17/50 ,  H03K19/177 ,  H04N5/335 ,  H03K19/00 ,  H01L25/00 ,  H04N3/14

CPC classification number: H01L25/18 ,  H01L23/5387 ,  H01L25/105 ,  H01L2224/49175 ,  H01L2924/15311 ,  H05K1/147 ,  H05K1/189 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3436 ,  H05K3/3447 ,  H05K2201/055 ,  H05K2201/091 ,  H05K2201/09463 ,  H05K2201/10515 ,  H05K2201/10689

Abstract: The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry to reduce footprint for the combination. A leaded IC package is disposed along the obverse side of a flex circuit. In a preferred embodiment, leads of the leaded IC package are configured to allow the lower surface of the body of the leaded IC package to contact the surface of the flex circuitry either directly or indirectly through an adhesive. A semiconductor die is connected to the reverse side of the flex circuit. In one embodiment, the semiconductor die is disposed on the reverse side of the flex while, in an alternative embodiment, the semiconductor die is disposed into a window in the flex circuit to rest directly or indirectly upon the body of the leaded IC package. Module contacts are provided in a variety of configurations. In a preferred embodiment, the leaded IC package is a flash memory and the semiconductor die is a controller.

公开(公告)号：US20070158821A1

公开(公告)日：2007-07-12

申请号：US11482325

申请日：2006-07-07

Applicant: Leland Szewerenko ,  James Douglas Wehrly ,  David L. Roper

Inventor： Leland Szewerenko ,  James Douglas Wehrly ,  David L. Roper

IPC: H01L23/12

CPC classification number: H05K3/326 ,  H01L23/13 ,  H01L23/5385 ,  H01L23/5387 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/147 ,  H05K1/182 ,  H05K1/189 ,  H05K3/3421 ,  H05K3/3436 ,  H05K3/3447 ,  H05K2201/055 ,  H05K2201/056 ,  H05K2201/091 ,  H05K2201/09463 ,  H05K2201/10515 ,  H05K2201/10689 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry. The leaded packaged IC is disposed along one side of a flex circuit. The semiconductor die is disposed along the flex circuitry and preferably is between at least a part of the flex circuitry and the body of the leaded packaged IC. Preferably, the die is attached to a conductive layer of the flex circuitry. The flex circuitry preferably employs at least two conductive layers and the leaded packaged IC and die are preferably connected to one of the conductive layers of the flex circuitry. In preferred modules, the leaded packaged IC is preferably a flash memory device and the semiconductor die is preferably a controller.

Abstract translation: 本发明提供一种使用柔性电路组合引线封装IC和半导体管芯的系统和方法。 引线封装IC沿柔性电路的一侧设置。 半导体管芯沿着柔性电路布置，并且优选地位于柔性电路的至少一部分和引线封装IC的主体之间。 优选地，管芯附接到柔性电路的导电层。 柔性电路优选地采用至少两个导电层，并且有铅封装的IC和管芯优选地连接到柔性电路的导电层中的一个。 在优选的模块中，有铅封装的IC优选地是闪存器件，并且半导体管芯优选地是控制器。

公开(公告)号：US06787443B1

公开(公告)日：2004-09-07

申请号：US10442834

申请日：2003-05-20

Applicant: David W. Boggs ,  John H. Dungan ,  Gary I. Paek ,  Daryl A. Sato

Inventor： David W. Boggs ,  John H. Dungan ,  Gary I. Paek ,  Daryl A. Sato

IPC: H01L2144

CPC classification number: H05K1/116 ,  H05K1/112 ,  H05K3/027 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/421 ,  H05K2201/09381 ,  H05K2201/09463 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/0989 ,  H05K2203/1178 ,  Y02P70/613 ,  Y10T29/49165

Abstract: An apparatus and method for providing a vented blind via in pad of a printed circuit board (PCB). A vent in the blind via in pad to allow gases formed during reflow soldering to escape from the solder joint. In one embodiment, the vent extends from the outer edge of the pad to the blind via. In another embodiment, a method includes forming a blind via in pad having a vent.

公开(公告)号：US20040020990A1

公开(公告)日：2004-02-05

申请号：US10453796

申请日：2003-06-03

Inventor： William H. Havens ,  Charles P. Barber ,  Colleen Gannon ,  Robert C. Gardiner ,  Robert J. Hennick ,  John A. Pettinelli

IPC: G06K007/10

CPC classification number: G06K7/10881 ,  G06K7/10574 ,  G06K7/10584 ,  G06K7/10722 ,  G06K7/10801 ,  G06K7/10861 ,  G06K7/1098 ,  G06K7/14 ,  G06K7/1417 ,  H05K1/18 ,  H05K3/244 ,  H05K2201/09072 ,  H05K2201/09463 ,  H05K2201/0949 ,  H05K2201/09645 ,  H05K2201/09809 ,  H05K2201/10121

Abstract: The invention is an optical reader having a plurality of imaging modules. In one method for operating a multiple imaging module reader of the invention, a second frame of image data captured via actuation of a second imaging module is automatically captured and subjected to decoding in the case an attempt to decode using a frame of image data captured via actuation of a first imaging module fails. In another embodiment, a frame of image data captured via actuation of an image sensor of a first module and actuation of illumination of a second imaging module is subjected to decoding. In another embodiment, frames of image data captured via actuation of image sensors of spaced apart modules are combined. The various modules of a multiple imaging module reader can be adapted to have different best focus positions so that a field depth of the reader is improved.