公开(公告)号：WO2013144738A2

公开(公告)日：2013-10-03

申请号：PCT/IB2013051710

申请日：2013-03-04

Applicant: NOKIA CORP

Inventor： COTTON DARRYL ,  HAQUE SAMIUL MD ,  ANDREW PIERS

IPC: H05K1/02

CPC classification number: H05K3/0064 ,  H05K1/0283 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/09045 ,  H05K2201/09109 ,  H05K2201/09263 ,  H05K2201/2036

Abstract: An apparatus and method wherein the apparatus comprises a deformable substrate (3); a conductive portion (7);and at least one support (5) configured to couple the conductive portion (7) to the deformable substrate (3) so that the conductive portion (7) is spaced from the deformable substrate (3).

Abstract translation: 一种装置和方法，其中所述装置包括可变形基板（3）; 导电部分（7）;以及至少一个支撑件（5），其构造成将导电部分（7）耦合到可变形基板（3），使得导电部分（7）与可变形基板（3）间隔开。

公开(公告)号：WO2010141295A1

公开(公告)日：2010-12-09

申请号：PCT/US2010/036282

申请日：2010-05-27

Applicant: HSIO TECHNOLOGIES, LLC ,  RATHBURN, James

Inventor： RATHBURN, James

IPC: H01L23/04

CPC classification number: H05K1/181 ,  H01L23/4985 ,  H01L2224/16 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/3011 ,  H05K1/0216 ,  H05K1/0221 ,  H05K1/0256 ,  H05K1/0274 ,  H05K1/0284 ,  H05K1/118 ,  H05K1/16 ,  H05K3/107 ,  H05K3/1258 ,  H05K3/207 ,  H05K3/246 ,  H05K3/28 ,  H05K3/4007 ,  H05K3/4664 ,  H05K3/4694 ,  H05K2201/0344 ,  H05K2201/0367 ,  H05K2201/09109 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y10T29/49155

Abstract: A compliant printed flexible circuit including a flexible polymeric film and at least one dielectric layer bonded to the polymeric film with recesses corresponding to a target circuit geometry. A conductive material is printed in at least a portion of the recesses to form a circuit geometry. At least one dielectric covering layer is printed over at least the circuit geometry. Openings can be printed in the dielectric covering layer to provide access to at least a portion of the circuit geometry.

Abstract translation: 一种柔性印刷柔性电路，包括柔性聚合物膜和至少一个与聚合物膜结合的介电层，其具有对应于目标电路几何形状的凹部。 在至少一部分凹部中印刷导电材料以形成电路几何形状。 至少一个电介质覆盖层至少印刷在电路几何形状上。 开口可以印刷在电介质覆盖层中以提供对电路几何形状的至少一部分的访问。

公开(公告)号：WO2010070771A1

公开(公告)日：2010-06-24

申请号：PCT/JP2008/073243

申请日：2008-12-19

Applicant: 古河電気工業株式会社 ,  座間 悟 ,  大賀 賢一

Inventor： 座間 悟 ,  大賀 賢一

IPC: H05K3/46 ,  H05K1/14

CPC classification number: H05K3/462 ,  H05K3/281 ,  H05K3/361 ,  H05K3/4623 ,  H05K2201/041 ,  H05K2201/058 ,  H05K2201/09109 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10666 ,  H05K2203/0455

Abstract: 　多層プリント基板１０は、スルーホール１１と、片面に形成された導体パターン１２と、スルーホールの内壁に導体パターン１２と一体に形成された導電スルーホール１４とをそれぞれ有する樹脂フィルム１５が、上下方向を同じにして複数枚重ね合わされている。複数の樹脂フィルム１５のうちの隣接する２つの樹脂フィルム間に、対向する導体パターン１２および導電スルーホール１４と金属間結合した導電体２３がそれぞれ設けられている。隣接する２つの樹脂フィルム間に別の樹脂フィルムを介在させずに、各樹脂フィルムの導体パターン１２間での層間接続が、導体パターン１２と一体の導電スルーホール１４および導電体２３を介してなされる。

Abstract translation: 在多层印刷电路板（10）中，多个树脂膜（15）的垂直方向彼此一致，彼此重叠。 每个树脂膜设置有通孔（11），在一个表面上形成的导体图案（12）和在通孔的内壁上与导体图案（12）整体形成的导电通孔（14）。 在树脂薄膜（15）之间的两个相邻的树脂薄膜之间设置导电体（23），每个导电体（23）与面向导体图案（12）和导电通孔（14）金属间结合。 树脂膜的导体图案（12）之间的层间连接通过与导体图案（12）一体化的导电通孔（14）和导电体（23）进行，而在两个相邻的树脂膜之间不具有另一个树脂膜 。

公开(公告)号：WO2008095338A1

公开(公告)日：2008-08-14

申请号：PCT/CN2007/000379

申请日：2007-02-05

Applicant: 巨擎科技股份有限公司

Inventor： 杨之光

IPC: H05K1/14 ,  H05K3/36 ,  H05K3/46 ,  H01L23/48 ,  H01L23/12 ,  H01L23/50

CPC classification number: H05K1/142 ,  H01L21/4857 ,  H01L23/5383 ,  H01L23/5385 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19107 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/361 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H01L2924/00

Abstract: A mutual connection structure between multi-layer baseboards and manufacturing method thereof are provided. The structure includes a first multi-layer baseboard (300) and a second multi-layer baseboard (400). The first multi-layer baseboard has a first metal layer (11), a first dielectric layer (13) and a hole (1,2,3). The end edge of the first metal layer is connected to that of the corresponding first dielectric layer, and separated from the end edge of the other adjacent first metal layers (14,17) and dielectric layers (16,19). The second multi-layer baseboard has a second metal layer (21) and a second dielectric layer (23). The end edge of the second metal layer is connected to that of the corresponding second dielectric layer, and separated from the end edge of the other adjacent second metal layers (24,27) and dielectric layers (26,29). The hole are formed on the end of the first dielectric layer of the first multi-layer baseboard, and have a conductive portion therein. The conductive portion of the first metal layer is bonded to the second metal layer of the second multi-layer baseboard.

公开(公告)号：WO2007132751A1

公开(公告)日：2007-11-22

申请号：PCT/JP2007/059710

申请日：2007-05-11

Applicant: 三井化学株式会社 ,  塩田 剛史 ,  山田 一博

Inventor： 塩田 剛史 ,  山田 一博

IPC: G02B6/122 ,  H05K1/02

CPC classification number: G02B6/10 ,  H05K1/0274 ,  H05K2201/09109

Abstract: 　本発明は、高耐屈曲性を有する光電気混載フィルムを提供する。 　具体的に本発明は、光導波路フィルム、ならびに前記光導波路フィルムの上に電気配線フィルムを有する光電気混載フィルムであって、前記光電気混載フィルムはその両端部の間に前記電気配線フィルムと前記光導波路フィルムが固着されていない離間部を有し、当該離間部において前記光導波路フィルムは長手方向に延びるスリットを有し、かつ当該スリットは前記光導波路フィルムを貫通している光電気混載フィルムに関する。

Abstract translation: 具有高耐弯曲性的光电复合膜。 光电混合膜在光波导膜上具有光波导膜和电布线膜。 光电混合膜在其相对端之间具有分离部分，其中电布线膜和光波导膜彼此不固定。 光波导膜在分离部分具有沿纵向方向延伸的狭缝，并且狭缝穿透光波导膜。

公开(公告)号：WO2003043391A1

公开(公告)日：2003-05-22

申请号：PCT/US2002/034475

申请日：2002-10-28

Applicant: MOTOROLA, INC., A CORPORATION OF THE STATE OF DELAWARE

Inventor： MOORE, Kevin, S. ,  GALL, Thomas, P.

IPC: H05K1/09

CPC classification number: H05K3/4691 ,  H05K1/0278 ,  H05K1/0366 ,  H05K3/0061 ,  H05K3/28 ,  H05K2201/09109 ,  H05K2201/09745 ,  H05K2203/302 ,  Y10T29/49135

Abstract: A flexible circuit (100) includes a first circuit path portion (110) and a second rigid circuit path portion (140) to which electronic components (102) may be coupled. Each circuit path portion (110 and 140) including a resin layer (112 and 142) and an adjacent conductive layer (114 and 144). Each circuit path portion (110 and 140) defining a gap (120 and 150) substantially running along a line corresponding to a desired bend location. A central circuit path portion (130) is disposed between the first circuit path portion (110) and the second rigid circuit path portion (140) and includes a first conductive layer (134) in electrical communication with the first circuit path portion (110) and a second conductive layer (136) in electrical communication with the second rigid circuit path portion (140), so as to provide electrical communication across the gaps (120 and 150). A metal plate (160) is disposed adjacent the second rigid circuit path portion (140).

Abstract translation: 柔性电路（100）包括第一电路路径部分（110）和第二刚性电路路径部分（140），电子部件（102）可以耦合到该第一电路路径部分。 每个电路路径部分（110和140）包括树脂层（112和142）和相邻的导电层（114和144）。 每个电路路径部分（110和140）限定基本上沿着对应于期望的弯曲位置的线行进的间隙（120和150）。 中心电路路径部分（130）设置在第一电路路径部分（110）和第二刚性电路路径部分（140）之间，并包括与第一电路路径部分（110）电连通的第一导电层（134） 以及与所述第二刚性电路路径部分（140）电连通的第二导电层（136），以便跨越所述间隙（120和150）提供电连通。 金属板（160）设置成邻近第二刚性电路路径部分（140）。

公开(公告)号：WO98059286A1

公开(公告)日：1998-12-30

申请号：PCT/US1998/012835

申请日：1998-06-19

IPC: H05K1/02 ,  H05K1/00 ,  G06F1/00 ,  H05K1/14 ,  H05K5/00

CPC classification number: H05K1/028 ,  H05K2201/0133 ,  H05K2201/09109 ,  H05K2201/10204 ,  H05K2201/10598 ,  H05K2201/2027

Abstract: An assembly (5) and method for extending the durability and life span of flexible circuitry by limiting the bend radius of the flexible circuitry and distributing the flexure point about an extended portion of the circuitry. An assembly (5) comprises one or more flex limiting members (10, 20, 30, 40) associated with and integrated between the layers of flexible circuitry laminate. A fastener (60) is affixed to the flexible circuitry laminate, operatively coupling the one or more flex-limiting members (10, 20, 30, 40) in position adjacent the flexible circuitry laminate. The flex-limiting member (10, 20, 30, 40) limits flexure of the circuitry, during each individual bend, to or below a predetermined angle, thereby decreasing the rate of failure in the circuitry, for example via short circuit, as a result of repeated or excessive bending.

Abstract translation: 一种用于通过限制柔性电路的弯曲半径并且围绕电路的延伸部分分布挠曲点来延长柔性电路的耐久性和寿命的组件（5）和方法。 组件（5）包括一个或多个柔性限制构件（10,20,30,40），其与柔性电路层压板的层相关联并且被集成在柔性电路层叠体的层之间。 紧固件（60）固定到柔性电路层压板上，可操作地将一个或多个弯曲限制构件（10,20,30,40）与位于柔性电路层压板相邻的位置联接。 柔性限制构件（10,20,30,40）将每个单独弯曲期间的电路的弯曲限制在或低于预定角度，从而降低电路中的故障率，例如经由短路，作为 重复或过度弯曲的结果。

公开(公告)号：WO98054941A1

公开(公告)日：1998-12-03

申请号：PCT/US1998/004527

申请日：1998-03-09

IPC: H01L23/473 ,  H05K1/18 ,  H05K7/20

CPC classification number: H01L23/473 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0272 ,  H05K1/189 ,  H05K7/20345 ,  H05K7/20927 ,  H05K2201/051 ,  H05K2201/064 ,  H05K2201/09109 ,  Y10S165/908 ,  H01L2924/00

Abstract: The apparatus includes a flexible printed wiring device (18) having a region sized to receive the electronic component (10) and a channel (28) disposed within the flexible printed wiring device. The channel has an inlet end (32) and an outlet end (34) and has an orifice (36) disposed therein. The inlet end receives a fluid, the fluid is distributed to the orifice via the channel and the orifice directs the fluid towards the region, so that the fluid is in direct contact with the electronic component when the electronic component is disposed in the region.

Abstract translation: 该装置包括柔性印刷布线装置（18），其具有尺寸适于容纳电子部件（10）的区域和设置在柔性印刷布线装置内的通道（28）。 通道具有入口端（32）和出口端（34），并且在其中设置有孔口（36）。 入口端接收流体，流体经由通道分配到孔口，并且孔口将流体引向区域，使得当电子部件设置在该区域中时，流体与电子部件直接接触。

公开(公告)号：WO1997000537A1

公开(公告)日：1997-01-03

申请号：PCT/US1996006373

申请日：1996-05-03

Applicant: MINNESOTA MINING AND MANUFACTURING COMPANY

Inventor： MINNESOTA MINING AND MANUFACTURING COMPANY ,  SCHUELLER, Randolph, D. ,  WINDSCHITL, David, J.

IPC: H01L23/498

CPC classification number: H05K3/363 ,  H01L23/49816 ,  H01L24/50 ,  H01L2924/14 ,  H05K1/0271 ,  H05K3/0058 ,  H05K3/326 ,  H05K3/4007 ,  H05K2201/0397 ,  H05K2201/09109 ,  H05K2201/09172 ,  H05K2201/10681 ,  H05K2201/10734 ,  H05K2203/041 ,  H01L2924/00

Abstract: A flexible circuit construction includes a polymeric sheet, via holes in the sheet and metal circuitry disposed on the sheet. The circuitry terminates at a cantilever end partially spanning the via hole to which a solder ball is subsequently attached. The cantilever end allows the solder ball to move relative to the flexible circuit and thus compensate for misalignment and differential thermal expansion effects.

Abstract translation: 柔性电路结构包括聚合物片材，片材中的通孔和设置在片材上的金属电路。 电路终止于部分跨越随后连接焊球的通孔的悬臂端。 悬臂端允许焊球相对于柔性电路移动，从而补偿不对准和差分热膨胀效应。

公开(公告)号：EP2120517B1

公开(公告)日：2018-08-01

申请号：EP07702270.5

申请日：2007-02-05

Applicant: Princo Corp.

Inventor： YANG, Chihkuang

IPC: H05K1/14 ,  H05K3/36 ,  H05K3/46 ,  H01L23/48 ,  H01L23/12 ,  H01L23/50

CPC classification number: H05K1/142 ,  H01L21/4857 ,  H01L23/5383 ,  H01L23/5385 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19107 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/361 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H01L2924/00

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.