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    Printed circuit board for electrical devices having RF components, particularly for mobile radio telecommunication devices
    71.
    发明授权
    Printed circuit board for electrical devices having RF components, particularly for mobile radio telecommunication devices 有权
    具有RF部件的电气设备的印刷电路板，特别是用于移动无线电通信设备

    公开(公告)号：US06370034B1

    公开(公告)日：2002-04-09

    申请号：US09381041

    申请日：1999-09-13

    Applicant: Georg Busch

    Inventor： Georg Busch

    IPC: H05K114

    CPC classification number: H05K1/0224 ,  H05K1/0237 ,  H05K1/114 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0715 ,  H05K2201/092 ,  H05K2201/093 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09845 ,  H05K2203/1438

    Abstract: A printed circuit board for electrical devices having RF components, particularly for mobile radio telecommunication devices, wherein to increase the packing density of electronic circuits and conductor-track structures on such circuit board, a “micro via” coating is initially applied to one or both sides of a printed circuit board assembly. This “micro via” coating then has, in particular, RF circuits and RF conductor-track structures applied to at least part of its surface. Finally, the RF circuits and RF conductor-track structures are protected in relation to an RF ground coating of the printed circuit board assembly by barrier areas arranged in an assembly coating, situated directly below the “micro via” coating, of the printed circuit board assembly against interfering influences which impair the RF parameters, to be set in each case, of the RF circuits and RF conductor-track structures.

    Abstract translation: 一种用于具有RF组件的电子设备的印刷电路板，特别是用于移动无线电通信设备的电子设备，其中为了增加电路板和导体轨道结构在这种电路板上的堆积密度，“微通孔”涂层最初被应用于一个或两个 印刷电路板组件的侧面。 这种“微通孔”涂层尤其具有应用于其表面的至少一部分的RF电路和RF导体轨迹结构。 最后，射频电路和RF导体轨道结构相对于印刷电路板组件的射频接地涂层被保护，该屏蔽区布置在布置在印刷电路板的“微孔”涂层正下方的组装涂层中 可以防止RF电路和RF导体轨道结构中的RF参数的干扰影响。

    Printed-circuit substrate and method of making thereof
    75.
    发明授权
    Printed-circuit substrate and method of making thereof 失效
    印刷电路基板及其制造方法

    公开(公告)号：US5079065A

    公开(公告)日：1992-01-07

    申请号：US502807

    申请日：1990-04-02

    Applicant: Shimizu Masakazu ,  Koji Udagawa ,  Ishiguro Yousuke

    Inventor： Shimizu Masakazu ,  Koji Udagawa ,  Ishiguro Yousuke

    IPC: B32B27/04 ,  H05K1/05 ,  H05K3/40 ,  H05K3/46

    CPC classification number: H05K3/4652 ,  B32B27/04 ,  H05K1/056 ,  H05K3/4608 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/092 ,  H05K2201/096 ,  H05K2201/09845 ,  H05K2203/063 ,  H05K3/4038 ,  H05K3/4069 ,  Y10S428/901 ,  Y10T156/10 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/31678

    Abstract: The present invention is directed toward a printed-circuit substrate comprisng a first layer having through holes formed through a sheet impregnated with resin which shows a half-hardened property at the time of impregnation, a first electrically conductive circuit provided on the sheet, and a second layer having an electrically conductive circuit provided on either a metal or resin substrate. The first and second layers are pressure-stuck to each other and the through holes are filled with an electrically conductive material. The present invention is also directed to a method of making a printed-circuit substrate comprising the steps of: forming through holes and a first electrically conductive circuit respectively throgh and on at least one layer of a sheet impregnated with resin which shows a half-hardened property at the time of impregnation, thereby forming a first layer; forming a second electrically conductive circuit on an insulating plate having through holes formed therein and plating said through holes and opposite surfaces of the insulating plate, thereby forming a second layer; heat sticking said first layer onto said second layer; and filling said through holes with an electrically conductive material, thereby electrically connecting the first and second electrically conductive circuits.

    Abstract translation: 本发明涉及一种印刷电路基板，其包括具有通过浸渍有树脂的片材形成的通孔的第一层，其在浸渍时显示出半硬化特性，设置在片材上的第一导电电路和 第二层具有设置在金属或树脂基板上的导电电路。 第一层和第二层彼此压力粘合，并且通孔填充有导电材料。 本发明还涉及一种制造印刷电路基板的方法，该方法包括以下步骤：分别形成通孔和第一导电电路，并且在至少一层浸渍有树脂的薄片上形成半导体 浸渍时的特性，由此形成第一层; 在其上形成有通孔的绝缘板上形成第二导电电路，并对绝缘板的所述通孔和相对表面进行电镀，从而形成第二层; 将所述第一层热粘附到所述第二层上; 并用导电材料填充所述通孔，从而电连接第一和第二导电电路。

    Method of making multilayer pc board using polymer thick films
    76.
    发明授权
    Method of making multilayer pc board using polymer thick films 失效
    使用聚合物厚膜制作多层印刷电路板的方法

    公开(公告)号：US4854040A

    公开(公告)日：1989-08-08

    申请号：US212321

    申请日：1988-06-27

    Applicant: Joseph A. Turek

    Inventor： Joseph A. Turek

    IPC: H05K1/09 ,  H05K1/11 ,  H05K1/16 ,  H05K3/24 ,  H05K3/34 ,  H05K3/42 ,  H05K3/46

    CPC classification number: H05K3/4664 ,  H05K1/116 ,  H05K1/162 ,  H05K1/095 ,  H05K2201/0209 ,  H05K2201/092 ,  H05K2201/09309 ,  H05K2203/044 ,  H05K2203/0571 ,  H05K2203/1394 ,  H05K3/243 ,  H05K3/3447 ,  H05K3/3452 ,  H05K3/3468 ,  H05K3/3473 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4602 ,  Y10T29/49156 ,  Y10T29/49165

    Abstract: A multilayer printed circuit board which reliably and economically marries conventional copper clad printed circuit board technology with polymeric conductors and insulators. Reliability is enhanced by forming all solder pads of copper, providing conductive tails on solder pads which are to be connected by polymeric inks, and ultimately forming a solder resist over all but the solder pads. As a result, polymer inks can be applied to both sides of the board, and the completed board can be subject to conventional solder dipping or wave soldering operations. According to one feature of the invention, a thin dielectric layer can be applied as intermediate to planar conductive layers which form a power plane having built-in distributed capacitance for decoupling.

    Abstract translation: 一种多层印刷电路板，可靠且经济地将传统的铜包层印刷电路板技术与聚合物导体和绝缘体结合在一起。 通过形成铜的所有焊盘来提高可靠性，在焊盘上提供导电尾部，这些焊盘将通过聚合物墨水连接，并最终在除焊盘之外的所有焊料上形成阻焊剂。 因此，聚合物油墨可以应用于板的两侧，并且完成的板可以进行常规焊料浸渍或波峰焊操作。 根据本发明的一个特征，可以将薄介电层作为中间层应用于形成具有用于去耦的内置分布电容的功率平面的平面导电层。

    Multilayer circuit board construction and method
    77.
    发明授权
    Multilayer circuit board construction and method 失效
    多层电路板结构及方法

    公开(公告)号：US4211603A

    公开(公告)日：1980-07-08

    申请号：US901904

    申请日：1978-05-01

    Applicant: Douglas A. Reed

    Inventor： Douglas A. Reed

    IPC: H05K3/10 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  C23F1/02

    CPC classification number: H05K3/429 ,  H05K3/4602 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2203/1476 ,  H05K3/108 ,  H05K3/181 ,  H05K3/426 ,  Y10S428/901 ,  Y10T29/49165

    Abstract: Multilayer circuit boards having large area through-hole electrical connections are provided by a process that begins with the fabrication by known means of a drilled and through-hole plated single layer board. Next, a layer of insulating material is applied to either side of the board, leaving at least the through-hole plating exposed. A continuous layer of metal is then deposited on the body, completely covering the insulating layer and through-hole plating. Finally, the deposited metal layer is selectively masked and etched to form conductive circuit patterns on the insulating layer, overlying the original circuit patterns and electrically connected to them by the multiple layer through-hole plating.

    Abstract translation: 具有大面积通孔电连接的多层电路板由通过已知的钻孔和通孔电镀单层板的制造开始的工艺提供。 接下来，将一层绝缘材料施加到板的任一侧，至少留下通孔板暴露。 然后将连续的金属层沉积在主体上，完全覆盖绝缘层和通孔电镀。 最后，沉积的金属层被选择性地掩蔽和蚀刻，以在绝缘层上形成导电电路图案，覆盖原始电路图案，并通过多层通孔电镀电连接到它们。

    Printed board, printed board unit and rise amount detecting method of conductor
    80.
    发明专利
    Printed board, printed board unit and rise amount detecting method of conductor 有权
    打印板，打印板单元和上升量检测导体的方法

    公开(公告)号：JP2008172003A

    公开(公告)日：2008-07-24

    申请号：JP2007003529

    申请日：2007-01-11

    Applicant: Fujitsu Ltd ,  富士通株式会社

    Inventor： SUEHIRO MITSUO

    IPC: H05K3/34 ,  H05K1/11 ,  H05K1/18

    CPC classification number: G01R31/048 ,  H05K1/0268 ,  H05K3/3447 ,  H05K3/3468 ,  H05K2201/092 ,  H05K2201/09781 ,  H05K2203/163 ,  Y10T29/41

    Abstract: PROBLEM TO BE SOLVED: To provide a printed board and a printed board unit by which a rise amount of a conductor can securely be detected. SOLUTION: A through hole 23 of a board 14 partitions a space by an insulator. The through hole 23 receives a lead terminal 28 of an electronic component 15. The lead terminal 28 is brought into contact with the conductor 29. The conductor 29 is exposed at least on the first face or the second face of the board 14. Conductor patterns 24, 25, 26 and 27 face the space in the through hole 23 from between arbitrary insulating layers 17. The conductor patterns 24, 25, 26 and 27 are connected to conductive materials 33, 34, 37 and 38 exposed at least in the first face or the second face of the board 14. The presence or absence of the establishment of conduction is detected between the lead terminal 28 and one of the conductive materials 33, 34, 37 and 38. When conduction is detected, it is confirmed that the conductor 29 is raised to positions of the conductive materials 33, 34, 37 and 38. The rise amount of the conductor 29 is securely detected. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供可以可靠地检测导体的上升量的印刷电路板和印刷电路板单元。 解决方案：板14的通孔23通过绝缘体隔开空间。 通孔23接收电子部件15的引线端子28.引线端子28与导体29接触。导体29至少暴露在板14的第一面或第二面上。导体图案 24,25,26和27从任意绝缘层17面对通孔23中的空间。导体图案24,25,26和27与导电材料33,34,37和38至少暴露于第一 面或板的第二面。在引线端子28和导电材料33,34,37和38中的一个之间检测导通的建立的存在与否。当检测到传导时，确认 导体29升高到导电材料33,34,37和38的位置。牢固地检测导体29的上升量。 版权所有（C）2008，JPO＆INPIT

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