Abstract:
본 발명은 그 구조가 간단하고 간단한 제조공정으로 용이하게 제조될 수 있는 디스플레이 장치 및 이의 제조 방법을 제공하는 것을 목적으로 하며, 이 목적을 달성하기 위하여 본 발명은, 소정의 간격을 두고 이격되며 서로 마주보는 제1기판 및 제2기판과, 상기 제1기판 및 상기 제2기판과 함께 발광셀을 한정하는 격벽과, 상기 발광셀 내에 배치되는 애노드전극과, 상기 제1기판 및 상기 제2기판 중 어느 하나의 안쪽 면에 배치되는 도전성 실리콘층과, 적어도 일부가 상기 도전성 실리콘층에 배치되는 산화된 다공성 실리콘층과, 상기 발광셀 내에 배치되는 형광체층과, 상기 발광셀 내에 있는 가스를 포함하는 디스플레이 장치 및 이의 제조 방법을 제공한다.
Abstract:
According to one embodiment, an electron emitting element includes a first region, a second region, and a third region. The first region includes a semiconductor including a first element of an n-type impurity. The second region includes diamond. The diamond includes a second element including at least one selected from the group consisting of nitrogen, phosphorous, arsenic, antimony, and bismuth. The third region is provided between the first region and the second region. The third region includes Alx1Ga1-x1N (0
Abstract:
A semiconductor power handling device, includes a cathode pillar, a gate surrounding the cathode pillar, and an anode spaced from the cathode by a nano-vacuum gap. An array of semiconductor power handling devices, each comprising a cathode pillar, a gate surrounding the cathode pillar, and an anode spaced from the cathode pillar by a nano-vacuum gap. The semiconductor power handling devices can be arranged as rows and columns and can be interconnected to meet the requirements of various applications. The array of power handling devices can be fabricated on a single substrate.
Abstract:
A horizontal multilayer junction-edge field emitter includes a plurality of vertically-stacked multilayer structures separated by isolation layers. Each multilayer structure is configured to produce a 2-dimensional electron gas at a junction between two layers within the structure. The emitter also includes an exposed surface intersecting the 2-dimensional electron gas of each of the plurality of vertically-stacked multilayer structures to form a plurality of effectively one-dimensional horizontal line sources of electron emission.
Abstract:
In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.
Abstract:
Some embodiments of vacuum electronics call for nanoscale field-enhancing geometries. Methods and apparatus for using nanoparticles to fabricate nanoscale field-enhancing geometries are described herein. Other embodiments of vacuum electronics call for methods of controlling spacing between a control grid and an electrode on a nano- or micron-scale, and such methods are described herein.
Abstract:
Some embodiments of vacuum electronics call for nanoscale field-enhancing geometries. Methods and apparatus for using nanoparticles to fabricate nanoscale field-enhancing geometries are described herein. Other embodiments of vacuum electronics call for methods of controlling spacing between a control grid and an electrode on a nano- or micron-scale, and such methods are described herein.
Abstract:
A horizontal multilayer junction-edge field emitter includes a plurality of vertically-stacked multilayer structures separated by isolation layers. Each multilayer structure is configured to produce a 2-dimensional electron gas at a junction between two layers within the structure. The emitter also includes an exposed surface intersecting the 2-dimensional electron gas of each of the plurality of vertically-stacked multilayer structures to form a plurality of effectively one-dimensional horizontal line sources of electron emission.
Abstract:
An electron emission source includes a first electrode, a semiconductor layer, an insulating layer, and a second electrode stacked in that sequence, wherein an electron collection layer is sandwiched between the semiconductor layer and the insulating layer, the electron collection layer is in contact with the semiconductor layer and the insulating layer, and the electron collection layer is a conductive layer to collect electrons.