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    INTEGRATED CIRCUIT HAVING PAIRS OF PARALLEL COMPLEMENTARY FINFETS
    3.
    发明公开
    INTEGRATED CIRCUIT HAVING PAIRS OF PARALLEL COMPLEMENTARY FINFETS 有权
    集成电路对平行互补FinFET的

    公开(公告)号：EP1639648A4

    公开(公告)日：2007-05-30

    申请号：EP04777432

    申请日：2004-06-30

    Applicant: IBM

    Inventor： BRYANT ANDRES ,  CLARK WILLIAM F ,  FRIED DAVID M ,  JAFFE MARK D ,  NOWAK EDWARD J ,  PEKARIK JOHN J ,  PUTNAM CHRISTOPHER S

    IPC: H01L29/06 ,  H01L21/00 ,  H01L21/308 ,  H01L21/336 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/12 ,  H01L29/76 ,  H01L29/786

    CPC classification number: H01L21/84 ,  H01L21/3086 ,  H01L21/3088 ,  H01L27/1203 ,  H01L29/66795 ,  H01L29/785 ,  Y10S438/947

    Abstract: A method and structure for an integrated circuit structure that utilizes complementary fin-type field effect transistors (FinFETs) is disclosed. The invention has a first-type of FinFET which includes a first fin (100), and a second-type of FinFET which includes a second fin (102) running parallel to the first fin (100). The invention also has an insulator fin positioned between the source/drain regions (130) of the first first-type of FinFET and the second-type of FinFET. The insulator fin has approximately the same width dimensions as the first fin (100) and the second fin (102), such that the spacing between the first-type of FinFET and the second-type of FinFET is approximately equal to the width of one fin. The invention also has a common gate (106) formed over channel regions of the first-type of FinFET and the second-type of FinFET. The gate (106) includes a first impurity doping region adjacent the first-type of FinFET and a second impurity doping region adjacent the second-type of FinFET. The differences between the first impurity doping region and the second impurity doping region provide the gate with different work functions related to differences between the first-type of FinFET and the second-type of FinFET. The first fin (100) and the second fin (102) have approximately the same width.

    Pixel sensor cell of variable dynamic range, design structure and method
    4.
    发明专利
    Pixel sensor cell of variable dynamic range, design structure and method 有权
    可变动态范围的像素传感器单元，设计结构和方法

    公开(公告)号：JP2010233216A

    公开(公告)日：2010-10-14

    申请号：JP2010049341

    申请日：2010-03-05

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： ELLIS-MONAGHAN JOHN JOSEPH ,  MUSANTE CHARLES FRANCIS ,  JAFFE MARK D

    IPC: H04N5/335 ,  H01L27/146

    CPC classification number: H04N5/37452 ,  H01L27/14609 ,  H04N5/35581 ,  H04N5/3575

    Abstract: PROBLEM TO BE SOLVED: To provide a pixel sensor cell enhanced in dynamic range ability.
    SOLUTION: The pixel sensor cell including a column circuit, a design structure for fabricating the pixel sensor cell including the column circuit and a method for operating the pixel sensor cell including the column circuit are predicated upon the measurement of multiple reference data point and signal data point pairs from a floating diffusion at a variable capacitance. The variable capacitance is provided by excluding or including a transfer gate transistor capacitance in addition to a floating diffusion capacitance. Such a variable capacitance provides variable dynamic ranges for the pixel sensor cell including the column circuit.
    COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题：提供增强动态范围能力的像素传感器单元。 解决方案：包括列电路的像素传感器单元，用于制造包括列电路的像素传感器单元的设计结构和用于操作包括列电路的像素传感器单元的方法基于多个参考数据点的测量 并以可变电容从浮动扩散信号数据点对。 通过排除或包括传输栅极晶体管电容以及浮动扩散电容来提供可变电容。 这种可变电容为包括列电路的像素传感器单元提供了可变的动态范围。 版权所有（C）2011，JPO＆INPIT

    Pixel sensor having doped isolation structure sidewall
    5.
    发明专利
    Pixel sensor having doped isolation structure sidewall 有权
    具有分离隔离结构的PIXEL传感器

    公开(公告)号：JP2006339643A

    公开(公告)日：2006-12-14

    申请号：JP2006148898

    申请日：2006-05-29

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： ADKISSON JAMES W ,  JAFFE MARK D ,  LEIDY ROBERT K

    IPC: H01L27/146

    CPC classification number: H01L27/14603 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14683

    Abstract: PROBLEM TO BE SOLVED: To provide an isolation structure used to isolate a pixel sensor device including a selectively doped sidewall.
    SOLUTION: A new pixel sensor structure formed on a first conductive-type substrate includes a second conductive-type photosensitive device and a first conductive-type surface pinning layer 180a. The isolation structure 101a is formed adjacent to a photosensitive device pinning layer. The isolation structure includes a dopant region containing a first conductive-type material selectively formed along sidewalls 105a, 105b of the isolation structure where the surface pinning layer is adapted so as to electrically connected to a substrate 150 located beneath. A suitable method for forming the dopant region selectively formed along the sidewall of the isolation structure includes an externally diffusing process that the dopant material present in a material layer formed and doped along a selected portion of the isolation structure is driven into the substrate located beneath during annealing.
    COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供用于隔离包括选择性掺杂侧壁的像素传感器装置的隔离结构。 解决方案：形成在第一导电型衬底上的新的像素传感器结构包括第二导电型光敏器件和第一导电型表面钉扎层180a。 隔离结构101a形成在与感光装置钉扎层相邻的位置。 隔离结构包括掺杂区域，该掺杂剂区域包含选择性地沿隔离结构的侧壁105a，105b形成的第一导电型材料，其中表面钉扎层适于电连接到位于下面的基底150。 用于形成沿着隔离结构的侧壁选择性形成的掺杂剂区域的合适方法包括外部扩散过程，其中存在于沿着隔离结构的选定部分形成并掺杂的材料层中的掺杂剂材料被驱动到位于下面的衬底中 退火。 版权所有（C）2007，JPO＆INPIT

    Pixel sensor cell including light shield and method for fabricating the same
    6.
    发明专利
    Pixel sensor cell including light shield and method for fabricating the same 审中-公开
    像素传感器单元包括光屏蔽及其制造方法

    公开(公告)号：JP2010212668A

    公开(公告)日：2010-09-24

    申请号：JP2010025483

    申请日：2010-02-08

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： JAFFE MARK D ,  GAMBINO JEFFREY P ,  ELLIS-MONAGHAN JOHN JOSEPH ,  RASSEL RICHARD JOHN

    IPC: H01L27/146 ,  H01L27/14 ,  H04N5/335 ,  H04N101/00

    CPC classification number: H01L27/14689 ,  H01L27/14609 ,  H01L27/14623 ,  H01L27/1464

    Abstract: PROBLEM TO BE SOLVED: To provide CMOS image sensor pixel sensor cells, methods for fabricating the pixel sensor cells, and design structures for fabricating the pixel sensor cells. SOLUTION: The CMOS image sensor cells are designed to allow for back side illumination in global shutter mode by providing light shielding from back side illumination of at least one transistor within each pixel sensor cell. In a first particular generalized embodiment, a light blocking layer is located and formed interposed between a first semiconductor layer including a photoactive region and a second semiconductor layer including at least a second transistor or a floating diffusion region shielded by the light blocking layer. In a second generalized embodiment, a thin film transistor and a metal-insulator-metal capacitor are used in place of the floating diffusion region, and are arranged, shielded in a dielectric-isolated metallization stack over a carrier substrate. COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：提供CMOS图像传感器像素传感器单元，用于制造像素传感器单元的方法以及用于制造像素传感器单元的设计结构。 解决方案：CMOS图像传感器单元被设计成通过在每个像素传感器单元内提供来自至少一个晶体管的背面照明的光屏蔽来允许在全局快门模式中进行背面照明。 在第一特定广义实施例中，遮光层位于包括光活性区域的第一半导体层和至少包括第二晶体管或由遮光层屏蔽的浮动扩散区域的第二半导体层之间并形成。 在第二广义实施例中，使用薄膜晶体管和金属 - 绝缘体 - 金属电容器来代替浮动扩散区域，并且被布置成在载体衬底上的介电隔离金属化堆叠中被屏蔽。 版权所有（C）2010，JPO＆INPIT

    CMOS IMAGER OF ELIMINATING HIGH REFLECTIVITY INTERFACES
    8.
    发明申请
    CMOS IMAGER OF ELIMINATING HIGH REFLECTIVITY INTERFACES 审中-公开
    消除高反射性界面的CMOS图像

    公开(公告)号：WO2006071540A3

    公开(公告)日：2007-04-12

    申请号：PCT/US2005045328

    申请日：2005-12-14

    Applicant: IBM ,  ADKISSON JAMES W ,  GAMBINO JEFFREY P ,  JAFFE MARK D ,  LEIDY ROBERT K ,  RASSEL RICHARD J ,  STAMPER ANTHONY K

    Inventor： ADKISSON JAMES W ,  GAMBINO JEFFREY P ,  JAFFE MARK D ,  LEIDY ROBERT K ,  RASSEL RICHARD J ,  STAMPER ANTHONY K

    IPC: H01L29/04

    CPC classification number: H01L27/14636 ,  H01L21/76819 ,  H01L21/76834 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14645 ,  H01L27/14683

    Abstract: An image sensor (20) and method of fabrication wherein the sensor includes Copper (Cu) metallization levels (135a, 135b) allowing for incorporation of a thinner interlevel dielectric stack (130a-130c) to result in a pixel array (100) exhibiting increased light sensitivity. The image sensor includes structures having a minimum thickness of barrier layer metal (132a, 132b) that traverses the optical path of each pixel in the sensor array or, that have portions (50) of barrier layer metal selectively removed from the optical paths of each pixel, thereby minimizing reflectance. That is, by implementing various block or single mask methodologies, portions of the barrier layer metal are completely removed at locations of the optical path for each pixel in the array. In a further embodiment, the barrier metal layer (142) may be formed atop the Cu metallization by a self-aligned deposition.

    Abstract translation: 一种图像传感器（20）及其制造方法，其中传感器包括铜（Cu）金属化水平（135a，135b），允许结合更薄的层间电介质堆叠（130a-130c）以产生呈现增加的像素阵列（100） 光敏感。 图像传感器包括具有穿过传感器阵列中的每个像素的光路的阻挡层金属（132a，132b）的最小厚度的结构，或者具有从每个的光路中选择性地去除的阻挡层金属的部分（50） 像素，从而最小化反射率。 也就是说，通过实现各种块或单掩模方法，在阵列中的每个像素的光路的位置处完全去除了阻挡层金属的部分。 在另一个实施例中，阻挡金属层（142）可以通过自对准沉积形成在Cu金属化之上。

    INTERFACE DEVICE WITH INTEGRATED SOLAR CELL(S) FOR POWER COLLECTION
    10.
    发明申请
    INTERFACE DEVICE WITH INTEGRATED SOLAR CELL(S) FOR POWER COLLECTION 审中-公开
    具有用于电力收集的集成太阳能电池的界面装置

    公开(公告)号：WO2011142889A3

    公开(公告)日：2012-01-19

    申请号：PCT/US2011029498

    申请日：2011-03-23

    Applicant: IBM ,  RANKIN JED H ,  JAFFE MARK D ,  ANDERSON BRENT A

    Inventor： RANKIN JED H ,  JAFFE MARK D ,  ANDERSON BRENT A

    IPC: G06F3/042 ,  G06F3/041 ,  G06F3/044

    CPC classification number: G06F3/042 ,  G06F3/041 ,  G06F3/0421 ,  G06F3/044 ,  G06F2203/04109

    Abstract: Disclosed herein are embodiments of an interface device (100, 200) (e.g., a display, touchpad, touchscreen display, etc.) with integrated power collection functions. In one embodiment, a solar cell (110, 210) or solar cell array can be located within a substrate (10) at a first surface (11) and an array (120, 220) of interface elements can also be located within the substrate (10) at the first surface (11) such that portions of the solar cell(s) (110, 210) laterally surround the individual interface elements (121, 221) or groups thereof. In another embodiment, a solar cell (110, 210) or solar cell array (120, 220) can be located within the substrate (10) at a first surface (11) and an array of interface elements (120, 220) can be located within the substrate (10) at a second surface (12) opposite the first surface (11) (i.e., opposite the solar cell or solar cell array). In yet another embodiment, an array of diodes, which can function as either solar cells (110, 210) or sensing elements, can be within a substrate (10) at a first surface (11) and can be wired to allow for selective operation in either a power collection mode or sensing mode.

    Abstract translation: 这里公开了具有集成功率收集功能的接口设备（100,200）（例如，显示器，触摸板，触摸屏显示器等）的实施例。 在一个实施例中，太阳能电池（110,210）或太阳能电池阵列可以位于第一表面（11）处的衬底（10）内，并且界面元件的阵列（120,220）也可以位于衬底 （10）在第一表面（11）处，使得太阳能电池（110,210）的部分横向地围绕各个界面元件（121,221）或其组。 在另一个实施例中，太阳能电池（110,210）或太阳能电池阵列（120,220）可以在第一表面（11）处位于衬底（10）内，并且接口元件阵列（120,220）可以是 位于与第一表面（11）相对的第二表面（12）处（即，与太阳能电池或太阳能电池阵列相对）的衬底（10）内。 在另一个实施例中，可以用作太阳能电池（110,210）或感测元件的二极管阵列可以在第一表面（11）处于衬底（10）内，并且可以被布线以允许选择性操作 在电力收集模式或感测模式下。

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