1.
    发明专利
    未知

    公开(公告)号:DE10310136B4

    公开(公告)日:2007-05-03

    申请号:DE10310136

    申请日:2003-03-07

    Abstract: Structure patterns mutually correlated on masks are projected onto the same photosensitive layer (R) on semiconductor wafer (W) in projection system. The first mask (P) contains opaque structure element (25) on first position so that its position projection onto wafer forms not-exposed region of lacquer in photo-sensitive layer. There is at least one second mask (T), allocated to first mask, with semi-transparent region (23') on second position of second mask, coinciding with first position on first mask, whose image on wafer illuminates at least part of lacquer region in photo-sensitive layer. Independent claims are included for method of producing set of several masks.

    5.
    发明专利
    未知

    公开(公告)号:DE102005039394B4

    公开(公告)日:2008-08-28

    申请号:DE102005039394

    申请日:2005-08-20

    Abstract: A layout comprises a plurality of elemental areas which define the shape and arrangement of patterns of an integrated circuit. A method for searching for potential faults in the layout begins with dividing the layout into sections. One of a number of predetermined classes is allocated to a section by means of allocation criteria. An evaluation criterion allocated to the class which was allocated to the section is then applied to the section in order to obtain an evaluation result. Each section is then identified as potentially faulted in dependence on the evaluation result.

    6.
    发明专利
    未知

    公开(公告)号:DE102005039394A1

    公开(公告)日:2007-03-01

    申请号:DE102005039394

    申请日:2005-08-20

    Abstract: A layout comprises a plurality of elemental areas which define the shape and arrangement of patterns of an integrated circuit. A method for searching for potential faults in the layout begins with dividing the layout into sections. One of a number of predetermined classes is allocated to a section by means of allocation criteria. An evaluation criterion allocated to the class which was allocated to the section is then applied to the section in order to obtain an evaluation result. Each section is then identified as potentially faulted in dependence on the evaluation result.

    7.
    发明专利
    未知

    公开(公告)号:DE10119145C1

    公开(公告)日:2002-11-21

    申请号:DE10119145

    申请日:2001-04-19

    Abstract: A photoresist layer on a substrate wafer is exposed in first sections with a first exposure radiation and in second sections with a second exposure radiation that is phase-shifted by 180°. The first and second sections adjoin one another in boundary regions in which the photoresist layer is artificially not sufficiently exposed. Where a distance between these boundary regions is smaller than a photolithographically critical, least distance, the photoresist layer is exposed, at a first boundary region, with a third exposure radiation and at a second boundary region with a fourth exposure radiation phase-shifted by 180°. A trim mask provided for the process has a first translucent region and a second translucent region. The first light-transparent region and the second light-transparent region are fashioned such that the light passing through the first light-transparent region and the light passing through the second light-transparent region has a phase displacement of 180°.

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