公开(公告)号：WO2005109499A3

公开(公告)日：2006-01-19

申请号：PCT/DE2005000840

申请日：2005-05-03

Applicant: INFINEON TECHNOLOGIES AG ,  BAUER MICHAEL ,  FUERGUT EDWARD ,  JEREBIC SIMON ,  WOERNER HOLGER

Inventor： BAUER MICHAEL ,  FUERGUT EDWARD ,  JEREBIC SIMON ,  WOERNER HOLGER

IPC: H01L23/538 ,  H01L25/065 ,  H01L25/10

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/19 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05571 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/82039 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention relates to a semiconductor component (10) provided with a rewiring substrate (1) in the form of a stack element for a semi-conductor component stack (25, 30, 35, 40). Said rewiring substrate (1) comprises a plastic frame (41) consisting of a first plastic compound (41) and a central area (20) comprising a second plastic compound (46). A semiconductor chip (6) is incorporated into in the second plastic material (46) by the rear (14) and lateral (12) faces thereof, wherein the active face of the semiconductor component (6) is embodied in the form of a surface (3) coplanar with the plastic compounds (42, 46).

Abstract translation: 本发明涉及具有内插基板（1），其用于半导体器件叠层（25，30，35，40）的堆叠元件的半导体器件（10）。 内插基板（1）包括第一塑料化合物（42）和中间部分（20）具有第二塑料化合物（46）的塑料框架（41）。 在其背面（14）和它的边缘侧的第二塑料化合物（46），半导体芯片（6）（12，13）被嵌入，其中，与所述塑料块（42，46）的半导体元件（6）的有源面具有共面的表面（ 3）。

公开(公告)号：WO2005115072A3

公开(公告)日：2006-04-13

申请号：PCT/DE2005000892

申请日：2005-05-17

Applicant: INFINEON TECHNOLOGIES AG ,  BAUER MICHAEL ,  BEMMERL THOMAS ,  FUERGUT EDWARD ,  JEREBIC SIMON ,  VILSMEIER HERMANN

Inventor： BAUER MICHAEL ,  BEMMERL THOMAS ,  FUERGUT EDWARD ,  JEREBIC SIMON ,  VILSMEIER HERMANN

IPC: B23K3/06 ,  H01L21/48 ,  H01L21/60 ,  H01L21/68 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H05K3/22 ,  H05K3/34 ,  H05K13/00

CPC classification number: H05K3/3478 ,  B23K3/0623 ,  B23K2201/40 ,  H01L21/4853 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49805 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L25/105 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K2201/0108 ,  H05K2203/0338 ,  H05K2203/041 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

Abstract: The invention relates to a support (4) with solder globule elements (1), for assembly of substrates (2) with globule contacts. The invention further relates to a unit for assembly of substrates (2) with globule contacts and a method for assembly of substrates (2) with globular contacts. The support (4) comprises an adhesive layer (5) applied to one side thereof, whereby said adhesive layer (5) largely loses the adhesive force thereof on irradiation. The support (4) further comprises solder globule elements (1), tightly packed in rows (6) and columns (7) on the adhesive layer (5) at given separations (w) for a semiconductor chip or a semiconductor component.

Abstract translation: 本发明涉及一种载体（4）用焊料球（1），用于嵌合的基板（2）与球接触。 此外，本发明涉及一种用于装配的基板（2）与球接触要装配基板（2）与球接触和邻接的方法。 为了这个目的，一个单一的涂敷的粘合剂层（5），其中，所述粘合剂层（5）主要取决于照射失去其粘合力在支承（4）。 此外，载体（4）的焊料球（1），其上紧密排列在一个预定步长（W）为一个半导体芯片或半导体器件装在所述粘合剂层（5）上的行（6）和列（7）。

公开(公告)号：WO2005013364A3

公开(公告)日：2005-03-24

申请号：PCT/DE2004001488

申请日：2004-07-08

Applicant: INFINEON TECHNOLOGIES AG ,  FUERGUT EDWARD ,  GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  JEREBIC SIMON ,  POHL JENS ,  STROBEL PETER ,  WOERNER HOLGER

Inventor： FUERGUT EDWARD ,  GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  JEREBIC SIMON ,  POHL JENS ,  STROBEL PETER ,  WOERNER HOLGER

IPC: H01L23/31 ,  H01L23/495 ,  H01L25/065

CPC classification number: H01L23/3128 ,  H01L23/49537 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/065 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05099 ,  H01L2924/00012

Abstract: The invention relates to an electronic component (1) comprising stacked semiconductor chips (3,4) and a panel (23) for producing the component (1). Said stack (2) has a flat conductor structure (8) with a chip island (9) on which a stacked semiconductor chip (4) is arranged, a first semiconductor chip (3) being arranged below the chip island. Said chip island (9) is surrounded by flat conductors (10) comprising contact columns (11). Said contact columns (11) have column contact surfaces (13) which form a coplanar complete upper side (16) together with the active upper side (5) of the first semiconductor chip (3) and upper side regions (14) of a plastic housing mass (15).

Abstract translation: 本发明涉及一种具有堆叠的半导体芯片（3,4）和用于制造部件（1）的设备（23）的电子部件（1）。 为此，在平坦的导体结构（8）用芯片岛（9）堆（2）布置，其堆叠半导体芯片（4）上，而包括第一半导体芯片（3）的位置。 芯片岛（9）被具有接触柱（11）的扁平导体（10）包围。 这些触点柱（11）具有柱的接触面（13）的第一半导体芯片（3）和顶部部分（14）的，其与有源顶部侧一起（5）形成的塑料外壳组合物（15），共面整体顶侧（16）。

公开(公告)号：WO2005008772A3

公开(公告)日：2005-08-11

申请号：PCT/DE2004001150

申请日：2004-06-04

Applicant: INFINEON TECHNOLOGIES AG ,  ERNST GEORG ,  GROENINGER HORST ,  JEREBIC SIMON ,  ZEILER THOMAS

Inventor： ERNST GEORG ,  GROENINGER HORST ,  JEREBIC SIMON ,  ZEILER THOMAS

IPC: H01L21/48 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L21/4842 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01057 ,  H01L2924/01063 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention relates to an electronic component (1) comprising a semiconductor chip (2) and a flat conductor frame (17) provided on the lower face thereof with a metal coating pattern (19) for soldering the electronic component (1). Said metal coating pattern (19) comprises wetting areas which are wettable with a soldering material and non-wetting areas (20) which are non-wettable by said soldering material. The inventive electronic component (1) is provided on the low face thereof with solder depositions (15) in the wetting areas thereof.

Abstract translation: 本发明涉及包括半导体芯片（2）和具有Belotung到电子部件（1）的扁平导体框架（17）的电子部件（1）是在其下侧的金属涂层图案（19）。 该金属涂层图案（19）包括润湿区域（21），其可与焊接材料被浸湿，抗湿区域（20），它们是不润湿的焊料，其特征在于，所述电子部件（1）上的部件的下侧的润湿区域（21） 焊料沉积物（15）。

公开(公告)号：WO2004082018A3

公开(公告)日：2004-11-11

申请号：PCT/DE2004000461

申请日：2004-03-09

Applicant: INFINEON TECHNOLOGIES AG ,  HAGEN ROBERT-CHRISTIAN ,  JEREBIC SIMON

Inventor： HAGEN ROBERT-CHRISTIAN ,  JEREBIC SIMON

IPC: H01L21/56 ,  H01L23/31 ,  H01L29/06

CPC classification number: H01L23/3142 ,  H01L21/56 ,  H01L23/3107 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/18301 ,  H01L2924/00

Abstract: The invention relates to an electronic component comprising a semiconductor chip (1). Said semiconductor chip (1) is contained in a plastic housing (6) in such a way that the rear side (3) and the lateral sides (4, 5) thereof are embedded in a plastic material (7). The lateral sides (4, 5) and/or the rear side (3) of the semiconductor chip (2) have an anchoring region (10) which enables the semiconductor chip (1) to positively engage with the surrounding plastic material (7). The invention also relates to a method for producing the inventive component.

Abstract translation: 本发明涉及一种包括半导体芯片（1）的电子组件。 该半导体芯片（1）嵌入塑料外壳（6）中，使得其后侧（3）及其边缘侧（4,5）嵌入塑料化合物（7）中。 边缘侧（4,5）和/或后侧（3）的半导体芯片（2）包括锚定部分（10）通过将半导体芯片（1）与周围的塑料材料（7）是在正接合。 此外，本发明涉及一种用于制造该部件的方法。

公开(公告)号：WO2005104226A8

公开(公告)日：2007-03-01

申请号：PCT/DE2005000754

申请日：2005-04-25

Applicant: INFINEON TECHNOLOGIES AG ,  BAUER MICHAEL ,  FUERGUT EDWARD ,  JEREBIC SIMON ,  WOERNER HOLGER

Inventor： BAUER MICHAEL ,  FUERGUT EDWARD ,  JEREBIC SIMON ,  WOERNER HOLGER

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H05K1/03 ,  H05K3/40

CPC classification number: H01L21/486 ,  H01L23/49827 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/92 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H05K1/0373 ,  H05K3/4038 ,  H05K3/4069 ,  H05K2201/0215 ,  H05K2201/0257 ,  H05K2203/105 ,  H01L2224/96 ,  H01L2224/82

Abstract: The invention relates to a method for the production of through contacts (1), passing through a sheet composite body (2), comprising semiconductor chips (3) and a plastic mass (4). The sheet composite body (2) is placed between two high voltage point electrodes (10, 11) and said electrodes are aligned such that they may be placed in the positions (14) at which through contacts (1) through the plastic mass (4), filled with conducting particles (9), are to be introduced. The through contacts (1) are produced by application of a high voltage to the point electrodes.

Abstract translation: 本发明涉及一种方法，用于生产电镀通孔（1）通过的板状复合体（2），半导体芯片（3）和塑性体（4）。 用于此目的的两个高压点电极（10，11）被引入，并且这些点电极之间的板状复合体（2）被对准，使得它们（在其中的通孔（1）通过导电粒子（9）的位置（14）填充的塑料化合物 4）将被引入。 通过将高电压施加到尖端电极最终通过（1）结束。

公开(公告)号：WO2006060983A3

公开(公告)日：2006-09-21

申请号：PCT/DE2005002116

申请日：2005-11-23

Applicant: INFINEON TECHNOLOGIES AG ,  JEREBIC SIMON ,  STROBEL PETER

Inventor： JEREBIC SIMON ,  STROBEL PETER

IPC: H01L21/67 ,  C09J7/02 ,  H01L21/68

CPC classification number: H01L21/6835 ,  H01L21/67132 ,  H01L21/6836 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2221/68359 ,  H01L2224/274 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2924/01005 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/3512 ,  H01L2924/00

Abstract: The invention relates to a method for applying an adhesive layer (1) to thinly ground or thinned semiconductor chips (2) of a semiconductor wafer (3). To this end, the adhesive layer (1), with the aid of an adhesive film (4) made entirely of pre-curable adhesive (10), is subjected relatively early on to a process for thinly grinding, dividing and separating a semiconductor into thinned semiconductor chips (2) and, lastly, the adhesive layer is then used in the semiconductor component into which the thinned semiconductor (2) is to be fitted.

Abstract translation: 本发明涉及一种用于将粘合剂层（1）施加到半导体晶片（3）的薄地研磨或薄化的半导体芯片（2）的方法。 这里，粘接剂层（1）通过粘接剂膜的装置（4）完全由vorhärtbarem粘合剂（10）被构造，在通过研磨，切割和分离的半导体晶片减薄的方法相对较早引入到被减薄的半导体芯片（2），最后在 继续使用其中要安装变薄的半导体芯片（2）的半导体组件。

公开(公告)号：DE102004025279B4

公开(公告)日：2011-04-28

申请号：DE102004025279

申请日：2004-05-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FUERGUT EDWARD ,  VILSMEIER HERMANN ,  JEREBIC SIMON ,  BAUER MICHAEL ,  BEMMERL THOMAS

IPC: H01L21/60 ,  B23K3/06 ,  H01L21/48 ,  H01L21/68 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H05K3/22 ,  H05K3/34 ,  H05K13/00

公开(公告)号：DE102005043808B4

公开(公告)日：2007-11-29

申请号：DE102005043808

申请日：2005-09-13

Applicant: INFINEON TECHNOLOGIES AG

Inventor： JEREBIC SIMON ,  WOERNER HOLGER ,  FUERGUT EDWARD ,  BAUER MICHAEL ,  ESCHER-POEPPEL IRMGARD ,  STROBEL PETER ,  RAKOW BERND

IPC: H01L23/50 ,  H01L21/48 ,  H01L21/60

公开(公告)号：DE10340902A1

公开(公告)日：2005-02-03

申请号：DE10340902

申请日：2003-09-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BEER GOTTFRIED ,  FUERGUT EDWARD ,  BAUER MICHAEL ,  BEMMERL THOMAS ,  FINK MARKUS ,  JEREBIC SIMON ,  STROBEL PETER ,  VILSMEIER HERMANN

IPC: B01L3/00 ,  C12M1/34 ,  C12M1/38

Abstract: The biochip (4) side surfaces (7) interlock and/or are interference-fitted into the inner walls (3) of the sample chamber (2). Biochip and sample chamber form a transverse pressure- or shrink connection. The connection is alternatively a snap fit. The biochip is circular or rectangular in shape. Chip edges and/or the chamber have seals. The chip is square with rounded corners. The sample chamber is a cuvette. The biochip has a plastic substrate.