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    Optoelektronisches Bauelement und Verfahren zur Herstellung
    3.
    发明专利
    Optoelektronisches Bauelement und Verfahren zur Herstellung 未知

    公开(公告)号：DE102014111058A1

    公开(公告)日：2016-02-04

    申请号：DE102014111058

    申请日：2014-08-04

    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

    Inventor： EICHLER CHRISTOPH ,  AVRAMESCU ADRIAN ,  WURM TERESA ,  RISTIC JELENA

    IPC: H01S5/32 ,  H01L33/06 ,  H01L33/28 ,  H01L33/32

    Abstract: Die Erfindung betrifft ein Verfahren zur Herstellung eines optoelektronischen Bauelementes und ein optoelektronisches Bauelement mit einer aktiven Zone (3) zum Erzeugen einer elektromagnetischen Strahlung, wobei die aktive Zone (3) an wenigstens eine Schichtanordnung (100, 200) aus einem halbleitenden Material angrenzt, wobei die Schichtanordnung (100, 200) wenigstens zwei Schichten aufweist, wobei die zwei Schichten in der Weise ausgebildet sind, dass an einer Grenzfläche zwischen den zwei Schichten ein piezoelektrisches Feld erzeugt wird, das einen elektrischen Spannungsabfall an der Grenzfläche bewirkt, wobei an der Grenzfläche der zwei Schichten und in den zwei Schichten ein Spitzendotierbereich (6, 13) vorgesehen ist, um den elektrischen Spannungsabfall zu reduzieren, wobei eine Dotierung des Spitzendotierbereiches in Richtung weg von der aktiven Zone wenigstens um einen ersten Prozentwert ansteigt und wieder um wenigstens einen zweiten Prozentwert abfällt, wobei der erste und der zweite Prozentwert größer als 10 % einer maximalen Dotierung des Spitzendotierbereiches ist.

    Method for producing a stack of layers on a crystalline substrate, which is free from nitride compound semiconductor by using metal organic gas-phase deposition, comprises forming a nitride-containing buffer layer on the substrate
    4.
    发明专利
    Method for producing a stack of layers on a crystalline substrate, which is free from nitride compound semiconductor by using metal organic gas-phase deposition, comprises forming a nitride-containing buffer layer on the substrate 未知

    公开(公告)号：DE102007057241A1

    公开(公告)日：2009-06-04

    申请号：DE102007057241

    申请日：2007-11-28

    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

    Inventor： PETER MATTHIAS ,  AVRAMESCU ADRIAN ,  MILLER STEPHAN

    IPC: C30B25/18 ,  H01L21/205 ,  H01L33/00

    Abstract: The method for producing a stack of layers (2, 3, 4, 5, 6) on a crystalline substrate (1), which is free from nitride compound semiconductor by using metal organic gas-phase deposition, comprises forming a nitride-containing buffer layer on the substrate and then forming a crystalline layer made of group-III nitride compound semiconductor material, so that upper main surfaces (7, 8) of the buffer layer and crystalline layer are formed from nitrogen atoms. A contiguous region of upper main surface of the crystalline layer is smoothed. The crystalline layer has a diameter of more than 100 mu m. The method for producing a stack of layers (2, 3, 4, 5, 6) on a crystalline substrate (1), which is free from nitride compound semiconductor by using metal organic gas-phase deposition, comprises forming a nitride-containing buffer layer on the substrate and then forming a crystalline layer made of group-III nitride compound semiconductor material, so that upper main surfaces (7, 8) of the buffer layer and the crystalline layer are formed from nitrogen atoms. A contiguous region of the upper main surface of the crystalline layer is smoothed. The crystalline layer has a diameter of more than 100 mu m. The contiguous region has levels along the upper main surface of the crystalline layer, where the levels have a level height of less than 20 nm. The formation of the buffer layer comprises a supply of nitrogen-containing process gases at a determined substrate temperature of more than 1000[deg] C. A partial pressure of the process gases and the determined substrate temperature are selected, so that the upper main surface of the buffer layer is formed from the nitrogen atoms. The formation of the buffer layer comprises the formation of a crystalline buffer layer containing aluminum nitride. A c-axis of the crystalline buffer layer is parallel to a growth direction of the nitride-containing buffer layer. A c-axis of the crystalline layer is parallel to a growth direction of the crystalline layer. The formation of the crystalline layer comprises a formation of a gallium nitride layer, which has a layer thickness of more than 90 nm, and a formation of an aluminum gallium nitride layer. A ratio of the aluminum atoms and the gallium atoms in the aluminum gallium nitride layer is greater than 0.07. Before the formation of the crystalline layer, a first intermediate layer made of the group-III nitride compound semiconductor material is formed, which contains atoms of first and second group-III elements. A ratio of the atoms of the first group-III elements increases with increasing layer thickness of the first intermediate layer opposite to the atoms of the second group-III elements. After the formation of the first intermediate layer and before the formation of the crystalline layer, a further crystalline layer made of the group-III nitride compound semiconductor material is formed, which contains atoms of the first and second group-III elements, and a second intermediate layer made of the group-III nitride compound semiconductor material is formed. A ratio of the atoms of the first group-III elements increases with increasing layer thickness of the second intermediate layer opposite to the atoms of the second group-III elements. The crystalline substrate is made of sapphire. A c-axis of the crystalline substrate has an error orientation of 0.1-1.0[deg] opposite to a normal of a main surface of the substrate. An independent claim is included for an arrangement having a crystalline substrate.

    5.
    发明专利
    未知

    公开(公告)号：DE112007001616A5

    公开(公告)日：2009-04-09

    申请号：DE112007001616

    申请日：2007-04-20

    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

    Inventor： HAERLE VOLKER ,  STRAUSS UWE ,  BRUEDERL GEORG ,  EICHLER CHRISTOPH ,  AVRAMESCU ADRIAN

    IPC: H01L21/18 ,  H01L21/20 ,  H01L21/762 ,  H01L31/0248 ,  H01L33/00

    Abstract: A composite substrate (1) comprising a substrate body (2) and a utility layer (31) fixed on the substrate body (2). A planarization layer (4) is arranged between the utility layer (31) and the substrate body (2). A method for producing a composite substrate (1) applies a planarization layer (4) on a provided utility substrate (3). The utility substrate (3) is fixed on a substrate body (2) for the composite substrate (1). The utility substrate (3) is subsequently separated, wherein a utility layer (31) of the utility substrate (3) remains for the composite substrate (1) on the substrate body (2).

    6.
    发明专利
    未知

    公开(公告)号：DE102007044439A1

    公开(公告)日：2009-03-19

    申请号：DE102007044439

    申请日：2007-09-18

    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

    Inventor： SCHILLGALIES MARC ,  EICHLER CHRISTOPH ,  RUMBOLZ CHRISTIAN ,  LELL ALFRED ,  AVRAMESCU ADRIAN ,  BRUEDERL GEORG ,  STRAUS UWE

    IPC: H01S5/343 ,  H01L33/06

    Abstract: The invention relates to an opto-electronic semiconductor chip, which has a radiation-emitting semiconductor layer sequence (1) with an active zone (120). The active zone comprises a first quantum well layer (3), a second quantum well layer (4), and two end barrier layers (51). The first quantum well layer and the second quantum well layer are disposed between the two end barrier layers. The active zone has a semiconductor material, which comprises at least one first and a second component. The fraction of the first component in the semiconductor material of the two end barrier layers is lower than in the first and second quantum well layers. Compared to the first quantum well layer, the second quantum well layer has either a lower layer thickness and a larger fraction of the first component of the semiconductor material, or a higher or the same layer thickness and a lower fraction of the first component of the semiconductor material.

    OPTOELEKTRONISCHES BAUELEMENT MIT EINER VIELZAHL VON STEGEN UND VERFAHREN ZUR HERSTELLUNG DES OPTOELEKTRONISCHEN BAUELEMENTS
    9.
    发明专利
    OPTOELEKTRONISCHES BAUELEMENT MIT EINER VIELZAHL VON STEGEN UND VERFAHREN ZUR HERSTELLUNG DES OPTOELEKTRONISCHEN BAUELEMENTS 未知

    公开(公告)号：DE102018107483A1

    公开(公告)日：2019-10-02

    申请号：DE102018107483

    申请日：2018-03-28

    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

    Inventor： AVRAMESCU ADRIAN ,  LUGAUER HANS-JÜRGEN

    IPC: H01L33/08

    Abstract: Ein optoelektronisches Bauelement (10, 20) umfasst ein Substrat (100) und eine auf dem Substrat (100) angeordnete Halbleiter-Schichtstruktur (129). Die Halbleiter-Schichtstruktur (129) weist eine p-dotierte Schicht (124, 125, 156, 157, 192, 203, 204), eine erste leuchtaktive Schicht (123, 158) sowie eine n-dotierte Schicht (121, 122, 154, 155, 189) auf, wobei die n-dotierte Schicht (121, 122, 154, 155, 189) bei einem größerem Abstand zu einer Hauptoberfläche (110) des Substrats (100) angeordnet ist als die p-dotierte Schicht. Die Halbleiter-Schichtstruktur (129) ist zu einer Vielzahl von Stegen (130) strukturiert, deren laterale Abmessung jeweils kleiner als eine laterale Abmessung des Substrats (100) ist.

    10.
    发明专利
    未知

    公开(公告)号：DE102007058723A1

    公开(公告)日：2009-03-12

    申请号：DE102007058723

    申请日：2007-12-06

    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

    Inventor： AVRAMESCU ADRIAN ,  LUGAUER HANS-JUERGEN ,  PETER MATTHIAS ,  MILLER STEPHAN

    IPC: H01L33/08

    Abstract: A light-emitting structure includes a p-doped region for injecting holes and an n-doped region for injecting electrons. At least one InGaN quantum well of a first type and at least one InGaN quantum well of a second type are arranged between the n-doped region and the p-doped region. The InGaN quantum well of the second type has a higher indium content than the InGaN quantum well of the first type.

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