SUBSTRATE-LEVEL ASSEMBLY FOR AN INTEGRATED DEVICE, MANUFACTURING PROCESS THEREOF AND RELATED INTEGRATED DEVICE
    2.
    发明申请
    SUBSTRATE-LEVEL ASSEMBLY FOR AN INTEGRATED DEVICE, MANUFACTURING PROCESS THEREOF AND RELATED INTEGRATED DEVICE 审中-公开
    用于集成设备的基板级组件,其制造工艺以及相关的集成设备

    公开(公告)号:WO2007042336A2

    公开(公告)日:2007-04-19

    申请号:PCT/EP2006064298

    申请日:2006-07-14

    Abstract: In a substrate-level assembly (22), a device substrate (20) of semiconductor material has a top face (20a) and houses a first integrated device (1; 16), in particular provided with a buried cavity (3), formed within the device substrate (20), and with a membrane (4), suspended over the buried cavity (3) in the proximity of the top face (20a). A capping substrate (21) is coupled to the device substrate (20) above the top face (20a) so as to cover the first integrated device (1; 16), in such a manner that a first empty space (25) is provided above the membrane (4). Electrical-contact elements (28a, 28b) electrically connect the integrated device (1; 16) with the outside of the substrate-level assembly (22). In one embodiment, the device substrate (20) integrates at least a further integrated device (1', 10) provided with a respective membrane (4'); and a further empty space (25'), fluidically isolated from the first empty space (25), is provided over the respective membrane (4') of the further integrated device (1', 10).

    Abstract translation: 在衬底级组件(22)中,半导体材料的器件衬底(20)具有顶面(20a)并容纳第一集成器件(1; 16),所述第一集成器件特别设置有埋入腔(3) 在器件衬底(20)内并且具有在顶面(20a)附近悬置在掩埋腔(3)上的膜(4)。 封盖衬底(21)在顶面(20a)上方与器件衬底(20)耦合,以便以这样的方式覆盖第一集成器件(1; 16):提供第一空的空间(25) 在膜(4)上方。 电接触元件(28a,28b)将集成装置(1; 16)与衬底级组件(22)的外部电连接。 在一个实施例中,所述装置基底(20)集成了至少另一个集成装置(1',10),所述集成装置设置有相应的膜(4'); 并且在另一集成装置(1',10)的相应的膜(4')上设置与第一空的空间(25)流体隔离的另一个空的空间(25')。

    ELECTRONIC DEVICE COMPRISING DIFFERENTIAL SENSOR MEMS DEVICES AND DRILLED SUBSTRATES
    3.
    发明申请
    ELECTRONIC DEVICE COMPRISING DIFFERENTIAL SENSOR MEMS DEVICES AND DRILLED SUBSTRATES 审中-公开
    包含差分传感器MEMS器件和钻孔基板的电子器件

    公开(公告)号:WO2008089969A3

    公开(公告)日:2008-12-31

    申请号:PCT/EP2008000495

    申请日:2008-01-23

    Abstract: Electronic device (1, 1a, 1b, 1c, 1d, 1e) which comprises: a substrate (2) provided with at least one passing opening (5), a MEMS device (7) with function of differential sensor provided with a first and a second surface (9, 10) and of the type comprising at least one portion (11) sensitive to chemical and/or physical variations of fluids present in correspondence with a first and a second opposed active surface (11a, 11b) thereof, the first surface (9) of the MEMS device (7) leaving the first active surface (11a) exposed and the second surface (10) being provided with a further opening (12) which exposes said second opposed active surface (11b), the electronic device (1, 1d, 1e) being characterised in that the first surface (9) of the MEMS device (7) faces the substrate (2) and is spaced therefrom by a predetermined distance, the sensitive portion (11) being aligned to the passing opening (5) of the substrate (2), and in that it also comprises: a protective package (14, 14a, 14b), which incorporates at least partially the MEMS device (7) and the substrate (2) so as to leave the first and second opposed active surfaces (11a, 11b) exposed respectively through the passing opening (5) of the substrate (2) and the further opening (12) of the second surface (10).

    Abstract translation: 电子设备(1,1a,1b,1c,1d,1e)包括:设置有至少一个通过开口(5)的基板(2),具有差动传感器功能的MEMS装置(7) 第二表面(9,10),并且包括对与其第一和第二相对的有效表面(11a,11b)相对应存在的流体的化学和/或物理变化敏感的至少一个部分(11)的类型, 离开第一有源表面(11a)的MEMS器件(7)的第一表面(9)暴露,并且第二表面(10)设置有暴露所述第二相对的有效表面(11b)的另外的开口(12),电子 其特征在于,所述MEMS器件(7)的所述第一表面(9)面向所述基板(2)并且与所述第一表面(9)隔开预定距离,所述敏感部分(11)与所述基板 通过基板(2)的开口(5),并且还包括:保护封装(14,14a,14b),其中 至少部分地将MEMS器件(7)和衬底(2)并入,以使得分别暴露于衬底(2)的通过开口(5)的第一和第二相对的有效表面(11a,11b)和 进一步打开第二表面(10)的开口(12)。

    8.
    发明专利
    未知

    公开(公告)号:ITTO20011038A1

    公开(公告)日:2003-04-30

    申请号:ITTO20011038

    申请日:2001-10-30

    Abstract: A process for manufacturing a semiconductor wafer integrating electronic devices and a structure for electromagnetic decoupling are disclosed. The method includes providing a wafer of semiconductor material having a substrate; forming a plurality of first mutually adjacent trenches, open on a first face of the wafer, which have a depth and a width and define walls); by thermal oxidation, completely oxidizing the walls and filling at least partially the first trenches, so as to form an insulating structure of dielectric material; and removing one portion of the substrate comprised between the insulating structure and a second face of the wafer, opposite to the first face of the wafer.

Patent Agency Ranking