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    PRINTED CIRCUIT BOARD WITH EMBOSSED HOLLOW HEATSINK PAD
    2.
    发明申请
    PRINTED CIRCUIT BOARD WITH EMBOSSED HOLLOW HEATSINK PAD 审中-公开
    印刷电路板，带有破损的中空散热片

    公开(公告)号：WO2011140141A3

    公开(公告)日：2012-04-12

    申请号：PCT/US2011035063

    申请日：2011-05-03

    Applicant: SINKPAD CORP ,  VASOYA KALU K

    Inventor： VASOYA KALU K

    IPC: H05K7/20 ,  H01L33/64 ,  H05K1/02

    CPC classification number: H05K1/0204 ,  H01L2224/48091 ,  H01L2224/73265 ,  H05K2201/09054 ,  H05K2201/10106 ,  Y10T29/49155 ,  H01L2924/00014

    Abstract: A printed circuit board includes a dielectric layer having a first surface and an opposing second surface and a circuit layer laminated to the first surface of the dielectric layer. Cut-out windows provide openings through the dielectric and circuit layers. A thermally conductive layer is laminated to the second surface of the dielectric layer. The thermally conductive layer includes at least one sinkpad that passes through the cut-out windows. The sinkpad is an embossed, hollow feature of the thermally conductive layer. A surface of the sinkpad may be substantially coplanar with a surface of the circuit layer and be prepared for compatibility with a solder reflow process. A heat generating electronic component may be electrically coupled to the circuit layer and thermally coupled to the sinkpad of the thermally conductive layer to form an electronic assembly.

    Abstract translation: 印刷电路板包括具有第一表面和相对的第二表面的电介质层以及层压到电介质层的第一表面的电路层。 切口窗口通过介电层和电路层提供开口。 将导热层层叠到电介质层的第二表面。 导热层包括穿过切口窗的至少一个沉没垫。 散热片是导热层的浮雕，中空特征。 散热片的表面可以与电路层的表面基本共面，并且准备与焊料回流工艺的兼容性。 发热电子部件可以电耦合到电路层并且热耦合到导热层的接收板以形成电子组件。

    MANUFACTURING PROCESS: HOW TO CONSTRUCT CONSTRAINING CORE MATERIAL INTO PRINTED WIRING BOARD
    5.
    发明申请
    MANUFACTURING PROCESS: HOW TO CONSTRUCT CONSTRAINING CORE MATERIAL INTO PRINTED WIRING BOARD 审中-公开
    制造工艺：如何将约束核心材料构建成印刷线路板

    公开(公告)号：WO2006099554A3

    公开(公告)日：2009-04-16

    申请号：PCT/US2006009597

    申请日：2006-03-15

    Applicant: CORE TECHNOLOGIES INC C ,  VASOYA KALU K

    Inventor： VASOYA KALU K

    IPC: H05K3/30

    CPC classification number: H05K3/4641 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0047 ,  H05K3/0082 ,  H05K3/064 ,  H05K3/4638 ,  H05K2201/0281 ,  H05K2201/029 ,  H05K2201/0323 ,  H05K2201/068 ,  H05K2201/09063 ,  H05K2201/0969 ,  H05K2201/09718 ,  H05K2203/056 ,  H05K2203/166 ,  H05K2203/167 ,  Y10T156/1062

    Abstract: Processes for manufacturing printed wiring boards including electrically conductive constraining cores are disclosed. Several of the processes enable precise alignment of tooling holes used by tools to perform processes with respect to various panels and subassemblies used to form finished printed wiring boards. Modifications to Gerber files that can increase manufacturing yield and provide the ability to detect faulty printed wiring boards in a panelized array of printed wiring 'boards are also discussed. One embodiment of the invention includes aligning the weave of a woven panel of electrically conductive material relative to a tool surface using at least a pair of references and forming tooling holes in the panel of electrically conductive material.

    Abstract translation: 公开了用于制造包括导电约束芯的印刷线路板的工艺。 几个过程使得工具使用的工具孔能够精确地对准用于对用于形成成品印刷线路板的各种面板和子组件进行处理。 还讨论了对Gerber文件的修改，可以提高制造成本并提供检测印刷线路板的面板阵列中的有缺陷的印刷线路板的能力。 本发明的一个实施例包括使用至少一对参考物并使导电材料面板中的工具孔对准编织的导电材料编织板相对于工具表面的织物。

    BUILD-UP PRINTED WIRING BOARD SUBSTRATE HAVING A CORE LAYER THAT IS PART OF A CIRCUIT
    6.
    发明申请
    BUILD-UP PRINTED WIRING BOARD SUBSTRATE HAVING A CORE LAYER THAT IS PART OF A CIRCUIT 审中-公开
    具有作为电路部分的芯层的建筑印刷布线基板

    公开(公告)号：WO2008008552A3

    公开(公告)日：2009-01-08

    申请号：PCT/US2007016210

    申请日：2007-07-16

    Applicant: STABLCOR INC ,  VASOYA KALU K

    Inventor： VASOYA KALU K

    IPC: H01R12/04 ,  H05K1/11 ,  H05K3/36

    CPC classification number: H05K3/4608 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/0284 ,  H05K1/0313 ,  H05K1/0366 ,  H05K1/11 ,  H05K3/429 ,  H05K3/4644 ,  H05K2201/0281 ,  H05K2201/029 ,  H05K2201/0323 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/0959 ,  H01L2224/0401

    Abstract: Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates (200) having a core layer (10) that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole (25) drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer (36) including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole (45).

    Abstract translation: 描述了用于制造集成电路的集成电路和工艺，其使用具有作为印刷线路板的电路的一部分的芯层（10）的印刷线路板基板（200）。 在多个实施例中，芯层由碳复合材料构成。 在几个实施例中，描述了在要求高密度间隙孔（25）钻孔的设计中增加芯层的完整性的技术。 本发明的一个实施例包括芯层，其包括导电材料和形成在芯层的外表面上的至少一个堆积布线部分。 此外，积聚部分包括至少一个微布线层（36），其包括电路，该电路通过电镀通孔（45）电连接到芯层中的导电材料。

    PROCESSES FOR MANUFACTURING PRINTED WIRING BOARDS POSSESSING ELECTRICALLY CONDUCTIVE CONSTRAINING CORES
    7.
    发明申请
    PROCESSES FOR MANUFACTURING PRINTED WIRING BOARDS POSSESSING ELECTRICALLY CONDUCTIVE CONSTRAINING CORES 审中-公开
    制造印刷电路板的方法制造电导线

    公开(公告)号：WO2007103949A3

    公开(公告)日：2008-06-19

    申请号：PCT/US2007063429

    申请日：2007-03-06

    Applicant: STABLCORE INC ,  VASOYA KALU K

    Inventor： VASOYA KALU K

    IPC: B32B15/00

    CPC classification number: H05K3/4641 ,  H05K1/0366 ,  H05K3/429 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/068

    Abstract: Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.

    Abstract translation: 公开了包括涉及单层压循环的导电约束芯的印刷线路板的制造方法。 本发明方法的一个实例包括在导电约束芯中钻出间隙图案，将导电约束芯堆叠起来，其包括在约束的任一侧上的电介质材料的B阶（半固化）层 芯层和另外的材料层，以形成至少一个功能层，在叠层上执行层压循环，导致电介质的B级（半固化）层中的树脂回流并填充在 导电约束芯在固化和钻孔电镀通孔之前。

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