公开(公告)号：US20110013373A1

公开(公告)日：2011-01-20

申请号：US12769086

申请日：2010-04-28

Applicant: Gloria Lin ,  Bryson Gardner, JR. ,  Joseph Fisher, JR. ,  Dennis Pyper ,  Amir Salehi

Inventor： Gloria Lin ,  Bryson Gardner, JR. ,  Joseph Fisher, JR. ,  Dennis Pyper ,  Amir Salehi

IPC: H05K7/02 ,  H01R43/00

CPC classification number: H05K1/145 ,  H05K1/115 ,  H05K1/141 ,  H05K3/222 ,  H05K2201/0919 ,  H05K2201/09627 ,  H05K2201/10446 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49165 ,  Y10T29/49169

Abstract: This relates to systems and methods for providing one or more vias through a module of an electrical system. For example, in some embodiments, the module can include one or more passive elements and/or active of the electrical system around which a packaging has been plastic molded. The module can be stacked under another component of the electrical system. Vias can then be provided that extend through the module. The vias can include, for example, electrically conductive pathways. In this manner, the vias can provide electrical pathways for coupling the component stacked on top of the module to other entities of an electronic device including the electrical system. For example, the component can be coupled to other entities such as other components, other modules, printed circuit boards, other electrical systems, or to any other suitable entity.

Abstract translation: 这涉及用于通过电气系统的模块提供一个或多个通孔的系统和方法。 例如，在一些实施例中，模块可以包括电气系统的一个或多个无源元件和/或主动元件，其中包装已经被塑料模制。 该模块可以堆叠在电气系统的另一个部件下。 然后可以提供通过模块延伸的通孔。 通孔可以包括例如导电通路。 以这种方式，通孔可以提供用于将堆叠在模块顶部上的部件耦合到包括电气系统的电子设备的其他实体的电路径。 例如，组件可以耦合到诸如其他组件，其他模块，印刷电路板，其他电气系统或任何其它合适实体的其他实体。

公开(公告)号：US20100134995A1

公开(公告)日：2010-06-03

申请号：US12628805

申请日：2009-12-01

Applicant: Julie N. Strickland

Inventor： Julie N. Strickland

IPC: H05K1/11

CPC classification number: H05K3/365 ,  H01R12/721 ,  H01R13/639 ,  H01R24/60 ,  H01R2107/00 ,  H05K1/142 ,  H05K3/325 ,  H05K3/4015 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09163 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2201/10409

Abstract: According to one embodiment, an electrical interconnection system includes a pair of printed wiring boards formed of a printed wiring board material. Each printed wiring board has multiple surface pads formed on a surface of the printed wiring board adjacent its outer edge. The surface of each printed wiring board is operable to be placed adjacent to one another such that an electrical circuit coupled to one printed wiring board is electrically coupled to another electrical circuit of the other printed wiring board by contact of the surface pads of each printed wiring board with one another.

Abstract translation: 根据一个实施例，电互连系统包括由印刷线路板材料形成的一对印刷线路板。 每个印刷电路板具有形成在印刷电路板的与其外边缘相邻的表面上的多个表面焊盘。 每个印刷线路板的表面可操作以彼此相邻放置，使得耦合到一个印刷线路板的电路通过每个印刷线路的表面焊盘的接触电耦合到另一个印刷线路板的另一个电路 彼此之间。

公开(公告)号：US20100127402A1

公开(公告)日：2010-05-27

申请号：US12692974

申请日：2010-01-25

Applicant: Kevin P. Grundy ,  Joseph C. Fjelstad ,  Gary Yasumura ,  William F. Wiedemann ,  Para K. Segaram

Inventor： Kevin P. Grundy ,  Joseph C. Fjelstad ,  Gary Yasumura ,  William F. Wiedemann ,  Para K. Segaram

IPC: H01L23/48

CPC classification number: H01L23/13 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/16235 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/85399 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H05K1/182 ,  H05K1/183 ,  H05K3/308 ,  H05K3/3405 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/4046 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0919 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2201/10189 ,  H05K2201/1053 ,  H05K2201/10545 ,  H05K2201/1059 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10727 ,  H05K2201/10734 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Structures employed by a plurality of packages, printed circuit boards, connectors and interposers to create signal paths which reduce the deleterious signal quality issues associated with the use of through-holes. Disclosed structures can coexist with through-hole implementations.

Abstract translation: 由多个封装，印刷电路板，连接器和插入件采用的结构，以产生减少与使用通孔相关联的有害信号质量问题的信号路径。 公开的结构可以与通孔实现共存。

公开(公告)号：US07690103B2

公开(公告)日：2010-04-06

申请号：US11868148

申请日：2007-10-05

Applicant: Alan E. Wang ,  Kevin C. Olson

Inventor： Alan E. Wang ,  Kevin C. Olson

IPC: H05K3/36

CPC classification number: H05K3/445 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/426 ,  H05K3/44 ,  H05K3/4614 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0129 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/09154 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09554 ,  H05K2201/09645 ,  H05K2201/09827 ,  H05K2203/1105 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A circuit board includes an electrically conductive sheet having an insulative coating surrounding the conductive sheet, with a surface of the insulative coating around an edge of the conductive sheet having an arcuate or rounded shape. At least one electrical conductor is conformally deposited on at least the rounded insulative coating around the edge of the conductive sheet and defined via photolithographic and metallization techniques. Each electrical conductor on the insulative coating thereon around the edge of the conductive sheet conforms to the arcuate or rounded shape of the insulative coating and, therefore, has an arcuate or rounded shape.

Abstract translation: 电路板包括具有围绕导电片的绝缘涂层的导电片，绝缘涂层的表面围绕导电片的边缘具有弓形或圆形形状。 至少一个电导体被共形沉积在导电片的边缘周围的至少圆形绝缘涂层上，并通过光刻和金属化技术限定。 导电片边缘周围的绝缘涂层上的每个电导体符合绝缘涂层的弧形或圆形形状，因此具有弓形或圆形形状。

公开(公告)号：US07679001B2

公开(公告)日：2010-03-16

申请号：US11565715

申请日：2006-12-01

Applicant: Alan E. Wang ,  Kevin C. Olson ,  Thomas H. DiStefano

Inventor： Alan E. Wang ,  Kevin C. Olson ,  Thomas H. DiStefano

IPC: H05K1/03

CPC classification number: H05K1/0231 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09554 ,  H05K2201/10446 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.

Abstract translation: 提供一种形成电路板的方法，包括：（a）提供第一导电片; （b）选择性地去除所述第一导电片的一个或多个部分以形成具有第一电路板的第一面板，所述第一电路板通过从所述第一电路板的边缘延伸的至少一个接片连接到所述第一面板的一次性部分 到所述第一面板的一次性部分的边缘; （c）向第一电路板施加绝缘涂层，使得第一电路板的至少每个边缘被覆盖; 以及（d）以一种方式将第一电路板与一次性部分分开，由此至少部分突片保持附接到第一电路板并且包括第一电路板的导电片的暴露边缘。 还提供了通过该方法形成的电路板。

公开(公告)号：US07665206B2

公开(公告)日：2010-02-23

申请号：US12007127

申请日：2008-01-07

Applicant: Kwang-Soo Park ,  Dong-Sam You ,  Bong-Soo Kim ,  Myung-Gun Chong ,  Dae-Jung Byun

Inventor： Kwang-Soo Park ,  Dong-Sam You ,  Bong-Soo Kim ,  Myung-Gun Chong ,  Dae-Jung Byun

IPC: H05K3/00 ,  H05K1/00 ,  H05K1/03

CPC classification number: H05K1/183 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K1/0298 ,  H05K3/0032 ,  H05K3/0044 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2201/09972 ,  H05K2203/0228 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49133 ,  Y10T29/49156 ,  H01L2224/0401

Abstract: A printed circuit board and a method of manufacturing a printed circuit board are disclosed. Using a method of manufacturing a printed circuit board, which includes: forming a multilayer board by alternately stacking circuit pattern layers and insulation layers such that a predetermined thickness of a partial area has only insulation layers stacked therein; and removing insulation layers from the partial area of the multilayer board, a printed circuit board can be manufactured that is suitable for a slim module.

Abstract translation: 公开了印刷电路板和制造印刷电路板的方法。 使用制造印刷电路板的方法，其包括：通过交替堆叠电路图案层和绝缘层来形成多层板，使得部分区域的预定厚度仅具有堆叠在其中的绝缘层; 并且从多层板的部分区域去除绝缘层，可以制造适合于纤薄模块的印刷电路板。

公开(公告)号：US20090314524A1

公开(公告)日：2009-12-24

申请号：US12549289

申请日：2009-08-27

Applicant: Chih-kuang Yang

Inventor： Chih-kuang Yang

IPC: H05K1/02 ,  B32B15/04

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/142 ,  H05K3/361 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  Y10T428/31678 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal layers and adjacent dielectric layers for each multi-layer substrate and connecting a separated border of a metal layer of one multi-layer substrate with a separated border district of a metal layer of another multi-layer substrate to form a connection section. The hybrid structure comprises at least a first multi-layer substrate and a second multi-layer substrate. At least one first metal layer is connected with at least one second metal layer to form a connection section.

Abstract translation: 公开了一种制造多层基板的混合结构的方法。 该方法包括以下步骤：将与相应电介质层的边界区连接的至少一个金属层的边界区域与相邻的金属层和相邻的电介质层分别用于每个多层基板并连接金属层的金属层的分离边界 一个多层基板，具有另一多层基板的金属层的分离边界区域，以形成连接部分。 所述混合结构至少包括第一多层基板和第二多层基板。 至少一个第一金属层与至少一个第二金属层连接以形成连接部分。

公开(公告)号：US20090279274A1

公开(公告)日：2009-11-12

申请号：US11794652

申请日：2005-12-22

Applicant: Martin Joseph Agnew ,  Gary David Panaghiston ,  Murray Jerel Niman ,  Nicholas Chandler

Inventor： Martin Joseph Agnew ,  Gary David Panaghiston ,  Murray Jerel Niman ,  Nicholas Chandler

IPC: H05K1/11

CPC classification number: H05K1/0218 ,  H05K1/142 ,  H05K1/144 ,  H05K1/145 ,  H05K3/368 ,  H05K3/403 ,  H05K2201/0397 ,  H05K2201/0715 ,  H05K2201/0919 ,  H05K2201/09836

Abstract: The invention relates to circuit boards and to screening circuits and components on such boards from stray rf interference when they are mounted as arrays or stacks of such circuit boards. The circuit boards (12, 14) are individually screened by conductive screening layers (16, 18) as known in the art and the individual screening layers are coupled together by layered interconnects (34) which connect corresponding screening layers (16, 18) of the individual circuit boards (12, 14) together, instead of by vias.

Abstract translation: 本发明涉及电路板，并且当这些电路板被安装为这种电路板的阵列或叠层时，将这些电路板上的电路和组件从杂散干扰中筛选出来。 电路板（12,14）由本领域已知的导电屏蔽层（16,18）单独地屏蔽，并且各个屏蔽层通过分层互连（34）耦合在一起，分层互连（34）将相应的屏蔽层（16,18） 各个电路板（12,14）组合在一起，而不是通孔。

公开(公告)号：US20090211785A1

公开(公告)日：2009-08-27

申请号：US12034829

申请日：2008-02-21

Applicant: J. Thomas Lovskog

Inventor： J. Thomas Lovskog

IPC: H05K1/00

CPC classification number: H05K1/0266 ,  H05K3/4611 ,  H05K2201/0919 ,  H05K2201/093 ,  H05K2201/09781 ,  H05K2201/09927 ,  H05K2201/09936

Abstract: A multilayer printed circuit board may include traces that are printed on selected layers of the board so that the traces extend to the edge of the corresponding layer. When the layers are assembled together, the ends of the traces may be viewable on a side of the printed circuit board. The traces may be arranged to convey information. For example, trace ends may be readable as one or more binary words, as alphanumeric characters or as a bar code.

Abstract translation: 多层印刷电路板可以包括印刷在板的选定层上的迹线，使得迹线延伸到相应层的边缘。 当这些层组装在一起时，迹线的端部可以在印刷电路板的一侧可见。 迹线可以被布置成传送信息。 例如，跟踪结束可以作为一个或多个二进制字，字母数字字符或条形码读取。

公开(公告)号：US07544897B2

公开(公告)日：2009-06-09

申请号：US11194391

申请日：2005-08-01

Applicant: Tomonaga Kobayashi

Inventor： Tomonaga Kobayashi

IPC: H05K1/00

CPC classification number: G02F1/13452 ,  H01L2924/0002 ,  H05K3/361 ,  H05K3/363 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/0715 ,  H05K2201/0919 ,  H05K2201/09481 ,  H05K2201/09845 ,  H01L2924/00

Abstract: A connecting substrate includes a first conductive member; an insulating layer; and a second conductive member, the first conductive member and the second conductive member facing each other via the insulating layer, in which wherein an end portion of either one of the first conductive member and the second conductive member extends past an end portion of the other conductive member and past an end portion of the insulating layer.

Abstract translation: 连接基板包括第一导电部件; 绝缘层; 以及第二导电构件，所述第一导电构件和所述第二导电构件经由所述绝缘层彼此面对，其中所述第一导电构件和所述第二导电构件中的任一个的端部延伸超过所述另一导电构件的端部 导电构件并经过绝缘层的端部。