Abstract:
Methods here disclosed provide for selectively coating the top surfaces or ridges of a 3-D substrate while avoiding liquid coating material wicking into micro cavities on 3-D substrates. The substrate includes holes formed in a three-dimensional substrate by forming a sacrificial layer on a template. The template includes a template substrate with posts and trenches between the posts. The steps include subsequently depositing a semiconductor layer and selectively etching the sacrificial layer. Then, the steps include releasing the semiconductor layer from the template and coating the 3-D substrate using a liquid transfer coating step for applying a liquid coating material to a surface of the 3-D substrate. The method may further include coating the 3-D substrate by selectively coating the top ridges or surfaces of the substrate.
Abstract:
A fixing metal bracket for a component mounted on a circuit board, includes a solder bonding plate section to be solder-fixed on a surface of a circuit board with a cream solder, and a component fixing section to be fixed to a component mounted on the circuit board. An annular through-groove is formed on the solder bonding plate section at a position surrounding a central area thereof. An island-shaped portion at the inside of the through-groove is separated from a peripheral portion at the outside of the through-groove while the connection part is remained. A step is formed on a solder bonding face of the connection part. Pure Sn plating is applied to the solder bonding face of the island-shaped portion and whisker resistance plating is applied to a surface of a portion other than the island-shaped portion.
Abstract:
The invention relates to a method of aligning a flexible foil sheet having a general first foil sheet length direction to form stacked foil sheet layers on a reel having a reel diameter. The method comprises providing multiple alignment markers in the foil sheet, distanced conform the reel diameter and each having an mark length direction transverse to the first foil sheet length direction, to form protrusions and corresponding recesses on opposite faces of the foil sheet; winding the foil sheet on the reel in the first foil sheet length direction of the foil sheet; and co-aligning the alignment markers to have protrusions of one mark matching with a recess of another mark, so as to block relative movement of the stacked foil sheet layers in the first foil sheet length direction. Preferably, the foil sheet layers are provided with device functionality to form a stacked foil sheet layered device.
Abstract:
The invention relates to a method of aligning a flexible foil sheet having a general first foil sheet length direction to form stacked foil sheet layers on a reel having a reel diameter. The method comprises providing multiple alignment markers in the foil sheet. distanced conform the reel diameter and each having an mark length direction transverse to the first foil sheet length direction, to form protrusions and corresponding recesses on opposite faces of the foil sheet; winding the foil sheet on the reel in the first foil sheet length direction of the foil sheet; and co-aligning the alignment markers to have protrusions of one mark matching with a recess of another mark, so as to block relative movement of the stacked foil sheet layers in the first foil sheet length direction. Preferably, the foil sheet layers are provided with device functionality to form a stacked foil sheet layered device.
Abstract:
An LED device with improved circuit board LED support structure is presented. A top surface of a thermally-conductive substrate of this LED device comprises a thermally-conductive pillar. The pillar is not covered with a dielectric layer and an LED package is arranged directly on the pillar with the LED packages bottom thermally-conductive plate in direct contact with the pillar top surface.
Abstract:
An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.
Abstract:
An electric circuit configuration having an MID circuit carrier and a connecting interface, the connecting interface being situated on a surface of the MID circuit carrier. The electric circuit configuration further includes at least one electrical contact pair having at least one connecting interface contact element and at least one MID contact element that is provided on the surface and is situated on the connecting interface contact element. The exemplary embodiments and/or exemplary methods of the present invention further relates to a contact element group having at least one electrical contact element for the electrical contacting of an MID circuit carrier, which is developed on a surface of an MID circuit carrier, is electrically connected to it, and extends away from the surface. The at least one contact element is connected to a line element of the MID circuit carrier.
Abstract:
An embedded circuit board structure and a fabricating process thereof are disclosed. The embedded circuit board structure comprises a dielectric layer and a metal layer. The dielectric layer comprises an indentation; the indentation is formed by a plurality of pits, and the pits are substantially perpendicular to the surface of the dielectric layer. The metal layer is formed within the indentation.
Abstract:
A semiconductor package and a fabrication method thereof are disclosed, whereby an environmental problem is solved by using external connection terminals or semiconductor element-mounting terminals containing a smaller amount of lead, while at the same time achieving a fine pitch of the terminals. The semiconductor package includes a board (20) including a plurality of insulating resin layers, semiconductor element-mounting terminals (18) formed on the uppermost surface of the board, and external connection terminals (12) formed on the bottom surface thereof. Each external connection terminal (12) is formed as a bump projected downward from the bottom surface of the package, and each bump is filled with the insulating resin (14) while the surface thereof is covered by a metal (16). Wiring (24), (26) including a conductor via (26a) electrically connect the metal of the metal layer 16 and the semiconductor element-mounting terminals (18).
Abstract:
In a method for hot embossing at least one conductor track onto a substrate, a film having at least one electrically conductive layer is pressed against the substrate in a die direction using an embossing die having a structured die surface. The film remains on the substrate after ending the embossing process in at least two structure planes, which are spaced apart in the die direction.