公开(公告)号：US20090173525A1

公开(公告)日：2009-07-09

申请号：US12338433

申请日：2008-12-18

Applicant: Yoshihiro MORITA

Inventor： Yoshihiro MORITA

IPC: H05K1/00

CPC classification number: H05K1/0366 ,  H01L2924/0002 ,  H05K1/0237 ,  H05K2201/029 ,  H05K2201/09236 ,  H01L2924/00

Abstract: A printed wiring board includes a main body, a plurality of glass fiber yarns disposed in parallel with each other with a predetermined width, a pair of first wirings disposed in parallel with the glass fiber yarns, a pair of second wirings disposed in parallel with the glass fiber yarns, and a pair of connection wirings for connecting the first and the second wiring while being orthogonal to the glass fiber yarns, wherein the glass fiber yarns are separated at the same space as the width of the glass fiber yarns, and the center line of the first wiring and the second wiring are separated at a space of (space between the center lines of the adjacent glass fiber yarns×½+space between the center lines of the adjacent glass fiber yarns×N (N is an integer of at least 0 (zero)).

Abstract translation: 印刷电路板包括主体，以预定宽度彼此平行布置的多个玻璃纤维纱线，与玻璃纤维纱线平行布置的一对第一布线，与第一布线平行布置的一对第二布线 玻璃纤维纱线和一对连接布线，用于在与玻璃纤维纱线正交的同时连接第一和第二布线，其中玻璃纤维纱线在与玻璃纤维纱线的宽度相同的空间处分开，并且中心 第一布线和第二布线的线在相邻的玻璃纤维纱线的中心线之间的间隔x 1/2 +相邻的玻璃纤维纱线xN的中心线之间的间隔（N为至少0的整数（零） ））。

公开(公告)号：US07541678B2

公开(公告)日：2009-06-02

申请号：US11144717

申请日：2005-06-06

Applicant: Yoshihiro Nishida

Inventor： Yoshihiro Nishida

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K1/025 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/09236 ,  H05K2201/09318

Abstract: Disclosed is a printed wiring board comprising an insulating layer having a rectangular flat shape and provided with fibers in the layer, the direction of the fiber in the layer being almost parallel to any side of the rectangle, a reference potential layer disposed on one surface side of the insulating layer, a plurality of wiring patterns for signal transmission disposed on the other surface side of the insulating layer so as to have nearly similar angles respectively with respect to the direction of the fiber in the insulating layer, and a pad portion to mount a semiconductor device, disposed on the other surface side of the insulating layer to conduct the plurality of wiring patterns.

Abstract translation: 公开了一种印刷电路板，其包括具有矩形平面形状并且在该层中设置有纤维的绝缘层，该层中的光纤的方向几乎平行于矩形的任何一侧，基准电位层设置在一个表面侧 绝缘层的多个用于信号传输的布线图案设置在绝缘层的另一个表面侧上，以分别相对于绝缘层中的光纤的方向具有几乎相似的角度;以及焊盘部分，用于安装 半导体器件，设置在绝缘层的另一表面侧，以导通多个布线图案。

公开(公告)号：US20090133906A1

公开(公告)日：2009-05-28

申请号：US12273634

申请日：2008-11-19

Applicant: Jae Myung BAEK

Inventor： Jae Myung BAEK

IPC: H05K1/02 ,  H05K3/36

CPC classification number: H05K1/0218 ,  H05K1/0259 ,  H05K1/0393 ,  H05K3/281 ,  H05K2201/0715 ,  H05K2201/09109 ,  H05K2201/09236 ,  H05K2201/09481 ,  Y10T29/49126

Abstract: A flexible printed circuit board (FPCB) and FPCB manufacturing method that improves a signal transfer characteristic at a high speed. The FPCB includes an insulating layer having a signal pattern that transfers signals, a cover layer formed on the signal pattern, and a shielding layer formed at a position opposite to the signal pattern. The shielding layer faces at least one of the insulating layer and the cover layer across anspace formed there between.

Abstract translation: 一种柔性印刷电路板（FPCB）和FPCB制造方法，其高速地改善信号传递特性。 FPCB包括具有传递信号的信号图案的绝缘层，形成在信号图案上的覆盖层，以及形成在与信号图案相对的位置处的屏蔽层。 屏蔽层面对绝缘层和覆盖层中的至少一个穿过其间形成的空间。

公开(公告)号：US07535963B2

公开(公告)日：2009-05-19

申请号：US10543433

申请日：2004-01-26

Applicant: Willebrordus Gerardus Traa

Inventor： Willebrordus Gerardus Traa

IPC: H04B3/00

CPC classification number: H04L25/0272 ,  H04L5/20 ,  H04L25/028 ,  H04L25/0292 ,  H04L25/085 ,  H05K1/0245 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/09727

Abstract: A data processing circuit has four signal conductors between a driver and a receiver, and first and second, mutually conducting shield planes. First and second signal conductors form a symmetrical stack in a column between the first and the second plane. Third and fourth signal conductors are arranged substantially midway between the first and the second plane, on mutually opposite sides of the stack. The first, second, third and fourth signal conductors have respective widths so that respective transmission line impedances of transmission lines between each particular one of the first, second, third and fourth conductors and the first and second planes are substantially mutually equal.

Abstract translation: 数据处理电路在驱动器和接收器之间具有四个信号导体，以及第一和第二相互导电的屏蔽平面。 第一和第二信号导体在第一和第二平面之间的列中形成对称的堆叠。 第三和第四信号导体大致位于第一和第二平面之间的中间，位于叠层的相互相对的两侧。 第一，第二，第三和第四信号导体具有相应的宽度，使得第一，第二，第三和第四导体中的每个特定的导体与第一和第二平面之间的传输线的相应传输线阻抗基本相等。

公开(公告)号：US07528433B2

公开(公告)日：2009-05-05

申请号：US11456094

申请日：2006-07-07

Applicant: Uei-Ming Jow ,  Chang-Sheng Chen ,  Ying-Jiunn Lai ,  Chin-Sun Shyu

Inventor： Uei-Ming Jow ,  Chang-Sheng Chen ,  Ying-Jiunn Lai ,  Chin-Sun Shyu

IPC: H01L29/00

CPC classification number: H05K1/162 ,  H01G4/232 ,  H01G4/306 ,  H01L23/50 ,  H01L23/5223 ,  H01L28/10 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0298 ,  H05K2201/09236 ,  H05K2201/09672 ,  H01L2924/00

Abstract: A capacitor structure with a cross-coupling design is provided. In the capacitor structure, conductive lines or electrode plates are coupled together by cross coupling an electrode above or below or aside the other electrode. By cross coupling and fewer vias, the largest capacitance value can be obtained within a minimum area. The capacitor structure provided can also be applied to a high-frequency high-speed module or system to enhance noise inhibition capability of a capacitive substrate.

Abstract translation: 提供了具有交叉耦合设计的电容器结构。 在电容器结构中，通过在另一电极上方或下方或旁边交叉耦合电极将导线或电极板耦合在一起。 通过交叉耦合和较少的通孔，可以在最小区域内获得最大的电容值。 所提供的电容器结构也可以应用于高频高速模块或系统，以增强电容性基板的噪声抑制能力。

公开(公告)号：US20090107710A1

公开(公告)日：2009-04-30

申请号：US11977783

申请日：2007-10-26

Applicant: Joel R. Goergen

Inventor： Joel R. Goergen

IPC: H05K1/00 ,  H05K3/36

CPC classification number: H05K1/0242 ,  H01P3/081 ,  H05K1/0245 ,  H05K2201/09236 ,  H05K2201/09745 ,  H05K2201/098 ,  Y10T29/49126

Abstract: Circuit boards and methods for their manufacture are disclosed. The circuit boards carry high-speed signals using conductors formed to include lengthwise channels. The channels increase the surface area of the conductors, and therefore enhance the ability of the conductors to carry high-speed signals. In at least some embodiments, a discontinuity also exists between the dielectric constant within the channels and just outside the channels, which is believed to reduce signal loss into the dielectric material.

Abstract translation: 公开了电路板及其制造方法。 电路板使用形成为包括纵向通道的导体承载高速信号。 通道增加了导体的表面积，从而增强了导体承载高速信号的能力。 在至少一些实施例中，通道内的介电常数和通道之外的介质常数之间也存在不连续性，这被认为可减少信号损耗。

公开(公告)号：US07520757B2

公开(公告)日：2009-04-21

申请号：US11502979

申请日：2006-08-11

Applicant: Victor L. Bartholomew

Inventor： Victor L. Bartholomew

IPC: H01R12/00

CPC classification number: H05K1/0219 ,  H05K1/0201 ,  H05K1/0293 ,  H05K1/117 ,  H05K3/3405 ,  H05K3/3452 ,  H05K2201/0305 ,  H05K2201/062 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/09354 ,  H05K2201/0969 ,  H05K2201/10356 ,  H05K2203/173 ,  Y10S439/943 ,  Y10T29/49155

Abstract: A transition circuit board for transitioning a cable to a connector is provided. A circuit board has an outer surface with a circuit trace, ground plane and ground link provided thereon. A cable pad and a contact pad are provided at opposite ends of the circuit trace. The ground link is electrically common with the ground plane and is located adjacent to, and separated by a space from, the circuit trace. An insulating coating is provided over at least part of the circuit trace, the ground plane and the outer surface of the circuit board. The insulating coating has a mask aperture there-through exposing an uncoated portion of the circuit trace and the ground link. A conductive jumper material is provided on the uncoated portion of the circuit trace and the ground link to electrically join the circuit trace with the ground plane.

Abstract translation: 提供了一种用于将电缆转换到连接器的转换电路板。 电路板具有外表面，其上设置有电路迹线，接地平面和接地链路。 在电路迹线的相对端设有电缆垫和接触垫。 接地链路与接地平面电气相同，并且位于与电路迹线相邻并且与电路迹线隔开的空间中。 在电路板的至少一部分，接地平面和电路板的外表面上提供绝缘涂层。 绝缘涂层在其上具有掩模孔，通过暴露电路迹线的未涂覆部分和接地链路。 在电路迹线的未涂覆部分和接地链路上提供导电跳线材料，以将电路迹线与接地平面电连接。

公开(公告)号：US20090079523A1

公开(公告)日：2009-03-26

申请号：US12190597

申请日：2008-08-13

Applicant: Ti-Ming Hsu

Inventor： Ti-Ming Hsu

IPC: H01P3/08

CPC classification number: H01P3/026 ,  H01P3/081 ,  H01P5/028 ,  H05K1/0253 ,  H05K1/0298 ,  H05K2201/09236 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09627 ,  H05K2201/0969

Abstract: A layout of a circuit board includes a first signal layer, a second signal layer, and a third signal layer. The first signal layer has a transmission line. The second signal layer is stacked below the first signal layer, and has an opening. The third signal layer is stacked below the first and second signal layers with the second signal layer sandwiched between the first and third signal layers. The third signal layer is electrically connected to the second signal layer, and both of the second and third signal layers are ground layers or power layers. An orthogonal projection of a segment of the transmission line on the third signal layer is overlapped with that of the opening on the third signal layer. Therefore, an equivalent impedance of the segment of the transmission line referring to the second and third signal layers can be increased or decreased.

Abstract translation: 电路板的布局包括第一信号层，第二信号层和第三信号层。 第一信号层具有传输线。 第二信号层堆叠在第一信号层下方，并且具有开口。 第三信号层堆叠在第一和第二信号层之下，第二信号层夹在第一和第三信号层之间。 第三信号层电连接到第二信号层，第二信号层和第三信号层都是接地层或功率层。 第三信号层上的传输线段的正交投影与第三信号层上的开口的正交投影重叠。 因此，可以增加或减少参考第二和第三信号层的传输线段的等效阻抗。

公开(公告)号：US20090078576A1

公开(公告)日：2009-03-26

申请号：US12329584

申请日：2008-12-06

Applicant: Ting-Hao Lin ,  Chien-Wei Chang

Inventor： Ting-Hao Lin ,  Chien-Wei Chang

IPC: C25D5/00

CPC classification number: H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/108 ,  H05K3/205 ,  H05K2201/09236 ,  H05K2201/09881 ,  Y10T29/49002 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49155

Abstract: Embedded passive device structure and its manufacturing method for mainly embedding the passive device structure in the printed circuit board are presented. In this structure, both the source electrode and the ground electrode of the passive device belong to the same level, and includes several source branches and several ground branches that are formed vertically on the inside of the dielectric layer of the circuit board which are connected, respectively, to avoid the conducting between the source electrode and the ground electrode during lamination. When it is in the form of the capacitor structure, through the use of the ultra-fine wiring technique, these source branches and ground branches are separated by a small gap between each other. Therefore, the side face area and quantities of the source branches and ground branches are both increased.

Abstract translation: 介绍了嵌入式无源器件结构及其主要将无源器件结构嵌入印刷电路板的制造方法。 在该结构中，无源器件的源电极和接地电极都属于同一水平，并且包括垂直形成在电路板的电介质层的内部的多个源极分支和几个接地分支， 以避免在层压期间源电极和接地电极之间的导电。 当它是电容器结构的形式时，通过使用超细布线技术，这些源极分支和接地分支之间彼此间有很小的间隙。 因此，源分支和接地分支的侧面积和数量都增加。

公开(公告)号：US20090061684A1

公开(公告)日：2009-03-05

申请号：US12203270

申请日：2008-09-03

Applicant: Thomas S. Cohen ,  Marc B. Cartier, JR. ,  Mark W. Gailus

Inventor： Thomas S. Cohen ,  Marc B. Cartier, JR. ,  Mark W. Gailus

IPC: H01R24/00 ,  H01R13/648

CPC classification number: H05K7/1445 ,  H01R13/514 ,  H01R13/6587 ,  H01R13/6591 ,  H05K1/0231 ,  H05K1/0237 ,  H05K1/116 ,  H05K1/14 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09718 ,  H05K2201/10189 ,  H05K2203/1572

Abstract: A midplane has a first side to which contact ends of a first differential connector are connected and a second side opposite the first side to which contact ends of a second differential connector are connected. The midplane includes a plurality of vias extending from the first side to the second side, with the vias providing first signal launches on the first side and second signal launches on the second side. The first signal launches are provided in a plurality of rows, with each row having first signal launches along a first line and first signal launches along a second line substantially parallel to the first line. The second signal launches are provided in a plurality of columns, with each column having second signal launches along a third line and second signal launches along a fourth line substantially parallel to the third line.

Abstract translation: 中平面具有连接第一差分连接器的接触端的第一侧和与第二差分连接器的接触端连接的第一侧相对的第二侧。 中平面包括从第一侧延伸到第二侧的多个通孔，其中通孔在第一侧上提供第一信号发射，而第二信号在第二侧上发射。 第一信号发射被设置成多行，每行具有沿着第一线的第一信号发射，并且第一信号沿着基本上平行于第一线的第二线发射。 第二信号发射被提供在多列中，每列具有沿着第三线的第二信号发射，而第二信号沿着基本上平行于第三线的第四线发射。