Abstract:
An electrical circuit apparatus (300) that includes; a substrate (330) having a top side, a ground layer (336), at least one thermal aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate, the adhesive layer having at least one aperture (322) wherein aligning the at least one substrate solder aperture with the at least one adhesive layer aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.
Abstract:
The disclosed board fabrication techniques and design features enable the construction of a reliable, high-layer-count, and economical backplane for routers and the like that require a large number of signaling paths across the backplane at speeds of 2.5 Gbps or greater, as well as distribution of significant amounts of power to router components. The disclosed techniques and features allow relatively thick (e.g., three- or four-ounce copper) power distribution planes to be combined with large numbers of high-speed signaling layers in a common backplane. Using traditional techniques, such a construction would not be possible because of the number of layers required and the thickness of the power distribution layers. The disclosed embodiments use novel layer arrangements, material selection, processing techniques, and panel features to produce the desired high-speed layers and low-noise high-power distribution layers in a single mechanically stable board.
Abstract:
An apparatus comprises a signal layer including a first and second signal trace. The apparatus also comprises a first reference plane including a first slot substantially parallel to the first and second signal traces. Further, the apparatus includes a dielectric layer having at least a portion disposed between the signal layer and the first reference plane.
Abstract:
A multi-layered structure and method of formation. A page is generated by stacking N substructures (N≧2) in an ordered sequence. A first substructure of each pair of adjacent substructures comprises liquid crystal polymer (LCP) dielectric material to be bonded with a second substructure of a pair of the adjacent substructure. The page is subjected to a temperature less than the lowest nematic-to-isotropic transition temperature of the LCP dielectric materials within the page. The dwell time and elevated pressure are sufficient to cause all LCP dielectric material within the page to plastically deform and laminate each pair of adjacent substructures without any extrinsic adhesive layer disposed between the first and second substructures of each pair of adjacent substructures.
Abstract:
A novel backplane interconnection system that is useful in the telecommunication and data process industries for ultra high speed backplane systems. It is capable of transmitting digital signals with bandwidths of 10 GHz and beyond. The invention provides high performance at a low cost of manufacture. It is suitable for use in a wide variety of system applications. One embodiment of the invention comprises an air dielectric and copper conductor matched impedance transmission line system that interconnects daughter cards in a conventional backplane configuration. The high speed transmission-line structure is continuous through the backplane-daughter card and return path. Such embodiment are also integrated with conventional printed circuit backplanes or be a stand-alone device.
Abstract:
An in-line distortion generator is coupled to an RF amplifier on a single PC board for producing an output signal of useful amplitude but with low composite triple beat and cross modulation distortions. The backplane under the section of the PC board upon which the distortion circuit resides is removed and the portion of the heat sink under the removed portion of the backplane is also removed. This eliminates any parasitic capacitances that could degrade the performance of the RF amplifier, thereby making the distortion circuit transparent to the RF amplifier. Furthermore, the layout of the predistortion circuitry has been specifically designed to enhance the performance of the circuitry without inducing any negative operating characteristics on the associated RF amplifier.
Abstract:
A resonant via-type connection between layers of a multilayer support structure having, at predetermined RF frequencies, a very low, effectively short circuit impedance. The resonant vias utilize the inductance of a via post by forming it into a resonant circuit with a capacitance at the via's distal end coupled to another conductor. A plurality of resonant vias can be formed having respective plurality of resonant frequencies to form a wideband connection. The capacitances at the vias' distal ends coupling to another conductor can be formed to resonate with the total series inductance of the via post and of wire connections to an attached device.
Abstract:
A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.
Abstract:
A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.
Abstract:
A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.