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    Wiring Board
    21.
    发明申请
    Wiring Board 审中-公开
    接线板

    公开(公告)号：US20070246250A1

    公开(公告)日：2007-10-25

    申请号：US11662269

    申请日：2005-09-06

    Applicant: Yoshihiro Tomita ,  Tadashi Nakamura

    Inventor： Yoshihiro Tomita ,  Tadashi Nakamura

    IPC: H05K3/00 ,  H05K1/00 ,  H05K3/46

    CPC classification number: H05K1/189 ,  H05K1/111 ,  H05K1/118 ,  H05K3/4602 ,  H05K2201/055 ,  H05K2201/09445 ,  Y10T29/49124 ,  Y10T29/49149

    Abstract: [PROBLEMS]To provide a multilayer wiring board wherein high density wiring exceeding the application limit of the conventional build up wiring boards is made possible. [MEANS FOR SOLVING PROBLEMS]A wiring board is provided with a board, which is formed by stacking along a board flat plane direction of a plurality of dielectric layers arranged along a facing direction of the both main surfaces of the board, and an inner conductor pattern arranged on the surface of the dielectric layer. The adjacent dielectric layers are formed so as to interconnect by being continuously and integrally coupled with each other through being connected at the layer edges on one of the board main planes. The connecting portions of the adjacent dielectric layers are alternately provided on one of the board main planes, and the dielectric layers are formed in a shape of one dielectric sheet that is arranged by being bent.

    Abstract translation: [问题]提供一种多层布线板，其中可以实现超过常规堆积布线板的施加极限的高密度布线。 解决问题的手段一种布线板设置有沿着沿着板的两个主表面的相对方向布置的多个电介质层的板平面方向堆叠而形成的板，以及内导体 图案布置在电介质层的表面上。 形成相邻的电介质层，以便通过连接在一个板主平面上的层边缘处，通过彼此连续地和一体地连接而相互连接。 相邻电介质层的连接部分交替地设置在一个板主平面上，并且电介质层形成为通过弯曲而布置的一个电介质片的形状。

    Thin multichip flex-module
    24.
    发明申请
    Thin multichip flex-module 有权
    薄多芯片柔性模块

    公开(公告)号：US20070211426A1

    公开(公告)日：2007-09-13

    申请号：US11715205

    申请日：2007-03-07

    Applicant: James E. Clayton ,  Zakaryae Fathi

    Inventor： James E. Clayton ,  Zakaryae Fathi

    IPC: H05K7/20

    CPC classification number: H05K1/189 ,  H01L23/473 ,  H01L23/5387 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K3/0061 ,  H05K3/0064 ,  H05K2201/056 ,  H05K2201/064 ,  H05K2201/09445 ,  H05K2201/2018 ,  H01L2924/00

    Abstract: A multichip module comprises: a first rigid member defining one outer wall of a chamber; a second rigid member defining the opposite wall of the chamber; a sealable interface joining the first and second rigid members at their peripheries, whereby a hollow chamber is formed; a flex circuit having a plurality of integrated circuit chips disposed thereon, the flex circuit affixed to at least one of the first and second rigid members; electrical contacts at least partially extending outward through the sealable interface; and, a fluid inlet and a fluid outlet configured to permit fluid to flow through the chamber whereby heat generated by the integrated circuit chips may be removed from the module.

    Abstract translation: 多芯片模块包括：限定室的一个外壁的第一刚性构件; 限定所述腔室的相对壁的第二刚性构件; 可密封的界面，在其周边处连接第一和第二刚性构件，由此形成中空室; 具有设置在其上的多个集成电路芯片的柔性电路，所述柔性电路固定到所述第一和第二刚性构件中的至少一个; 至少部分地通过可密封界面向外延伸的电触点; 以及流体入口和流体出口，其构造成允许流体流过所述室，由此可以从模块移除由集成电路芯片产生的热量。

    Leaded package integrated circuit stacking
    25.
    发明授权
    Leaded package integrated circuit stacking 有权
    引线封装集成电路堆叠

    公开(公告)号：US07259452B2

    公开(公告)日：2007-08-21

    申请号：US11248662

    申请日：2005-10-11

    Applicant: James Douglas Wehrly, Jr. ,  David Roper

    Inventor： James Douglas Wehrly, Jr. ,  David Roper

    IPC: H01L23/02

    CPC classification number: H05K1/147 ,  H01L23/49827 ,  H01L23/5387 ,  H01L25/105 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H05K1/141 ,  H05K1/189 ,  H05K3/3421 ,  H05K2201/049 ,  H05K2201/056 ,  H05K2201/09445 ,  H05K2201/10515 ,  H05K2201/10689 ,  H01L2924/00

    Abstract: A system and method for electrically and thermally coupling adjacent IC packages to one another in a stacked configuration is provided. A flex circuit is inserted in part between ICs to be stacked and provides a connective field that provides plural contact areas that connect to respective leads of the ICs. Thus, the flex does not require discrete leads which must be individually aligned with the individual leads of the constituent ICs employed in the stack. The principle may be employed to aggregate two or more contact areas for respective connection to leads of constituent ICs but is most profitably employed with a continuous connective field that provides contact areas for many leads of the ICs.

    Abstract translation: 提供了一种用于将堆叠配置中的相邻IC封装彼此电和热耦合的系统和方法。 将柔性电路部分地插入待堆叠的IC之间，并提供连接到IC的各个引线的多个接触区域的连接场。 因此，flex不需要离散引线，它们必须与堆叠中采用的构成IC的单个引线单独对准。 该原理可以用于聚合两个或更多个接触区域，以用于分别连接到构成IC的引线，但是对于提供IC的许多引线的接触面积的连续连接场最有利地使用。

    Modified core for circuit module system and method
    26.
    发明申请
    Modified core for circuit module system and method 有权
    电路模块系统和方法的改进核心

    公开(公告)号：US20060198238A1

    公开(公告)日：2006-09-07

    申请号：US11397597

    申请日：2006-04-03

    Applicant: Julian Partridge ,  David Roper ,  Paul Goodwin

    Inventor： Julian Partridge ,  David Roper ,  Paul Goodwin

    IPC: G11C8/18

    CPC classification number: H05K1/189 ,  H05K1/0203 ,  H05K1/11 ,  H05K1/181 ,  H05K3/0061 ,  H05K2201/056 ,  H05K2201/09445 ,  H05K2201/10159 ,  H05K2201/1056 ,  H05K2201/10734 ,  H05K2203/1572

    Abstract: Flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both of its major sides. The populated flexible circuitry is disposed proximal to a rigid substrate to place the integrated circuitry on one or both sides of the substrate with one or two layers of integrated circuitry on one or both sides of the substrate. The rigid substrate exhibits adhesion features that allow more advantageous use of thermoplastic adhesives with concomitant rework advantages and while providing flexibility in meeting dimensional specifications such as those promulgated by JEDEC, for example.

    Abstract translation: 灵活的电路填充有沿其主要一侧或两侧设置的集成电路（IC）。 填充的柔性电路设置在刚性衬底附近，以将集成电路放置在衬底的一侧或两侧上，在衬底的一侧或两侧上具有一层或两层集成电路。 刚性基材表现出粘合特征，其允许更有利地使用具有伴随返工优点的热塑性粘合剂，并且同时提供满足例如由JEDEC公布的尺寸规格的柔性。

    Printed circuit board terminal device
    30.
    发明授权
    Printed circuit board terminal device 失效
    印刷电路板终端设备

    公开(公告)号：US4680675A

    公开(公告)日：1987-07-14

    申请号：US725814

    申请日：1985-04-22

    Applicant: Hideo Sato

    Inventor： Hideo Sato

    IPC: H01J17/34 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H05K3/36 ,  H05K7/06

    CPC classification number: H01R12/62 ,  H05K1/118 ,  H05K3/361 ,  H05K1/189 ,  H05K2201/09445 ,  H05K2201/10128 ,  H05K2201/10136 ,  H05K2201/10681 ,  H05K2201/10689

    Abstract: A printed circuit terminal device which includes a terminal array having very fine pitch between lead lines from a circuit portion including a flexible printed circuit board having a terminal array pattern which corresponds to the terminal array and wiring pattern and which are arranged to alternately extend from two sides of the terminal array pattern thus changing the pitch of the wiring pattern on the flexible printed circuit board to be twice that of the pitch of the wiring pattern of the terminal array. This allows a circuit to be easily and reliably coupled to the electrical terminals having very fine pitch and the formation of the wiring pattern of a coupling portion with the circuit portion can be easily performed and results in an arrangement of very small size. The flexible printed circuit board can be manufactured at low cost and the yield can be increased. Also, circuit elements such as resistors can be mounted on the wiring pattern without changing the wiring pitch.

    Abstract translation: 一种印刷电路端子装置，其包括端子阵列，该引线从包括具有对应于端子阵列的端子阵列图案的柔性印刷电路板和布线图案的电路部分的引线之间具有非常细的间距，并且布置成从两个 从而将柔性印刷电路板上的布线图案的间距改变为端子阵列的布线图案的间距的两倍。 这允许电路容易且可靠地耦合到具有非常细间距的电端子，并且可以容易地执行与电路部分的耦合部分的布线图案的形成，并且导致非常小的尺寸的布置。 可以以低成本制造柔性印刷电路板，并且可以提高成品率。 此外，诸如电阻器的电路元件可以安装在布线图案上而不改变布线间距。

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