公开(公告)号：US20160309578A1

公开(公告)日：2016-10-20

申请号：US14992904

申请日：2016-01-11

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Heung Kil PARK

IPC: H05K1/02 ,  H05K1/18 ,  H01G4/30 ,  H01G4/248 ,  H01G4/12 ,  H01G4/012

CPC classification number: H01G4/248 ,  H01G2/06 ,  H01G4/012 ,  H01G4/232 ,  H01G4/30 ,  H01G4/38 ,  H01L41/053 ,  H01L41/083 ,  H05K1/0306 ,  H05K1/141 ,  H05K2201/10015 ,  H05K2201/10378 ,  H05K2201/1053 ,  H05K2201/10962

Abstract: A capacitor component includes a capacitor including a plurality of internal electrodes, a capacitor body containing a piezoelectric material disposed in at least regions between the plurality of internal electrodes, and external electrodes connected to the plurality of internal electrodes; and an interposer disposed to be coupled to the capacitor and including a buffer substrate containing a buffer material having a degree of piezoelectricity lower than that of the piezoelectric material, and connection electrodes electrically connected to the external electrodes.

Abstract translation: 电容器部件包括：包括多个内部电极的电容器;包含设置在所述多个内部电极之间的至少区域中的压电材料的电容器体以及与所述多个内部电极连接的外部电极; 以及插入器，其设置成耦合到所述电容器并且包括缓冲基板，所述缓冲基板包含压电度低于所述压电材料的缓冲材料，以及电连接到所述外部电极的连接电极。

公开(公告)号：US20160295683A1

公开(公告)日：2016-10-06

申请号：US15090231

申请日：2016-04-04

Applicant: DENSO CORPORATION

Inventor： Takayuki Uchida

IPC: H05K1/02 ,  H05K1/18

CPC classification number: H05K1/0209 ,  H05K7/20463 ,  H05K2201/066 ,  H05K2201/10522 ,  H05K2201/1053 ,  H05K2201/1056

Abstract: Heating elements are mounted on a substrate. A heat sink is provided to be capable of releasing heat of the heating elements. Each radiating component is provided between a corresponding one of the heating elements and the heat sink, and is provided in a corresponding one of radiating regions. Each radiating region includes a corresponding one of mounting portions of the heating elements. A gap part is formed in an area surrounded by the radiating components each of which is provided at a corresponding one of the radiating regions. Each heating element is located in a corresponding one of the radiating regions. There is not any one of the radiating components disposed at the gap part.

Abstract translation: 加热元件安装在基板上。 提供散热器以能够释放加热元件的热​​量。 每个辐射部件设置在相应的一个加热元件和散热器之间，并且设置在相应的一个辐射区域中。 每个辐射区域包括加热元件的相应的一个安装部分。 在由辐射部件围绕的区域中形成间隙部分，每个辐射部件设置在相应的一个辐射区域。 每个加热元件位于相应的一个辐射区域中。 辐射部件中没有任何一个设置在间隙部分。

公开(公告)号：US09460840B2

公开(公告)日：2016-10-04

申请号：US13040096

申请日：2011-03-03

Applicant: Fikret Altunkilic ,  Haki Cebi

Inventor： Fikret Altunkilic ,  Haki Cebi

IPC: H01F5/00 ,  H01F27/28 ,  H03H7/01 ,  H01F17/00 ,  H03H1/00

CPC classification number: H01L23/645 ,  H01F17/0013 ,  H01F41/041 ,  H01F2017/0046 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L23/60 ,  H01L23/66 ,  H01L28/60 ,  H01L2223/665 ,  H01L2223/6677 ,  H03H1/0007 ,  H05K1/18 ,  H05K3/32 ,  H05K2201/10015 ,  H05K2201/1053 ,  Y10T29/4902

Abstract: Apparatuses and methods for providing inductance are disclosed. In one embodiment, a method for providing an inductor includes forming an electrical circuit on a substrate, forming a seal ring around the perimeter of the electrical circuit, providing a break in at least one layer of the seal ring, and electrically connecting the seal ring such that the seal ring operates as an inductor.

Abstract translation: 公开了用于提供电感的装置和方法。 在一个实施例中，一种用于提供电感器的方法包括在基板上形成电路，在电路周围形成密封环，在密封环的至少一层中提供断裂，并将密封环 使得密封环作为电感器工作。

公开(公告)号：US09457743B2

公开(公告)日：2016-10-04

申请号：US14230475

申请日：2014-03-31

Applicant: Johnson Controls Technology Company

Inventor： Edward J. Soleski ,  Mikhail S. Balk ,  Richard M. DeKeuster

IPC: B60R16/03 ,  H02J7/00 ,  G01R31/36 ,  H01M10/04 ,  H01M10/42 ,  H01M10/058 ,  H01M2/24 ,  H01M2/20 ,  H01M2/34 ,  H01H47/32 ,  H01M10/48 ,  H05K1/18 ,  H05K3/32 ,  B60L11/18 ,  H01M2/12 ,  H01M2/10 ,  H01R12/71 ,  H05K1/02 ,  H02H7/18 ,  G01R31/02

CPC classification number: H01M2/22 ,  B60L1/003 ,  B60L1/02 ,  B60L1/14 ,  B60L3/0046 ,  B60L3/12 ,  B60L11/123 ,  B60L11/14 ,  B60L11/1803 ,  B60L11/1851 ,  B60L11/1861 ,  B60L11/1864 ,  B60L11/1874 ,  B60L11/1877 ,  B60L11/1879 ,  B60L15/20 ,  B60L2210/10 ,  B60L2210/40 ,  B60L2240/34 ,  B60L2240/545 ,  B60L2240/547 ,  B60L2240/549 ,  B60L2250/10 ,  B60L2260/26 ,  B60L2270/20 ,  B60R16/03 ,  B60R16/033 ,  G01R31/025 ,  G01R31/362 ,  G01R31/3627 ,  H01H47/325 ,  H01M2/1077 ,  H01M2/1205 ,  H01M2/1211 ,  H01M2/1252 ,  H01M2/20 ,  H01M2/206 ,  H01M2/24 ,  H01M2/305 ,  H01M2/32 ,  H01M2/34 ,  H01M2/342 ,  H01M4/661 ,  H01M4/665 ,  H01M10/04 ,  H01M10/0413 ,  H01M10/058 ,  H01M10/425 ,  H01M10/4257 ,  H01M10/482 ,  H01M10/486 ,  H01M10/6551 ,  H01M2010/4271 ,  H01M2010/4278 ,  H01M2200/103 ,  H01M2220/20 ,  H01M2250/20 ,  H01R12/716 ,  H02H7/18 ,  H02J7/0021 ,  H02J7/0063 ,  H05K1/0262 ,  H05K1/0263 ,  H05K1/18 ,  H05K3/32 ,  H05K2201/10492 ,  H05K2201/1053 ,  H05K2201/10545 ,  Y02T10/6217 ,  Y02T10/645 ,  Y02T10/7005 ,  Y02T10/7016 ,  Y02T10/7044 ,  Y02T10/705 ,  Y02T10/7061 ,  Y02T10/7077 ,  Y02T10/7216 ,  Y02T10/7241 ,  Y02T10/7275 ,  Y10T29/49108 ,  Y10T29/4911 ,  Y10T29/49114

Abstract: A terminal for a battery module and a method of manufacture of the terminal are provided. The battery module may include a plurality of battery cells and a bus bar. The bus bar may be electrically coupled to the plurality of battery cells. The battery module also may include a battery terminal that carries a voltage from the bus bar. The battery terminal may include a generally cylindrical terminal portion and a connector. The connector may be coupled to the bus bar cell interconnect. The battery terminal also may include a bent portion. The bent portion is disposed between the terminal portion and the connector.

Abstract translation: 提供一种电池模块的端子和端子的制造方法。 电池模块可以包括多个电池单元和汇流条。 母线可以电耦合到多个电池单元。 电池模块还可以包括承载来自母线的电压的电池端子。 电池端子可以包括大致圆柱形的端子部分和连接器。 连接器可以耦合到汇流条单元互连。 电池端子也可以包括弯曲部分。 弯曲部分设置在端子部分和连接器之间。

公开(公告)号：US20150359098A1

公开(公告)日：2015-12-10

申请号：US14758195

申请日：2013-07-24

Applicant: HANA MICRON INC.

Inventor： Jin Young Ock

IPC: H05K1/14 ,  H05K1/18 ,  H05K3/40 ,  H05K3/18 ,  H05K3/30 ,  H05K3/32 ,  H05K1/11 ,  H05K3/26

CPC classification number: H05K1/14 ,  H01L21/486 ,  H01L21/568 ,  H01L23/147 ,  H01L23/5384 ,  H01L24/19 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2518 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19104 ,  H01L2924/19105 ,  H05K1/115 ,  H05K1/181 ,  H05K1/185 ,  H05K3/181 ,  H05K3/26 ,  H05K3/303 ,  H05K3/32 ,  H05K3/4038 ,  H05K3/4602 ,  H05K2201/10159 ,  H05K2201/10378 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/0191 ,  H05K2203/1469 ,  Y02P70/611 ,  Y10T29/49131 ,  Y10T29/49149 ,  H01L2924/00

Abstract: The present invention relates to a circuit board having an interposer embedded therein, including: an interposer, the top side and back side of which are electrically connected by a first through-electrode; and a molding member having the interposer embedded therein and the top side and back side of the interposer exposed. According to the present invention, the molding member of an insulator and the interposer of a semiconductor can be appropriately selected and coupled according to the required fine pitch of a through-hole, and the interposer is molded on substantially the same level as a semiconductor chip, and thus no additional process for embedding the interposer needs to be added.

Abstract translation: 本发明涉及一种嵌入其中的内插器的电路板，包括：插入件，其顶侧和背面通过第一通孔电连接; 以及嵌入在其中并且插入件的顶侧和背面暴露的模制构件。 根据本发明，绝缘体的成型构件和半导体的插入件可以根据通孔的所需精细间距适当地选择和耦合，并且插入器被模制在与半导体芯片基本相同的水平上 ，因此不需要添加用于嵌入插件的附加处理。

公开(公告)号：US09192050B2

公开(公告)日：2015-11-17

申请号：US13765650

申请日：2013-02-12

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sung Yeol Park ,  Suk Jin Ham ,  Jung Tae Park ,  Seung Heon Han ,  Jung Eun Noh

IPC: H05K3/30 ,  H05K1/18 ,  H05K3/46

CPC classification number: H05K1/185 ,  H01L2224/04105 ,  H01L2224/19 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/15153 ,  H05K3/4644 ,  H05K3/4697 ,  H05K2201/10515 ,  H05K2201/1053 ,  Y10T29/4913

Abstract: Disclosed herein is a method of manufacturing a printed circuit board, including; forming an electronic component including an electrode that is formed on at least one side of a body; forming terminals on an upper portion of the electrode and an upper portion of the body; providing a substrate in which a cavity is formed; mounting the electronic component formed with the terminals in the cavity of the substrate; and forming a buildup layer on an upper portion of the substrate and an upper portion of the electronic component.

Abstract translation: 本文公开了一种制造印刷电路板的方法，包括： 形成包括形成在主体的至少一侧的电极的电子部件; 在电极的上部形成端子和主体的上部; 提供其中形成空腔的基板; 将形成有端子的电子部件安装在基板的空腔中; 以及在所述基板的上部和所述电子部件的上部形成积聚层。

公开(公告)号：US09105483B2

公开(公告)日：2015-08-11

申请号：US13404408

申请日：2012-02-24

Applicant: Ellis Chau ,  Reynaldo Co ,  Roseann Alatorre ,  Philip Damberg ,  Wei-Shun Wang ,  Se Young Yang

Inventor： Ellis Chau ,  Reynaldo Co ,  Roseann Alatorre ,  Philip Damberg ,  Wei-Shun Wang ,  Se Young Yang

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H01L25/00 ,  H01L23/495 ,  H01L21/48 ,  H01L23/367 ,  H01L23/433 ,  H01L21/56 ,  H01L25/065 ,  H05K3/34

CPC classification number: H01L24/85 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/16 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48997 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/851 ,  H01L2224/8518 ,  H01L2224/85399 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1715 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/3511 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  Y10T29/49149 ,  Y10T29/49151 ,  H01L2224/45664 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

Abstract: A microelectronic package can include wire bonds having bases bonded to respective ones of conductive elements exposed at a surface of a substrate. The wire bonds may have exterior edge surfaces disposed at an angle between 25° and 90° relative to the bases, and ends remote, e.g., opposite, from the bases, and remote from the ends which are connected to the bases. A dielectric encapsulation layer extends from the substrate and covers portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds that are uncovered by the encapsulation layer, the unencapsulated portions including the ends of the wire bonds.

Abstract translation: 微电子封装可以包括引线键合，其具有接合到在衬底的表面处暴露的导电元件的相应导电元件的基底。 线接合可以具有相对于基部以25°和90°之间的角度设置的外部边缘表面，并且远离基部远离，例如相反，并且远离连接到基部的端部。 电介质封装层从衬底延伸并覆盖引线接合的部分，使得引线键合的被覆部分通过封装层彼此分开，其中引线键合的未封装部分由引线键的部分限定， 被封装层覆盖的未包封部分包括引线的端部。

公开(公告)号：US20150179608A1

公开(公告)日：2015-06-25

申请号：US14273485

申请日：2014-05-08

Applicant: SK HYNIX INC.

Inventor： Ki Jun SUNG ,  Seung Jee KIM ,  Jong Hyun NAM ,  Sang Yong LEE ,  Young Geun YOO

IPC: H01L25/065 ,  H01L23/00

CPC classification number: H01L25/0652 ,  H01L23/5389 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L25/03 ,  H01L2224/09134 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/2101 ,  H01L2224/215 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73209 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2225/06541 ,  H01L2924/15153 ,  H01L2924/181 ,  H05K1/185 ,  H05K3/4697 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/01029

Abstract: An embedded package includes a first semiconductor chip embedded in a package substrate, a second semiconductor chip disposed over a first surface of the package substrate, and a group of external connection joints disposed on the first surface of the package substrate and between a sidewall of the second semiconductor chip and an edge of the embedded package. Related memory cards and related electronic systems are also provided.

Abstract translation: 嵌入式封装包括嵌入在封装衬底中的第一半导体芯片，设置在封装衬底的第一表面上的第二半导体芯片和设置在封装衬底的第一表面上以及位于封装衬底的侧壁之间的一组外部连接接头 第二半导体芯片和嵌入式封装的边缘。 还提供了相关的存储卡和相关的电子系统。

公开(公告)号：US09041227B2

公开(公告)日：2015-05-26

申请号：US13795811

申请日：2013-03-12

Applicant: Invensas Corporation

Inventor： Ellis Chau ,  Reynaldo Co ,  Roseann Alatorre ,  Philip Damberg ,  Wei-Shun Wang ,  Se Young Yang

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H01L25/00 ,  H01L23/495 ,  H01L21/48 ,  H01L23/367 ,  H01L23/433 ,  H01L21/56 ,  H01L25/065 ,  H05K3/34

CPC classification number: H01L24/85 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/16 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48997 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/851 ,  H01L2224/8518 ,  H01L2224/85399 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1715 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/3511 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  Y10T29/49149 ,  Y10T29/49151 ,  H01L2224/45664 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

Abstract: A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.

Abstract translation: 微电子封装包括具有第一表面的衬底。 微电子元件覆盖在第一表面上。 导电元件在衬底的第一表面处露出，其中至少一些电连接到微电子元件。 封装包括引线键合，其具有接合到相应的导电元件的底部和远离基板的远离基座的端部。 线接合的端部限定在引线接合的尖端处，并且引线键合限定了基部和其尖端之间的相应的第一直径。 尖端具有至少一个尺寸小于引线接合的相应第一直径。 电介质封装层覆盖引线接合的部分，并且引线键合的未封装部分由引线键合的部分限定，包括末端，被封装层覆盖。

公开(公告)号：US20150131202A1

公开(公告)日：2015-05-14

申请号：US14536032

申请日：2014-11-07

Applicant: TDK Corporation

Inventor： Sunao MASUDA ,  Katsumi Kobayashi ,  Akitoshi Yoshii

IPC: H01G2/04 ,  H01G4/012 ,  H01G4/38 ,  H01G4/12 ,  H01G2/10 ,  H01G4/30 ,  H01G4/228

CPC classification number: H01G2/106 ,  H01G2/06 ,  H01G4/12 ,  H01G4/232 ,  H01G4/30 ,  H01G4/38 ,  H05K3/3426 ,  H05K2201/1053 ,  H05K2201/10537 ,  H05K2201/10636 ,  H05K2201/10946 ,  Y02P70/611

Abstract: The present invention is ceramic electronic component with metal terminals comprising a chip component of approximately parallelepiped shape having a pair of terminal electrodes, and a pair of metal terminal parts provided in accordance with said terminal electrodes. The terminal electrode is formed by wrapping around a part of side faces from an end face of the chip component. The metal terminal part comprises a connecting part connecting to the terminal electrode and including a connecting face extending approximately parallel to the end face, plurality of joint parts connecting to the connecting part and including a joint face extending in a different direction of the connecting face, and plurality of mounting parts connecting to the joint parts and including a mounting part upper face extending approximately parallel to any one of the side faces which is different direction of the joint face by taking predetermined spaces.

Abstract translation: 本发明是具有金属端子的陶瓷电子部件，其包括具有一对端子电极的大致平行六面体形状的芯片部件和根据所述端子电极设置的一对金属端子部。 端子电极通过从芯片部件的端面缠绕在一部分侧面上而形成。 金属端子部分包括连接到端子电极并且包括大致平行于端面延伸的连接面的连接部分，多个连接部分连接到连接部分并且包括沿连接面的不同方向延伸的接合面， 以及连接到接合部分的多个安装部件，并且包括安装部分上表面，该安装部分上表面通过采取预定的空间而大致平行于与接合面的不同方向的任何一个侧面延伸。