公开(公告)号：US20080138973A1

公开(公告)日：2008-06-12

申请号：US12027106

申请日：2008-02-06

Applicant: Kyle K. Kirby ,  Salman Akram ,  David R. Hembree ,  Sidney B. Rigg ,  Warren M. Farnworth ,  William M. Hiatt

Inventor： Kyle K. Kirby ,  Salman Akram ,  David R. Hembree ,  Sidney B. Rigg ,  Warren M. Farnworth ,  William M. Hiatt

IPC: H01L21/44 ,  H01L21/768

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/0306 ,  H05K3/4038 ,  H05K3/422 ,  H05K3/423 ,  H05K2201/0305 ,  H05K2201/09827 ,  H05K2203/072 ,  H05K2203/1147 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.

Abstract translation: 本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微电子器件中形成互连的方法。 在一个实施例中，一种方法包括提供具有正面和背面的微电子衬底。 衬底具有包括集成电路的微电子管芯和可操作地耦合到集成电路的端子。 该方法还包括至少部分地形成通过基底并且在基底的前侧和/或后侧具有开口的通道。 该方法还包括用封闭通道一端的导电盖密封开口，同时通道的另一端保持打开。 该方法然后包括用导电材料填充通道。

公开(公告)号：US20080048695A1

公开(公告)日：2008-02-28

申请号：US11842445

申请日：2007-08-21

Applicant: Nobuyuki ASHIDA

Inventor： Nobuyuki ASHIDA

IPC: G01R31/02 ,  H01R12/04

CPC classification number: H05K1/0268 ,  G01R31/2818 ,  H01R12/526 ,  H05K1/0293 ,  H05K3/0052 ,  H05K2201/0305

Abstract: According to an embodiment of a circuit substrate of the present invention, in a circuit substrate provided with a plurality of circuit blocks formed on a single substrate, at least one of the metal patterns connecting the circuit blocks is separated into two sections at some midpoint of wiring, and exposed conductor portions whose end portions are to be bridge-connected through soldering are provided at the end portions in the separated portion of the separated two wiring metal patterns.

Abstract translation: 根据本发明的电路基板的一个实施例，在设置有形成在单个基板上的多个电路块的电路基板中，连接电路块的金属图案中的至少一个在一些中间点被分成两部分 在分离的两个布线金属图案的分离部分的端部设置布线和露出的导体部分，其端部将通过焊接桥接。

公开(公告)号：US07278564B2

公开(公告)日：2007-10-09

申请号：US10839283

申请日：2004-05-06

Applicant: Atsushi Saito

Inventor： Atsushi Saito

IPC: B23K31/00 ,  B23K31/02

CPC classification number: H01L24/83 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/05573 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29355 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/3025 ,  H05K1/112 ,  H05K3/4038 ,  H05K3/4069 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/05599

Abstract: The invention provides a method of mounting an electronic component where an electronic component can be reliably electrically-connected to a substrate. A substrate defines a through-hole that extends through the substrate, from connection electrodes formed on the lower surface of the substrate, to the upper surface of the substrate. A low melting point metal is connected to the connection electrodes and fills the through-hole. A bump and the low melting point metal are alloyed and bonded by heating the low melting point metal while pressing the bump formed on an electrode pad of an electronic component, with respect to a front end of the low melting point metal. The active surface of the electronic component is sealed by the upper surface of the substrate.

Abstract translation: 本发明提供了一种安装电子部件的方法，其中电子部件可以可靠地电连接到基板。 衬底限定了从衬底的下表面上形成的连接电极延伸到衬底的通孔到衬底的上表面。 低熔点金属连接到连接电极并填充通孔。 通过在相对于低熔点金属的前端挤压形成在电子部件的电极焊盘上的凸块的同时加热低熔点金属，将凸块和低熔点金属合金化并结合。 电子部件的有源表面被基板的上表面密封。

公开(公告)号：US20070187141A1

公开(公告)日：2007-08-16

申请号：US11354515

申请日：2006-02-15

Applicant: Victor Bartholomew

Inventor： Victor Bartholomew

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K1/117 ,  H05K1/029 ,  H05K1/0293 ,  H05K1/116 ,  H05K3/3405 ,  H05K2201/0305 ,  H05K2201/049 ,  H05K2201/0949 ,  H05K2201/09809 ,  H05K2201/10189 ,  H05K2201/10356 ,  H05K2203/173

Abstract: A circuit board for transitioning a cable to a connector comprises a circuit board having an outer surface. A circuit trace provided on the outer surface has a cable pad and a contact pad provided at different ends of the outer surface. A ground plane is held by the circuit board. A ground link on the outer surface is connected to the ground plane. The circuit trace and the ground link are located immediately adjacent one another. A resistive coating is provided over the circuit trace and the outer surface of the circuit board. The resistive coating has a mask aperture there-through exposing an uncoated portion of the circuit trace and exposing the ground link to the ground plane. A conductive jumper material is provided on the uncoated portion of the circuit trace and the ground link to render the circuit trace electrically common with the ground plane.

Abstract translation: 用于将电缆转换到连接器的电路板包括具有外表面的电路板。 设置在外表面上的电路迹线具有电缆焊盘和设置在外表面的不同端部处的接触焊盘。 接地层由电路板固定。 外表面上的接地连接到接地层。 电路迹线和接地链路彼此紧邻。 在电路迹线和电路板的外表面上提供电阻涂层。 电阻涂层在其上具有掩模孔，通过暴露电路迹线的未涂覆部分并将接地链路暴露于接地平面。 在电路迹线的未涂覆部分和接地链路上提供导电跳线材料，以使电路迹线与地平面电共同。

公开(公告)号：US20070103182A1

公开(公告)日：2007-05-10

申请号：US11466942

申请日：2006-08-24

Applicant: Tomohiko Nawata

Inventor： Tomohiko Nawata

IPC: G01R31/26

CPC classification number: G01R31/2818 ,  H05K1/0268 ,  H05K1/0293 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/0305 ,  H05K2203/043 ,  H05K2203/173

Abstract: A circuit board includes a board, a first conductive pad provided on the board, a second conductive pad provided with a first distance from the first conductive pad. A mask extends over the board and has an opening that extends over at least a part of the first conductive pad, at least a part of the second conductive pad, and at least a part of an intervening region of the board between the first and second conductive pads. A conductive material is provided in the opening, and extends over the at least a part of the first conductive pad, the at least a part of the intervening region, and the at least a part of the second conductive pad.

Abstract translation: 电路板包括板，设置在板上的第一导电焊盘，设置有距第一导电焊盘第一距离的第二导电焊盘。 掩模在板上延伸并且具有在第一导电焊盘的至少一部分上延伸的开口，第二导电焊盘的至少一部分以及在第一和第二导电焊盘之间的板的中间区域的至少一部分 导电垫。 导电材料设置在开口中，并且在第一导电垫的至少一部分，中间区域的至少一部分和第二导电垫的至少一部分之上延伸。

公开(公告)号：US20070012751A1

公开(公告)日：2007-01-18

申请号：US11180188

申请日：2005-07-13

Applicant: John Waldvogel ,  Herman Miller

Inventor： John Waldvogel ,  Herman Miller

IPC: B23K31/02 ,  B23K35/12

CPC classification number: B23K1/0016 ,  B23K2101/36 ,  H05K1/0206 ,  H05K1/0271 ,  H05K3/0061 ,  H05K3/305 ,  H05K3/341 ,  H05K3/386 ,  H05K2201/0305 ,  H05K2201/09318 ,  H05K2201/09554 ,  H05K2201/10022 ,  H05K2201/10636 ,  H05K2201/10969 ,  H05K2203/0455 ,  Y02P70/611

Abstract: An electrical circuit apparatus (300) that includes; a substrate (330) having a top side, a ground layer (336), at least one thermal aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate, the adhesive layer having at least one aperture (322) wherein aligning the at least one substrate solder aperture with the at least one adhesive layer aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.

Abstract translation: 一种电路装置（300），包括： 具有顶侧的衬底（330），接地层（336），至少一个热孔（332）和至少一个焊接孔（334）; 散热器（310）; 以及用于将散热器机械地耦合到衬底的接地层的粘合剂层（320），所述粘合剂层具有至少一个孔（322），其中使所述至少一个衬底焊接孔与所述至少一个粘合剂层孔径对准使得能够 在散热器和衬底的接地层之间的预定区域中的焊料润湿。

公开(公告)号：US20070001564A1

公开(公告)日：2007-01-04

申请号：US11455708

申请日：2006-06-20

Applicant: Hee Park

Inventor： Hee Park

IPC: H01J1/62 ,  H01J63/04

CPC classification number: H05K1/0209 ,  G02F1/133603 ,  H01L33/641 ,  H05K1/0206 ,  H05K1/056 ,  H05K3/341 ,  H05K2201/0108 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/10106 ,  H05K2201/10969

Abstract: A light emitting diode package includes an electrode pattern over a substrate, an electrode adhesive on the electrode pattern, a heat dissipating layer over the substrate, a body part abutting the heat dissipating layer, a light emitting diode chip on the body part, and a terminal part connected to the light emitting diode chip and attached to the electrode adhesive.

Abstract translation: 一种发光二极管封装，包括在基板上的电极图案，电极图案上的电极粘合剂，衬底上的散热层，邻接散热层的主体部分，身体部分上的发光二极管芯片，以及 端子部分连接到发光二极管芯片并附接到电极粘合剂。

公开(公告)号：US20060289887A1

公开(公告)日：2006-12-28

申请号：US11165900

申请日：2005-06-24

Applicant: Thong Bui ,  Michiko Shimada ,  Israel Morejon ,  Waleed Rusheidat ,  Paul Neathway

Inventor： Thong Bui ,  Michiko Shimada ,  Israel Morejon ,  Waleed Rusheidat ,  Paul Neathway

IPC: H01L33/00

CPC classification number: H05K1/0209 ,  H01L33/64 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K3/341 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/09909 ,  H05K2201/10106 ,  H05K2201/10969 ,  H01L2924/00014

Abstract: A high performance LED (402) and associated semiconductor package (400) advantageously utilizes an integrated heat sink (408) for purposes of power dissipation. At a next level of assembly, (500, 600) the semiconductor package (400) is electromechanically coupled to a printed circuit board (300). The printed circuit board (300) has a cavity (208) with thermal contact pad (308) disposed therein and connected to a metal back plane (106). During electromechanical coupling, the heat sink (408) is thermally coupled to the metal back plane (106) via the thermal contact pad (308). During operation, the thermal coupling of the heat sink (408) to the metal back plane, also referred to as a thermal mass reservoir (106) operates to increase the effective thermal mass of the integrated heat sink (408) and thereby provide enhanced power dissipation and heat transfer away from the high performance LED device (402).

Abstract translation: 为了功耗目的，高性能LED（402）和相关联的半导体封装（400）有利地利用集成散热器（408）。 在下一级组装（500,600），半导体封装（400）机电耦合到印刷电路板（300）。 印刷电路板（300）具有设置在其中并与金属背板（106）连接的热接触垫（308）的空腔（208）。 在机电耦合期间，散热器（408）经由热接触垫（308）热耦合到金属背板（106）。 在操作期间，散热器（408）与金属背面（也称为热质量容器）106的热耦合操作以增加集成散热器（408）的有效热质量，从而提供增强的功率 散热和散热远离高性能LED器件（402）。

公开(公告)号：US20060267722A1

公开(公告)日：2006-11-30

申请号：US11420286

申请日：2006-05-25

Applicant: Alfons Graf ,  Martin Maerz ,  Martin Saliternig

Inventor： Alfons Graf ,  Martin Maerz ,  Martin Saliternig

IPC: H01H85/04

CPC classification number: H01H37/761 ,  H01G2/16 ,  H01G4/228 ,  H01H2037/768 ,  H01L23/5256 ,  H01L23/5382 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/13091 ,  H01L2924/181 ,  H05K1/0201 ,  H05K1/0293 ,  H05K3/3421 ,  H05K2201/0305 ,  H05K2201/09072 ,  H05K2201/10181 ,  H05K2203/175 ,  H05K2203/176 ,  H05K2203/304 ,  Y10T29/49211 ,  Y10T29/53248 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An electric device generates a predetermined amount of heat in the event of a malfunction. The electric device is protected from overheating in that it is arranged, with a fuse in a circuit, such that the fuse and the electric device are thermally coupled to one another, so that the generation of the amount of heat by the electric device causes a fusible material in the fuse to melt. In this manner, the current terminal path of the electric device is interrupted.

Abstract translation: 在发生故障的情况下，电气装置产生预定的热量。 电气装置被防止过热，因为它被布置成具有电路中的保险丝，使得保险丝和电气装置彼此热耦合，使得由电气装置产生的热量导致 保险丝中的易熔材料熔化。 以这种方式，电气设备的当前终端路径被中断。

公开(公告)号：US07124503B1

公开(公告)日：2006-10-24

申请号：US09655893

申请日：2000-09-06

Applicant: Delin Li ,  Jay D. Baker ,  Myron Lemecha

Inventor： Delin Li ,  Jay D. Baker ,  Myron Lemecha

IPC: H01K3/10

CPC classification number: H05K3/4038 ,  H05K3/062 ,  H05K3/4084 ,  H05K2201/0305 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2203/0361 ,  H05K2203/063 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A method for forming connections within a multi-layer electronic circuit board 10 which allows for the selective, efficient, and reliable interconnection between at least one conductive layer and a ground plane or layer.

Abstract translation: 一种用于在多层电子电路板10内形成连接的方法，其允许至少一个导电层与接地平面或层之间的选择性，有效和可靠的互连。