Resonant frequency shift as etch stop of gate oxide of MOSFET transistor

    公开(公告)号:US12020915B1

    公开(公告)日:2024-06-25

    申请号:US18414436

    申请日:2024-01-16

    Abstract: An etch process performed during semiconductor processing is monitored using a resonant structure on a surface of a wafer, formed on the surface of a wafer as a resonant cavity. A resonance sensor is positioned over the wafer within a plasma etch chamber so as to establish a resonance with the resonant structure. A resonant frequency of the resonant structure is sensed through the resonant structure and shifts in the resonant frequency are thereby detected during an etch process as a measurement of the etch process. The etch process is controlled in accordance with the shift in the resonant frequency.

    RF impedance matching networks for substrate processing platform

    公开(公告)号:US12020901B2

    公开(公告)日:2024-06-25

    申请号:US17314173

    申请日:2021-05-07

    CPC classification number: H01J37/32183 H03H7/40 H01J2237/334

    Abstract: Methods and apparatus using a matching network for processing a substrate are provided herein. For example, a matching network configured for use with a plasma processing chamber comprises a local controller connectable to a system controller of the plasma processing chamber, a first motorized capacitor connected to the local controller, a second motorized capacitor connected to the first motorized capacitor, a first sensor at an input of the matching network and a second sensor at an output of the matching network for obtaining in-line RF voltage, current, phase, harmonics, and impedance data, respectively, and an Ethernet for Control Automation Technology (EtherCAT) communication interface connecting the local controller to the first motorized capacitor, the second motorized capacitor, the first sensor, and the second sensor.

    Semiconductor manufacturing chamber with plasma/gas flow control device

    公开(公告)号:US12002660B2

    公开(公告)日:2024-06-04

    申请号:US17671646

    申请日:2022-02-15

    Inventor: Chien-Liang Chen

    Abstract: A method of plasma etching a semiconductor wafer includes: securing the semiconductor wafer to a mounting platform within a process chamber such that an outer edge of the semiconductor wafer is encircled by a sloped annular ring having a plurality of perforation therein, the sloped annular ring having an inner edge at a first end of the sloped annular ring and an outer edge at a second end of the sloped annular ring. Suitably, the first end is opposite the second end and the first end resides in a first plane and the second end resides in a second plane different from the first plane. The method further includes generating a plasma within the process chamber such that the semiconductor wafer is exposed to the plasma and creating a flow of at least one of plasma and gas through the perforations in the sloped annular ring.

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