公开(公告)号：US20030057264A1

公开(公告)日：2003-03-27

申请号：US10278917

申请日：2002-10-24

Inventor： Fumio Yoshikawa ,  Hideyuki Fukasawa ,  Mitsugu Shirai ,  Hideaki Sasaki ,  Toshitaka Murakawa ,  Kenichi Hamamura

IPC: B23K031/02

CPC classification number: H05K3/3484 ,  B23K3/0638 ,  B23K2101/42 ,  H05K3/1216 ,  H05K3/1233 ,  H05K3/3415 ,  H05K3/3447 ,  H05K3/42 ,  H05K2201/09572 ,  H05K2203/0143

Abstract: A soldering system which reduces the numbers of steps for paste supply and soldering onto a printed circuit board. A printed circuit board has through holes through which a lead of each provided part is to be inserted. A printing mask is matched with the through holes and a paste receiving plate having holes to which solder paste is supplied corresponding to the through holes is disposed. A printing roller is swept by forcibly rotating it to fill with solder paste, then a printing squeegee follows the printing roller to further fill through holes. Parts are loaded on the through holes and reflowing is carried out on the printed circuit board and paste receiving plate, so that the parts are soldered to the printed circuit board.

Abstract translation: 一种焊接系统，其减少了将糊料供应和焊接到印刷电路板上的步骤数量。 印刷电路板具有通孔，每个所提供的部分的引线将被插入。 打印掩模与通孔匹配，并且设置具有孔的糊状物接收板，相应于通孔向其供应焊膏。 通过强力旋转印刷辊以填充焊膏，印刷辊被跟随印刷辊，以进一步填充通孔。 零件加载在通孔上，并在印刷电路板和糊状物接收板上进行回流，从而将零件焊接到印刷电路板上。

公开(公告)号：US20030002260A1

公开(公告)日：2003-01-02

申请号：US10147073

申请日：2002-05-17

Inventor： Takehiko Hasebe ,  Takehide Yokozuka ,  Nobuyuki Ushifusa ,  Masahide Harada ,  Eiji Matsuzaki ,  Hiroshi Hozoji

IPC: H05K007/20

CPC classification number: H01L24/16 ,  H01L23/142 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/29139 ,  H01L2224/2929 ,  H01L2224/32057 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83385 ,  H01L2224/83851 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01054 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/0206 ,  H05K1/0207 ,  H05K1/021 ,  H05K1/056 ,  H05K1/144 ,  H05K3/384 ,  H05K3/4608 ,  H05K3/4641 ,  H05K3/4652 ,  H05K2201/0209 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09572 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09845 ,  H05K2201/10734 ,  H01L2924/05432 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.

Abstract translation: 本发明提供了一种电子设备，其具有包括金属板的金属芯基板，形成在金属板上的绝缘层和形成在绝缘层上的导电层，以及电子部件，并且导电层和导体层的端子 电子部件连接。 在电子设备中，具有高导热性的部件被布置成与金属板和电子部件都接触。 因此，电子设备的散热性提高。

公开(公告)号：US06461136B1

公开(公告)日：2002-10-08

申请号：US09383325

申请日：1999-08-26

Applicant: Peter A. Gruber ,  Frederic Maurer ,  Lubomyr Taras Romankiw

Inventor： Peter A. Gruber ,  Frederic Maurer ,  Lubomyr Taras Romankiw

IPC: H05K310

CPC classification number: H05K3/4069 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/246 ,  H05K3/4602 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09572 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2203/0126 ,  H05K2203/085 ,  H01L2924/00

Abstract: An apparatus and a method for filling high aspect ratio holes in electronic substrates that can be advantageously used for filling holes having aspect ratios larger than 5:1 are disclosed. In the apparatus, a filler plate and a vacuum plate are used in conjunction with a connection means such that a gap is formed between the two plates to accommodate an electronic substrate equipped with high aspect ratio via holes. The filler plate is equipped with an injection slot while the vacuum plate is equipped with a vacuum slot such that when a substrate is sandwiched therein, via holes can be evacuated of air and injected with a liquid simultaneously from a bottom side and a top side of the substrate. The present invention novel apparatus and method allows the filling of via holes that have small diameters, i.e., as small as 10 &mgr;m, and high aspect ratios, i.e., at least 5:1 to be filled with an electrically conductive material such as a solder or a conductive polymer such that vias or interconnects can be formed in electronic substrates. The present invention apparatus and method can be advantageously used in fabricating substrates for display panels by forming conductive vias and interconnects for placing a voltage potential on pixel display elements formed on the display panels.

Abstract translation: 公开了一种用于填充电子基板中的高纵横比孔的装置和方法，其可以有利地用于填充具有大于5:1的纵横比的孔。 在装置中，填充板和真空板与连接装置结合使用，使得在两个板之间形成间隙以容纳配备有高纵横比通孔的电子基板。 填充板配备有注入槽，而真空板配备有真空槽，使得当基板夹在其中时，通孔可以从空气排出并同时从液体的底侧和顶侧注入液体 底物。 本发明的新型设备和方法允许填充具有小直径，即小至10um，高纵横比（即至少5:1）的通孔，以填充诸如焊料的导电材料 或导电聚合物，使得可以在电子基板中形成通孔或互连。 本发明的装置和方法可以有利地用于制造用于显示面板的基板，通过形成用于在形成在显示面板上的像素显示元件上放置电压电位的导电通孔和互连。

公开(公告)号：US20020100986A1

公开(公告)日：2002-08-01

申请号：US10104826

申请日：2002-03-22

Applicant: Hitachi, Ltd.

Inventor： Tasao Soga ,  Hanae Shimokawa ,  Tetsuya Nakatsuka ,  Kazuma Miura ,  Mikio Negishi ,  Hirokazu Nakajima ,  Tsuneo Endoh

IPC: H01L029/40 ,  H01L023/52 ,  H01L023/48

CPC classification number: H01L24/13 ,  B32B15/01 ,  C22C5/02 ,  C22C9/02 ,  C22C11/06 ,  C22C13/00 ,  H01L21/50 ,  H01L21/56 ,  H01L21/563 ,  H01L23/10 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/4924 ,  H01L23/49513 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81024 ,  H01L2224/81054 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/8121 ,  H01L2224/81409 ,  H01L2224/81815 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01088 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15738 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/166 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/141 ,  H05K3/3463 ,  H05K3/3484 ,  H05K2201/0215 ,  H05K2201/045 ,  H05K2201/09572 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01031 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/83205

Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, etc., and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.

Abstract translation: 形成在半导体器件和衬底之间的接合部包括Cu等的金属球，Sn和金属球的化合物以及金属球通过化合物结合在一起。

公开(公告)号：US20020092894A1

公开(公告)日：2002-07-18

申请号：US09761298

申请日：2001-01-16

Applicant: Industrial Technology Research Institute

Inventor： Hsing-Seng Wang ,  Rong-Shen Lee ,  Chiang-Han Day

IPC: B23K031/02 ,  B23K035/12

CPC classification number: H01L24/81 ,  B23K3/0623 ,  B23K2101/42 ,  H01L21/4853 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05186 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/16237 ,  H01L2224/81801 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/3436 ,  H05K3/3478 ,  H05K3/3484 ,  H05K2201/09572 ,  H05K2201/10674 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/0455 ,  H01L2924/00 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2224/05124 ,  H01L2224/05171 ,  H01L2924/04941

Abstract: A one-step bumping/bonding process for forming a semiconductor package is disclosed. In the method, a first electronic substrate which has either a plurality of conductive pads or a plurality of recessed openings formed on top of a plurality of apertures through the substrate is first provided and aligned with a second electronic substrate that has a plurality of conductive pads with each aperture aligned to a conductive pad on the second substrate. A plurality of solder balls is then planted on top of the plurality of conductive pads or the plurality of recessed openings on the surface of the first electronic substrate by a pick-and-place technique. Alternatively, a plurality of solder paste may be printed by a thick film stencil printing process similarly in place of the plurality of solder balls. After a solder reflow process, the solder balls placed on top of the apertures is reflown into the apertures forming solder plugs and making electrical connection with the conductive pads on the second electronic substrate thus completing the one-step bumping/bonding process for forming a semiconductor package. The electronic substrate may be either a printed circuit board or a silicon wafer.

Abstract translation: 公开了用于形成半导体封装件的一步凸块/接合工艺。 在该方法中，首先提供具有形成在穿过基板的多个孔的顶部上的多个导电焊盘或多个凹入开口的第一电子基板，并与具有多个导电焊盘的第二电子基板对准 每个孔与第二基底上的导电垫对准。 然后通过拾取和放置技术将多个焊球种植在多个导电焊盘的顶部或第一电子衬底的表面上的多个凹入的开口中。 或者，可以通过类似地代替多个焊球的厚膜模版印刷工艺来印刷多个焊膏。 在焊料回流工艺之后，放置在孔顶部的焊球被重新喷入形成焊塞的孔中，并与第二电子衬底上的导电焊盘形成电连接，从而完成用于形成半导体的一步碰撞/接合工艺 包。 电子基板可以是印刷电路板或硅晶片。

公开(公告)号：US20020066949A1

公开(公告)日：2002-06-06

申请号：US10052245

申请日：2002-01-23

Inventor： Eun Chul Ahn ,  Woong Ky Ha ,  Young Min Lee

IPC: H01L023/52 ,  H01L023/06 ,  H05K001/03

CPC classification number: H01L21/486 ,  H01L23/055 ,  H01L23/3677 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0201 ,  H05K1/0206 ,  H05K3/28 ,  H05K3/3457 ,  H05K3/3484 ,  H05K3/42 ,  H05K2201/09572 ,  H05K2203/041 ,  Y10T29/49144 ,  Y10T29/49158 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A BGA package includes a semiconductor chip, and a PCB having a board body, a plurality of circuit patterns, a plurality of signal via holes, a solder resist, and a plurality of thermal emissive vias. The thermal emissive vias are holes located beneath a chip attach area, and these holes are filled with metal having a low melting point. The metal prevents moisture from being absorbed, while effectively transferring heat. The semiconductor chip is attached to the chip attach area of the PCB and is connected to circuit patterns of the PCB with bonding wires. The bonding wires and the semiconductor chip are encapsulated to protect them from external environmental stress. Solder bumps are formed on circuit patterns of the PCB. The BGA package has advantages in that it prevents moisture from penetrating to the chip through the thermal emissive vias, and effectively transfers the heat generated by the chip to the outside.

公开(公告)号：US20010011608A1

公开(公告)日：2001-08-09

申请号：US09827111

申请日：2001-04-05

Inventor： Wesley M. Enroth ,  George D. Oxx JR. ,  Jenny B. Porter

IPC: H05K001/11

CPC classification number: H05K1/114 ,  H05K3/3415 ,  H05K3/3447 ,  H05K3/3468 ,  H05K3/3484 ,  H05K2201/09572 ,  H05K2201/10734 ,  H05K2203/043 ,  H05K2203/1476 ,  H05K2203/1572 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149

Abstract: A method for fabricating a printed circuit board assembly comprising a via, wherein the method inhibits the flow of molten solder into the via during a wave soldering step, thereby preventing heat transfer that might otherwise degrade a solder joint at a top pad that is thermally coupled to the via. The method comprises the steps of: (1) fastening a bottom component to the bottom surface of the circuit board by a screening and reflow of solder paste that also generates a solder plug in the via; (2) fastening top components to the top surface of the circuit board by a screening and reflow of solder paste, wherein the top components comprise ball grid arrays and other surface mount devices that are to be affixed to pads which are connected to vias; and (3) wave soldering the bottom surface to affix additional components onto the circuit board, such as pin-in-hole components placed on the top surface. The solder plug formed in the via during the first step prevents molten solder from flowing into the via during the subsequent wave soldering step, thereby inhibiting heat transfer from the molten solder to the solder joint at the top pad.

Abstract translation: 一种用于制造包括通孔的印刷电路板组件的方法，其中所述方法在波峰焊步骤期间抑制熔融焊料流入通孔，从而防止在热耦合的顶部焊盘处否则会降低焊料接头的热传递 到通道。 该方法包括以下步骤：（1）通过焊膏的筛选和回流将底部部件固定到电路板的底表面，焊膏也在通孔中产生焊料塞; （2）通过焊膏的筛选和回流将顶部部件固定到电路板的顶表面，其中顶部部件包括球栅阵列和其它表面安装装置，其将固定到连接到通孔的焊盘上; 和（3）波峰焊底部表面以将附加部件附加到电路板上，例如放置在顶表面上的针孔组件。 在第一步骤中形成在通孔中的焊料塞在随后的波峰焊步骤期间防止熔融焊料流入通孔，从而阻止从熔融焊料到顶部焊盘处的焊接接头的热传递。

公开(公告)号：US06249131B1

公开(公告)日：2001-06-19

申请号：US09144181

申请日：1998-08-31

Applicant: Peter Nangle

Inventor： Peter Nangle

IPC: G01R3102

CPC classification number: H05K3/3436 ,  G01R1/0483 ,  H01L24/81 ,  H01L2224/81801 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/0268 ,  H05K3/363 ,  H05K2201/09572 ,  H05K2201/10666 ,  H05K2203/0338 ,  H05K2203/041 ,  Y02P70/613

Abstract: An electronic assembly comprising an electrical device, an array of solder balls connected to the electrical device, and a sheet adjacent the electrical device. The sheet has a plurality of holes formed therethrough and a plurality of electrical lines formed thereon. Each electrical line has a first contact portion on a first surface of the sheet, a probe contact at a location away from the electrical device, and a trace interconnecting the probe contact with the first contact portion. Each ball extends through a respective hole in the sheet. Each ball is also in contact with a respective first contact portion of a respective electrical line.

Abstract translation: 一种电子组件，包括电气装置，连接到电气装置的焊球的阵列以及邻近电气装置的片材。 片材具有穿过其形成的多个孔和形成在其上的多条电线。 每个电线具有在片材的第一表面上的第一接触部分，远离电气设备的位置处的探针接触件和将探针接触件与第一接触部分相互连接的迹线。 每个球延伸通过片材中相应的孔。 每个球也与相应的电线的相应的第一接触部分接触。

公开(公告)号：US5930601A

公开(公告)日：1999-07-27

申请号：US898240

申请日：1997-07-22

Applicant: Sharon M. Cannizzaro ,  Libbie R. Terwilliger ,  Timothy B. Tunnel ,  Wayne P. Vaughn ,  Steven Veneman

Inventor： Sharon M. Cannizzaro ,  Libbie R. Terwilliger ,  Timothy B. Tunnel ,  Wayne P. Vaughn ,  Steven Veneman

IPC: H01L23/367 ,  H01L23/40 ,  H05K1/02 ,  H05K3/34 ,  H05K3/42 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H05K1/0206 ,  H01L23/3677 ,  H01L23/4006 ,  H01L2924/0002 ,  H05K2201/066 ,  H05K2201/09572 ,  H05K2201/10166 ,  H05K2201/10409 ,  H05K2201/10689 ,  H05K2201/10969 ,  H05K3/0061 ,  H05K3/341 ,  H05K3/42

Abstract: A heat sink assembly includes a printed wiring board, a metal case and a circuit package containing a gallium arsenide field effect transistor heat dissipating circuit. The circuit package includes a metal slug formed integrally with the circuit package, the heat dissipating circuit being bonded to an obverse surface of the metal slug. The printed wiring board includes first and second metal lands, the first metal land being disposed on an obverse surface of the printed wiring board, the second metal land being disposed on a reverse surface of the printed wiring board. A solder film is formed bonded to and thermally coupling a reverse surface of the metal slug to the first metal land, and a plurality of solder posts are formed, each post bonding to and thermally coupling the first metal land to the second metal land. The metal case is pressed against the second metal land with a grease film of thermally conductive grease squeezed therebetween. At least one bolt extends through a hole in the printed wiring board and into the metal case so as to squeeze together the metal case, the printed wiring board, the first and second metal lands and the grease film.

Abstract translation: 散热器组件包括印刷线路板，金属外壳和包含砷化镓场效应晶体管散热电路的电路封装。 电路封装包括与电路封装一体形成的金属块，该散热电路接合到金属块的正面上。 印刷电路板包括第一和第二金属焊盘，第一金属焊盘设置在印刷电路板的正面上，第二金属焊盘设置在印刷电路板的背面上。 形成了将金属块的反面与第一金属焊盘接合并热耦合的焊锡膜，并且形成多个焊料柱，每个焊接柱与第一金属焊盘接合并热耦合到第二金属焊盘。 金属壳体被压在第二金属焊盘上，在其间挤压有导热油脂的脂膜。 至少一个螺栓延伸穿过印刷线路板中的孔并进入金属壳体中，以将金属壳体，印刷线路板，第一和第二金属焊盘和油脂膜挤压在一起。

公开(公告)号：US5463191A

公开(公告)日：1995-10-31

申请号：US212477

申请日：1994-03-14

Applicant: James S. Bell ,  Deepak Swamy

Inventor： James S. Bell ,  Deepak Swamy

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/34 ,  H05K3/42 ,  H05K1/00

CPC classification number: H05K3/0094 ,  H05K1/113 ,  H05K3/3463 ,  H05K2201/09572 ,  H05K2201/10734 ,  H05K2201/10992 ,  H05K3/3431 ,  H05K3/429

Abstract: A circuit board design featuring a fine pitch ball grid array ("BGA") having a simplified construction. The circuit board comprises: (1) an insulating substrate, the substrate having a via therethrough, (2) a conductive layer located over the substrate, the via passing through the layer and laterally uninterrupted through the circuit board, (3) a first solder having a first melting point located within and substantially blocking the via and (4) a second solder having a second melting point located over the blocked via, the second melting point lower than the first melting point, the first solder remaining substantially solid and preventing the second solder from substantially entering the via when the first and second solders are heated to a temperature between the first and second melting points. The present invention eliminates precision drilling required by current blind via BGA pad designs.

Abstract translation: 具有简化结构的细间距球栅阵列（“BGA”）的电路板设计。 所述电路板包括：（1）绝缘基板，所述基板具有通孔，（2）位于所述基板上方的导电层，所述通孔穿过所述层并横向不间断地穿过所述电路板，（3）第一焊料 具有位于并基本上阻塞通孔的第一熔点和（4）具有位于阻塞通路上方的第二熔点的第二焊料，第二熔点低于第一熔点，第一焊料基本上保持固体，并防止 当第一和第二焊料被加热到第一和第二熔点之间的温度时，第二焊料基本上进入通孔。 本发明消除了当前通过BGA焊盘设计的盲孔所需的精密钻孔。