公开(公告)号：US20100187672A1

公开(公告)日：2010-07-29

申请号：US12622193

申请日：2009-11-19

Applicant: Nobuhiro Yamamoto

Inventor： Nobuhiro Yamamoto

IPC: H01L23/31 ,  H01L23/02

CPC classification number: H01L23/3128 ,  H01L21/563 ,  H01L23/36 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/19041 ,  H05K3/0094 ,  H05K3/28 ,  H05K3/305 ,  H05K2201/015 ,  H05K2201/0959 ,  H05K2201/10734 ,  H05K2203/0126 ,  H05K2203/0545 ,  H05K2203/1173 ,  H05K2203/304 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/0401

Abstract: According to an aspect of the present invention, there is provided an electronic apparatus including: a housing; a circuit board that is housed in the housing; a semiconductor package that includes a first surface on which solder balls are provided and a second surface opposite to the first surface and that is mounted on the circuit board so as to be electrically connected to the circuit board through the solder balls; a protective film that has a water repellency and that is applied on the circuit board so as to expose around the semiconductor package mounted on the circuit board; and a joint member that joins at least a part of a side surface of the semiconductor package and the circuit board.

Abstract translation: 根据本发明的一个方面，提供了一种电子设备，包括：壳体; 容纳在壳体中的电路板; 半导体封装，其包括设置有焊球的第一表面和与所述第一表面相对的第二表面，并且安装在所述电路板上以通过所述焊球与所述电路板电连接; 保护膜，其具有防水性，并且施加在电路板上以暴露在安装在电路板上的半导体封装周围; 以及连接半导体封装的侧表面的至少一部分和电路板的接合构件。

公开(公告)号：US07736152B2

公开(公告)日：2010-06-15

申请号：US12249035

申请日：2008-10-10

Applicant: Gareth G. Hougham ,  Keith E. Fogel ,  Paul A. Lauro ,  Joseph Zinter, Jr.

Inventor： Gareth G. Hougham ,  Keith E. Fogel ,  Paul A. Lauro ,  Joseph Zinter, Jr.

IPC: H01R12/00

CPC classification number: H01R13/2414 ,  H01R12/7082 ,  H01R12/714 ,  H01R43/007 ,  H05K3/4007 ,  H05K3/42 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/0959 ,  H05K2201/10378 ,  Y10S439/931 ,  Y10T442/109 ,  Y10T442/172

Abstract: Methods for fabricating Land Grid Array (LGA) interposer contacts that are both conducting and elastic. Also provided are LGA interposer contacts as produced by the inventive methods. Provided is LGA type which utilizes a pure unfilled elastomer button core that is covered with an electrically-conductive material that is continuous from the top surface to the bottom surface of the button structure. In order to obviate the disadvantages and drawbacks which are presently encountered in the technology pertaining to the fabrication and structure of land grid arrays using electrically-conductive interposer contacts, there is provided both methods and structure for molding elastomer buttons into premetallized LGA carrier sheets, and wherein the non-conductive elastomer buttons are surface-metallized in order to convert them into conductive electrical contacts.

Abstract translation: 制造导电和弹性的Land Grid Array（LGA）插入器触点的方法。 还提供了通过本发明的方法制造的LGA插入器触点。 提供了LGA型，其利用由从按钮结构的顶表面到底表面连续的导电材料覆盖的纯未填充弹性体按钮芯。 为了消除在使用导电插入器触点的地面栅格阵列的制造和结构的技术中目前遇到的缺点和缺点，提供了用于将弹性体按钮模制成预金属化的LGA载体片的方法和结构，以及 其中非导电弹性体按钮被表面金属化以便将它们转换为导电电触点。

公开(公告)号：US07691189B2

公开(公告)日：2010-04-06

申请号：US11736495

申请日：2007-04-17

Applicant: Honchin En ,  Tohru Nakai ,  Takeo Oki ,  Naohiro Hirose ,  Kouta Noda

Inventor： Honchin En ,  Tohru Nakai ,  Takeo Oki ,  Naohiro Hirose ,  Kouta Noda

IPC: C23C18/40 ,  B05D1/18

CPC classification number: H05K3/4644 ,  C23C18/1607 ,  C23C18/1653 ,  C23C18/22 ,  C23C18/30 ,  C23C18/34 ,  C23C18/405 ,  C23C28/00 ,  C23C28/023 ,  C23C28/42 ,  C25D3/38 ,  C25D5/022 ,  C25D5/18 ,  C25D5/34 ,  C25D7/123 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/241 ,  H05K3/381 ,  H05K3/382 ,  H05K3/384 ,  H05K3/421 ,  H05K3/423 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4661 ,  H05K2201/0215 ,  H05K2201/0344 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0353 ,  H05K2203/0723 ,  H05K2203/1476 ,  H05K2203/1492 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: The present invention is directed to a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity, and by which uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.

Abstract translation: 本发明涉及一种制造多层印刷电路板的方法，该印刷电路板能够同时通孔填充和形成导体电路和具有良好结晶度的通孔，并且可以在基板和高密度布线上构造均匀的沉积 并且可以实现高可靠性的导体连接而不退火。

公开(公告)号：US07629541B2

公开(公告)日：2009-12-08

申请号：US11454896

申请日：2006-06-19

Applicant: David V. Caletka ,  Frank D. Egitto

Inventor： David V. Caletka ,  Frank D. Egitto

IPC: H05K1/16

CPC classification number: H05K1/0219 ,  H01R12/523 ,  H01R13/2414 ,  H05K1/113 ,  H05K3/4046 ,  H05K3/429 ,  H05K3/4614 ,  H05K2201/0959 ,  H05K2201/09809 ,  H05K2201/10303 ,  H05K2201/10378 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A high speed interposer which includes a substrate having alternatingly oriented dielectric and conductive layers which form a substrate, openings which extend from one opposing surface of the substrate to a second opposing surface, conductive members positioned within the openings and also extending from surface to surface (and beyond, in some embodiments), and a plurality of shielding members positioned substantially around the conductive members to provide shielding therefore during the passage of high frequency signals through the conductive members.

Abstract translation: 高速插入器，其包括具有交替取向的介电层和导电层的基板，其形成基板，从基板的一个相对表面延伸到第二相对表面的开口，定位在开口内并且还从表面延伸到表面的导电构件 并且在一些实施例中超越）以及基本上围绕导电构件定位的多个屏蔽构件，从而在高频信号通过导电构件期间提供屏蔽。

公开(公告)号：US20090296349A1

公开(公告)日：2009-12-03

申请号：US12427567

申请日：2009-04-21

Applicant: Daigo SUZUKI

Inventor： Daigo SUZUKI

IPC: H05K7/20 ,  H05K3/46

CPC classification number: H05K1/0206 ,  H05K1/141 ,  H05K1/185 ,  H05K3/0061 ,  H05K3/3447 ,  H05K3/429 ,  H05K3/4611 ,  H05K2201/0959 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10409 ,  Y10T29/49126

Abstract: According to one embodiment, a component-embedded printed circuit board includes an opening for member fixation provided on part of a peripheral edge of an outer layer side of the first substrate, a metal member for heat radiation laminated to outer layer side, except for the opening for member fixation, of the first substrate with an insulating layer therebetween, a through-hole penetrating the first and second substrates and communicating with the opening for member fixation, and a through-hole conductor provided on an internal wall of the through-hole.

Abstract translation: 根据一个实施例，组件嵌入式印刷电路板包括用于构件固定的开口，其设置在第一基板的外层侧的周缘的一部分上，用于散热的金属构件层压到外层侧，除了 用于构件固定的开口，其间具有绝缘层的第一基板，穿过第一和第二基板并与用于构件固定的开口连通的通孔，以及设置在通孔内壁上的通孔导体 。

公开(公告)号：US20090207630A1

公开(公告)日：2009-08-20

申请号：US11921787

申请日：2006-06-07

Applicant: Makoto Satoh ,  Yasuo Ohno

Inventor： Makoto Satoh ,  Yasuo Ohno

IPC: F21V7/22 ,  F21V29/00

CPC classification number: G02B6/0085 ,  H05K1/0206 ,  H05K3/0061 ,  H05K3/281 ,  H05K3/386 ,  H05K3/42 ,  H05K2201/0209 ,  H05K2201/09481 ,  H05K2201/0959 ,  H05K2201/10106

Abstract: More efficient radiation of heat from a point-like light source is enabled, and thinning is promoted, while higher and more uniform brightness of a planar illumination device is accommodated. A radiation path is formed through which the heat generated from the point-like light source is transmitted to a radiator plate made of metal through an electrode terminal of the point-like light source, a land portion of a front side face of an FPC, a through hole of a conductor pattern, and a high heat-conductive resin. The radiation path for efficient radiation from a conductor pattern of the FPC to the radiator plate made of metal is extended, and direct radiation area is sufficiently ensured. Particularly even if a large-current type LED is used for the point-like light source, sufficient radiation effect can be obtained. Also, since freedom in wiring pattern on the FPC and freedom of outline are not different from a conventional FPC at all, a demand for thinning of the planar illumination device can be sufficiently satisfied.

Abstract translation: 能够实现来自点状光源的更有效的热辐射，并且可以减轻薄型化，同时容纳平面照明装置的更高和更均匀的亮度。 形成辐射路径，从点状光源产生的热量通过点状光源的电极端子，FPC前表面的接地部分传递到由金属制成的散热板， 导体图案的通孔和高导热性树脂。 从FPC的导体图案到由金属制成的散热板的有效辐射的辐射路径延长，并且充分确保直接辐射面积。 特别是即使使用大电流型LED作为点状光源，也能获得充分的辐射效果。 此外，由于FPC上的布线图案的自由度和轮廓的自由度与传统的FPC完全没有区别，因此可以充分满足对平面照明装置的薄化的需求。

公开(公告)号：US20090199399A1

公开(公告)日：2009-08-13

申请号：US12163252

申请日：2008-06-27

Applicant: Takashi Kariya ,  Toshiki Furutani

Inventor： Takashi Kariya ,  Toshiki Furutani

IPC: H05K3/30

CPC classification number: H05K3/428 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/26175 ,  H01L2224/73204 ,  H01L2224/83132 ,  H01L2224/83192 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01093 ,  H01L2924/14 ,  H05K1/187 ,  H05K3/205 ,  H05K3/243 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0341 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K2203/0361 ,  H05K2203/063 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A method for manufacturing a board with a built-in electronic element, includes providing a support substrate including a support base and a metal foil, forming a protective film made of a metal material on the metal foil of the support substrate, forming a conductive pattern made of a metal material on the protective film by an additive method, placing an electronic element on the support substrate with the conductive pattern such that a surface of the electronic element where a circuit is formed faces the conductive pattern, covering the electronic element with an insulative resin, etching away the metal foil using a first etching solution such that the protective film is not dissolved by the first etching solution or that the protective film has an etching speed which is slower than an etching speed of the metal foil, and electrically connecting terminals of the electronic element and a part of the conductive pattern.

Abstract translation: 一种用于制造具有内置电子元件的板的方法，包括提供包括支撑基底和金属箔的支撑基板，在支撑基板的金属箔上形成由金属材料制成的保护膜，形成导电图案 通过添加方法在保护膜上由金属材料制成，将电子元件放置在具有导电图案的支撑基板上，使得形成电路的电子元件的表面面向导电图案，用电子元件覆盖电子元件 绝缘树脂，使用第一蚀刻溶液蚀刻掉金属箔，使得保护膜不被第一蚀刻溶液溶解，或者保护膜具有比金属箔的蚀刻速度慢的蚀刻速度，并且电连接 电子元件的端子和导电图案的一部分。

公开(公告)号：US07568922B2

公开(公告)日：2009-08-04

申请号：US11304770

申请日：2005-12-16

Applicant: Takahiro Yamashita ,  Hiroyuki Watanabe ,  Kiyotaka Tsukada ,  Michio Ido ,  Morio Nakao

Inventor： Takahiro Yamashita ,  Hiroyuki Watanabe ,  Kiyotaka Tsukada ,  Michio Ido ,  Morio Nakao

IPC: H01R12/00 ,  H05K1/00

CPC classification number: H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/113 ,  H05K3/3457 ,  H05K2201/0347 ,  H05K2201/09436 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09627 ,  H05K2201/098 ,  Y10T29/49144 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: This invention provides a printed wiring board having an intensified drop impact resistance of a joint portion between pad and solder. An electrode pad comprises pad portion loaded with solder ball and a cylindrical portion projecting to the solder ball supporting the pad portion. An outer edge of the pad portion extends sideway from a cylindrical portion so that the outer edge is capable of bending. If the outer edge bends when stress is applied to the solder ball 30, stress on the outer edge of the pad portion on which stress is concentrated can be relaxed so as to intensify the joint strength between an electrode pad and solder ball.

Abstract translation: 本发明提供了一种印刷电路板，其具有焊盘和焊料之间的接合部分的强烈的耐滴落冲击性。 电极焊盘包括装载有焊球的焊盘部分和突出到支撑焊盘部分的焊球的圆柱形部分。 衬垫部分的外边缘从圆筒部分侧向延伸，使得外边缘能够弯曲。 如果当对焊球30施加应力时外边缘弯曲，则可以放松应力集中的焊盘部分的外边缘上的应力，从而加强电极焊盘和焊球之间的接合强度。

公开(公告)号：US20090188708A1

公开(公告)日：2009-07-30

申请号：US12409683

申请日：2009-03-24

Applicant: Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

Inventor： Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

IPC: H05K1/00 ,  B44C1/22 ,  B32B37/02

CPC classification number: C23G1/10 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/062 ,  H05K3/067 ,  H05K3/108 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00

Abstract: A method of manufacturing a multilayer printed circuit board including preparing a substrate board having a conductor circuit formed over the substrate board, forming an interlayer resin insulating layer on the conductor circuit formed over the substrate board by press laminating on the conductor circuit a film comprising a cycloolefin resin under vacuum or reduced pressure, and forming a via hole connecting to the conductor circuit through the resin insulating layer, the forming of the via hole including plating the via hole to fill up.

Abstract translation: 一种多层印刷电路板的制造方法，其特征在于，包括：准备在所述基板上形成有导体电路的基板，在所述导体电路上形成在所述导体电路上形成的层间树脂绝缘层， 在真空或减压下形成环烯烃树脂，并且通过树脂绝缘层形成连接到导体电路的通孔，形成通孔，其中电镀通孔以填满。

公开(公告)号：US20090184413A1

公开(公告)日：2009-07-23

申请号：US12212089

申请日：2008-09-17

Applicant: Kazuaki TATSUMI ,  Yoshiki SOTA

Inventor： Kazuaki TATSUMI ,  Yoshiki SOTA

IPC: H01L23/498 ,  H05K1/05 ,  H01L21/50

CPC classification number: H05K3/3452 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/15151 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/3511 ,  H05K1/112 ,  H05K3/0094 ,  H05K3/427 ,  H05K2201/0959 ,  H05K2201/0989 ,  H05K2201/10734 ,  H05K2203/0585 ,  H05K2203/1178 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The insulative wiring board of the present invention, with its both surfaces being covered with solder resist, includes at least one via hole in a semiconductor chip-mounting area penetrating the insulative wiring board, wherein conductor layers are electrically connected to each other via said at least one via hole. Further, the mounting area is covered with the solder resist, excluding said at least one via hole that penetrates the insulative wiring board. Therefore, it is possible to achieve an insulative wiring board that prevents defects caused by expansion occurred due to heating of moisture absorbed by the board, as well as reducing an area where a wiring cannot be provided.

Abstract translation: 本发明的绝缘布线基板，其两面被阻焊剂覆盖，包括穿过绝缘布线板的半导体芯片安装区域中的至少一个通路孔，其中导体层经由所述导电层彼此电连接 至少一个通孔。 此外，除了穿过绝缘布线板的所述至少一个通孔之外，用阻焊剂覆盖安装区域。 因此，可以实现防止由于板吸收的水分的加热而发生的膨胀引起的缺陷的绝缘布线板以及减少不能提供布线的区域。