公开(公告)号：US20240105664A1

公开(公告)日：2024-03-28

申请号：US18234645

申请日：2023-08-16

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chung Huang ,  Hsin-Yen Tsai ,  Fa-Chung Chen ,  Cheng-Fan Lin ,  Chen-Yu Wang

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10

CPC classification number: H01L24/32 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/27 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/27515 ,  H01L2224/2784 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/3511

Abstract: A package structure includes a first RDL, an adhesive layer and a first electronic component. Upper bumps and conductive pads are provided on a first upper surface and a first lower surface of the first RDL, respectively. The adhesive layer is located on the first upper surface of the first RDL and surrounds the upper bumps. The first electronic component is mounted on the adhesive layer and includes conductors which are visible from an active surface of the first electronic component and joined to the upper bumps, the active surface of the first electronic component faces toward the first upper surface of the first RDL. Two adhesive surfaces of the adhesive layer are adhered to the first upper surface of the first RDL and the active surface of the first electronic component, respectively.

公开(公告)号：US20230420287A1

公开(公告)日：2023-12-28

申请号：US18137799

申请日：2023-04-21

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Ching-Wen Chen ,  Chen-Lung Teng ,  Kung-An Lin ,  Chen-Yu Wang

IPC: H01L21/687 ,  H01L21/67

CPC classification number: H01L21/68721 ,  H01L21/67092 ,  H01L21/68735

Abstract: A clamp assembly includes at least one clamp which is provided to clamp a workpiece in electroless plating, etching, electroplating or cleaning process. The clamp includes a base, a clamping element and a limiting element. The base is mounted on a carrier and includes a guide hole and a first limiting hole which are communicated with each other. The clamping element includes a guide rod and a second limiting hole, the guide rod is inserted into the guide hole to allow the second limiting hole located on the guide hole to be communicated with the first limiting hole. The limiting element is inserted into the first and second limiting holes to integrate the base with the clamping element for clamping the workpiece.

公开(公告)号：US11309238B2

公开(公告)日：2022-04-19

申请号：US17227470

申请日：2021-04-12

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H05K1/18 ,  H01L23/498 ,  H01L23/00

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.

公开(公告)号：US11177206B2

公开(公告)日：2021-11-16

申请号：US16833826

申请日：2020-03-30

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Chun-Te Lee ,  Chih-Ming Peng ,  Hui-Yu Huang ,  Yin-Chen Lin

IPC: H01L23/498 ,  H01L23/00

Abstract: A layout structure of double-sided flexible circuit board includes a flexible substrate having a first surface and a second surface, a first circuit layer and a second circuit layer. An inner bonding region is defined on the first surface and an inner supporting region is defined on the second surface according to the inner bonding region. The first circuit layer is located on the first surface and includes first conductive lines which each includes an inner lead located on the inner bonding region. The second circuit layer is located on the second surface and includes second conductive lines which each includes an inner supporting segment located on the inner supporting region. A width difference between any two of the inner supporting segment of the second conductive lines is less than 8 μm.

公开(公告)号：US11148864B1

公开(公告)日：2021-10-19

申请号：US17169653

申请日：2021-02-08

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Cheng-Hung Shih ,  Tsuo-Yun Chu

IPC: B65D81/05 ,  B65D25/10 ,  B65D85/38

Abstract: The present invention discloses a storage container for electronic devices, especially for wafer frames. The storage container includes a body and a stop rod that is provided to open or close a pick-and-place path in the body. The pick-and-place path is open to allow the wafer frames placed in the body to be taken out when a recess of the stop rod is located in the pick-and-place path. On the contrary, the pick-and-place path is closed when a blocking part of the stop rod is located in the pick-and-place path so as to protect the wafer frames placed in the body from falling out from the storage container.

公开(公告)号：US20210267049A1

公开(公告)日：2021-08-26

申请号：US17160483

申请日：2021-01-28

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yin-Chen Lin ,  Hui-Yu Huang ,  Chih-Ming Peng ,  Chun-Te Lee

IPC: H05K1/02

Abstract: A flexible circuit board includes a flexible light-permeable carrier, a circuit layer, a mark and a stiffener. The circuit layer and the mark are located on a top surface of the flexible light-permeable carrier. A predetermined area and a stiffener mounting area corresponding to each other are defined on the top surface and a bottom surface of the flexible light-permeable carrier, respectively. The mark is opaque to create a shadow mark having a longitudinal reference side and a lateral reference side on the bottom surface. The stiffener is adhered to the stiffener mounting area defined on the bottom surface by aligning with the longitudinal reference side and the lateral reference side of the shadow mark.

公开(公告)号：US11084684B2

公开(公告)日：2021-08-10

申请号：US16354282

申请日：2019-03-15

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Chung-Yi Chang

IPC: B65H75/18

Abstract: A restriction device for preventing deformation of restriction plate of reel is disclosed. The restriction device includes a first circular restrictor, a second circular restrictor, a block member and a first push member. A clamping space exists between the first and second circular restrictors mounted on a shaft and is configured to accommodate a reel mounted on the shaft. The second circular restrictor is able to be moved on the shaft in an axial direction, the block member is fixed on the shaft and the first push member is placed between the block member and the second circular restrictor. The first push member is configured to apply a force to push the second circular restrictor toward the first circular restrictor to press a first restriction plate of the reel such that the deformation of the first restriction plate is prevented.

公开(公告)号：US20210227679A1

公开(公告)日：2021-07-22

申请号：US16927059

申请日：2020-07-13

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Chia-Sung Lin ,  Huan-Kai Chou ,  Chia-Hsin Yen ,  Wen-Fu Chou

IPC: H05K1/02 ,  H05K3/30

Abstract: In a method of heat sink attachment, a heat-sink tape includes a plurality of heat sinks and a flexible carrier, and a holder is provided to allow the heat sinks on the moving heat-sink tape to peel from the flexible carrier and attach to a heat-sink mounting area of a moving circuit tape automatically and successively.

公开(公告)号：US11056555B2

公开(公告)日：2021-07-06

申请号：US16885461

申请日：2020-05-28

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Cheng-Hung Shih ,  Nian-Cih Yang ,  Yi-Cheng Chen ,  Shang-Jan Yang

IPC: H01L29/00 ,  H01L49/02 ,  H01L23/64

Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.

公开(公告)号：US10999928B1

公开(公告)日：2021-05-04

申请号：US16914844

申请日：2020-06-29

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H05K1/11 ,  H05K1/18 ,  H05K1/03

Abstract: A circuit board electrically connected to a chip includes a substrate and a circuit layer. A first conductive line of the circuit layer includes a main line and a branch lead connected with each other. The branch lead provided to increase lead quantity for bonding with the chip includes an extension part and a bonding part which is used for bonding a bump of the chip. During thermal compression, gaps existing between the extension part and the main line and between the bonding part and the main line can prevent solder on the main line from flowing toward the bump and overflowing from the branch lead.