Abstract:
A fabrication method of a circuit board is provided. A substrate, a top pad, a base pad electrically connecting the top pad, and a top and a base solder resist layers are provided. The top and the base pads are disposed on two opposite surfaces of the substrate, respectively. The top solder resist layer having a first opening partially exposing the top pad and the base solder resist layer having a second opening partially exposing the base pad are disposed on the two surfaces, respectively. A conductive layer covering the base solder resist layer and the base pad is formed. A plating resist layer having a third opening is formed on the conductive layer. A current is applied to the conductive layer through the third opening for electroplating a pre-bump on the top pad. The plating resist layer and the conductive layer are then removed.
Abstract:
A multilayer circuit board assembly includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the circuit board assembly. The RF interconnects can include one or more RF matching pads which provide a mechanism for matching impedance characteristics of RF stubs to provide the RF interconnects having desired insertion loss and impedance characteristics over a desired RF operating frequency band. The RF matching pads allow the manufacture of circuit boards having RF interconnects without the need to perform any back drill and back fill operation to remove stub portions of the RF interconnects in the multilayer circuit board assembly.
Abstract:
The optical/electrical composite wiring board comprises a lower insulating layer that also serves as a lower clad; a upper insulating layer that also serves as an upper clad; a core that is placed between the lower insulating layer and the upper insulating layer and has a predetermined optical wiring pattern; and a conductor layer that is placed along with the core between the lower insulating layer and the upper insulating layer and has a predetermined electrical wiring pattern. Herein, the core and the conductor layer are formed via a short manufacturing method, whereby the concave portion for optical wiring and the concave portion for electrical wiring are formed on the lower insulating layer by press process, and a core material and conductor material are filled into each of the concave portions, and afterward, the core material and conductor material are ground until they are flush with the upper surface of the lower insulating layer.
Abstract:
A printed circuit board (‘PCB’) with a capacitor integrated within a via of the PCB, the PCB including layers of laminate; a via that includes a via hole traversing layers of the PCB, the via hole characterized by a generally tubular inner surface; a capacitor integrated within the via, the capacitor including two capacitor plates, an inner plate and an outer plate, the two plates composed of electrically conductive material disposed upon the inner surface of the via hole, both plates traversing layers of the laminate, the inner plate traversing more layers of the laminate than are traversed by the outer plate; and a layer of dielectric material disposed between the two plates.
Abstract:
The present invention is directed to a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity, and by which uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.
Abstract:
A multilayer circuit board assembly includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the circuit board assembly. The RF interconnects can include one or more RF matching pads which provide a mechanism for matching impedance characteristics of RF stubs to provide the RF interconnects having desired insertion loss and impedance characteristics over a desired RF operating frequency band. The RF matching pads allow the manufacture of circuit boards having RF interconnects without the need to perform any back drill and back fill operation to remove stub portions of the RF interconnects in the multilayer circuit board assembly.
Abstract:
A printed circuit board having a semiconductor component embedded therein and a method of fabricating the same are proposed, including: providing a circuit board body having a through hole, a first surface and an opposing second surface both provided with a core circuit layer thereon; forming on the first surface a first dielectric layer with a dielectric-layer opening for exposing part of the first surface; forming a first circuit layer on the first dielectric layer, and forming first conductive vias in the first dielectric layer; fixing in position to the through hole a semiconductor chip having an active surface with electrode pads thereon; forming in the dielectric-layer opening a third dielectric layer for covering the active surface of the semiconductor chip; forming a third circuit layer on the third dielectric layer, and forming third conductive vias in the third dielectric layer. The printed circuit board thus fabricated is warpage-free.
Abstract:
An electrical interconnecting structure suitable for a circuit board is provided. The electrical interconnecting structure includes a core, an ultra fine pattern, and a patterned conductive layer. The core has a surface, and the ultra fine pattern is inlaid in the surface of the core. The patterned conductive layer is disposed on the surface of the core and is partially connected to the ultra fine pattern. Since the ultra fine pattern of the electrical interconnecting structure is inlaid in the surface of the core and is partially connected to the patterned conductive layer located on the surface of the core.
Abstract:
This invention provides a printed wiring board having an intensified drop impact resistance of a joint portion between pad and solder. An electrode pad comprises pad portion loaded with solder ball and a cylindrical portion projecting to the solder ball supporting the pad portion. An outer edge of the pad portion extends sideway from a cylindrical portion so that the outer edge is capable of bending. If the outer edge bends when stress is applied to the solder ball 30, stress on the outer edge of the pad portion on which stress is concentrated can be relaxed so as to intensify the joint strength between an electrode pad and solder ball.
Abstract:
A semiconductor system having a substrate (101) including a rigid insulating interposer (110) with a high modulus and a top (140) and a bottom (150) low-modulus tape with flip-attached semiconductor chips (120, 130). The assembled chips, with the passive surfaces facing each other, are located in an opening (114) of the interposer, which has a thickness (111) equal to or smaller than the sum of the assembled two chips. Adhesive material (160) holds the tapes parallel to the interposer and the chip surfaces together. Solder balls (180) and discrete components (170) may be attached to the outside surfaces of the tapes.