Abstract:
A transistor array including a plurality of transistors. Each transistor includes an emitter. An emitter region contact overlies each emitter region. At least one base region underlies each emitter region and is common to a plurality of transistors in the array. At least one base contact overlies the at least one base region and is associated with each transistor. A plurality of the base contacts are common to at least two transistors in the array. At least one collector reach through is associated with each transistor. A collector reach through contact overlies each collector reach through. A buried layer subcollector region of electrically conducting material electrically connects the collector reach through region to the collector pedestal region of each transistor.
Abstract:
A means for fabrication of solenoidal inductors interated in a semiconductor chip is provided. A solenoidal coil (50) is partially embedded in a deep well etched into the chip substrate (10). The non-embedded part (30) of the coil is fabricated as part of BEOL metallization layers (52). This allows for large cross-sectional area of the solenoid turns, tus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The farbication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric (14) followed by fabrication of the part of the coil (22) that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric (24 and 28) and planarization of the same by CMP. After planarization the fabrication of the remaining part (30) of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil, part of it may be built by electrodeposition through a mask on top of the BEOL layers.
Abstract:
A three-dimensional micro-electromechanical (MEM) varactor is described wherein a movable beam (50) and fixed electrodes (51) are respectively fabricated on separate substrates coupled to each other. The movable beam with comb-drive electrodes are fabricated on the "chip side" while the fixed bottom electrode is fabricated on a separated substrate "carrier side". Upon fabrication of the device on both surfaces of the substrate, the chip side device is diced and "flipped over", aligned and joined to the "carrier" substrate to form the final device. Comb-drive (fins) electrodes are used for actuation while the motion of the electrode provides changes in capacitance. Due to the constant driving forces involved, a large capacitance tuning range can be obtained. The three dimensional aspect of the device avails large surface area. When large aspect ratio features are provided, a lower actuation voltage can be used. Upon fabrication, the MEMS device is completely encapsulated, requiring no additional packaging of the device. Further, since alignment and bonding can be done on a wafer scale (wafer scale MEMS packaging), an improved device yield can be obtained at a lower cost.
Abstract:
A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.
Abstract:
PROBLEM TO BE SOLVED: To provide a novel improved integrated variable inductor and an inductor/varactor tuning circuit. SOLUTION: The magnetic field of the inductor 32 is reduced by the presence of one or more single-loop winding 34 disposed near the inductor. The single- loop winding has an open circuit, which is selectively closed, and the single loop winding is magnetically coupled to the inductor. The varactor 30 is connected to the inductor to form the inductor/varactor tuning circuit.
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor torsional micro-electromechanical (MEM) switch which has a control electrode being almost perpendicular to a switching electrode, applies an electrical separation between the control signal and a switch signal, is equipped with a plurality of control parts for opening/closing switches, and whole switching area arranged in various multiple-pole, multiple-throw is remarkably reduced. SOLUTION: The switch is equipped with a conductive movable control electrode 50 and an insulated semiconductor torsion beam 60 attached to the movable control electrode, the insulated torsion beam and the movable control electrode being parallel to each other, and a movable contact 20 attached to the insulated torsion beam, wherein the combination of the insulated torsion beam and the control electrode is perpendicular to the movable contact. The torsional MEM switch has the control electrodes almost perpendicular to the switching electrodes. The MEM switch has a plurality of control parts to activate the device to form a single-pole, single-throw switch or a multiple-pole, multiple-throw switch. The manufacturing method of the torsional MEM switch is completely compatible with the CMOS manufacturing process. COPYRIGHT: (C)2004,JPO
Abstract:
A means for fabrication of solenoidal inductors interated in a semiconductor chip is provided. A solenoidal coil (50) is partially embedded in a deep well etched into the chip substrate (10). The non-embedded part (30) of the coil is fabricated as part of BEOL metallization layers (52). This allows for large cross-sectional area of the solenoid turns, tus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The farbication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric (14) followed by fabrication of the part of the coil (22) that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric (24 and 28) and planarization of the same by CMP. After planarization the fabrication of the remaining part (30) of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil, part of it may be built by electrodeposition through a mask on top of the BEOL layers.