公开(公告)号：US20110304949A1

公开(公告)日：2011-12-15

申请号：US13143637

申请日：2010-01-06

Applicant: Todd Hubing

Inventor： Todd Hubing

IPC: H01G4/228

CPC classification number: H01G4/232 ,  H01G2/06 ,  H01G4/30 ,  H01G4/35 ,  H01G4/40 ,  H05K1/184 ,  H05K2201/092 ,  H05K2201/09309

Abstract: A capacitor having a stem that is designed to be inserted into a single, large-diameter via hole drilled in a printed circuit board is provided, wherein the stem may have conductive rings for making the positive and negative connections to the printed circuit board power distribution planes. Inside the capacitive stem, current, or at least a portion thereof, may be carried to the main body of the capacitor through low-inductance plates that are interleaved to maximize their own mutual inductance and, therefore, minimize the connection inductance. Alternatively, the capacitor may include a coaxial stem that forms a coaxial transmission line with the anode and cathode terminals forming the inner and outer conductors.

Abstract translation: 提供一种电容器，其具有设计成插入到印刷电路板中钻出的单个大直径通孔中的阀杆，其中所述阀杆可具有导电环，用于使得与所述印刷电路板配电的正极和负极连接 飞机 在电容杆内部，电流或其至少一部分可以通过交错的低电感板传送到电容器的主体，以使其自身的互感最大化，从而使连接电感最小化。 或者，电容器可以包括形成同轴传输线的同轴杆，阳极和阴极端子形成内导体和外导体。

公开(公告)号：US20100127402A1

公开(公告)日：2010-05-27

申请号：US12692974

申请日：2010-01-25

Applicant: Kevin P. Grundy ,  Joseph C. Fjelstad ,  Gary Yasumura ,  William F. Wiedemann ,  Para K. Segaram

Inventor： Kevin P. Grundy ,  Joseph C. Fjelstad ,  Gary Yasumura ,  William F. Wiedemann ,  Para K. Segaram

IPC: H01L23/48

CPC classification number: H01L23/13 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/16235 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/85399 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H05K1/182 ,  H05K1/183 ,  H05K3/308 ,  H05K3/3405 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/4046 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0919 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2201/10189 ,  H05K2201/1053 ,  H05K2201/10545 ,  H05K2201/1059 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10727 ,  H05K2201/10734 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Structures employed by a plurality of packages, printed circuit boards, connectors and interposers to create signal paths which reduce the deleterious signal quality issues associated with the use of through-holes. Disclosed structures can coexist with through-hole implementations.

Abstract translation: 由多个封装，印刷电路板，连接器和插入件采用的结构，以产生减少与使用通孔相关联的有害信号质量问题的信号路径。 公开的结构可以与通孔实现共存。

公开(公告)号：US07488676B2

公开(公告)日：2009-02-10

申请号：US11297358

申请日：2005-12-09

Applicant: Yasuhiko Kanaya ,  Akira Irie ,  Katsuhiro Nagasawa ,  Toru Yuki

Inventor： Yasuhiko Kanaya ,  Akira Irie ,  Katsuhiro Nagasawa ,  Toru Yuki

IPC: H01L21/4763

CPC classification number: H05K3/429 ,  H05K1/0268 ,  H05K3/0047 ,  H05K2201/092 ,  H05K2201/09718 ,  H05K2201/09845 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/163 ,  H05K2203/175 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/24926

Abstract: A manufacturing method of a multi-layered circuit board allows electronic parts to be mounted adequately and will not hamper performance of the electronic parts. A power terminal (pin) of an electronic part to be mounted on a surface of the multi-layered circuit board is inserted into a plated through hole to connect with a first conductive layer. A detecting section having a detecting hole which is formed coaxially with the through hole and whose diameter is larger than the through hole is provided on a second conductive layer on the back of the first conductive layer. A hole having a large diameter is formed by a tool along the through hole from the back while applying voltage between the second conductive layer and the tool. The depth of the hole is set based on the tool electrically conducting with the detecting hole. Unnecessary plate of the through hole may be removed by the large hole.

Abstract translation: 多层电路板的制造方法允许电子部件被充分地安装，并且不会妨碍电子部件的性能。 要安装在多层电路板的表面上的电子部件的电源端子（销）插入到电镀通孔中以与第一导电层连接。 在第一导电层的背面的第二导电层上设置有具有与通孔同轴并且其直径大于通孔的检测孔的检测部。 在第二导电层和工具之间施加电压时，具有大直径的孔由工具沿着通孔从背面形成。 基于与检测孔导电的工具设定孔的深度。 通孔的不必要的板可以被大孔除去。

公开(公告)号：US20070279870A1

公开(公告)日：2007-12-06

申请号：US11755076

申请日：2007-05-30

Applicant: Hisashi Sato ,  Yuichi Ishida ,  Masaaki Ishiguro ,  Kazuaki Nakamura

Inventor： Hisashi Sato ,  Yuichi Ishida ,  Masaaki Ishiguro ,  Kazuaki Nakamura

IPC: H05K7/20

CPC classification number: H05K7/026 ,  H01R9/226 ,  H05K1/0203 ,  H05K1/056 ,  H05K2201/0382 ,  H05K2201/092

Abstract: An electrical component is mounted a circuit board. A case covers the circuit board. The circuit board includes a plate-like metal core and an insulation portion. The insulation portion covers a surface of the metal core. The metal core is provided with a heat radiation portion exposed from the case.

Abstract translation: 电气部件安装有电路板。 案例涵盖电路板。 电路板包括板状金属芯和绝缘部。 绝缘部分覆盖金属芯的表面。 金属芯设置有从壳体露出的散热部。

公开(公告)号：US07304862B2

公开(公告)日：2007-12-04

申请号：US11559928

申请日：2006-11-15

Applicant: Galliano R. Busletta ,  Robert J. Roessler

Inventor： Galliano R. Busletta ,  Robert J. Roessler

IPC: H05K7/00

CPC classification number: H05K1/165 ,  H01F2027/2819 ,  H05K3/429 ,  H05K2201/086 ,  H05K2201/09063 ,  H05K2201/092 ,  H05K2201/09645

Abstract: The present invention provides a PWB for attaching electrical components thereto. The PWB includes a stack of insulating layers, conductive layers located between the insulating layers, wherein the conductive layers terminate at an edge of the PWB, and an edge plate interconnect located on the edge. The edge plate interconnect is free of a complementary via and contacts and electrically interconnects the conductive layers. The present invention also provides a method of making the PWB and also provides a power converter implementing the edge plate interconnects.

Abstract translation: 本发明提供一种用于将电气部件附接到其上的PWB。 PWB包括堆叠的绝缘层，位于绝缘层之间的导电层，其中导电层终止于PWB的边缘，以及位于边缘上的边缘板互连。 边缘板互连件没有互补的通孔和触点，并且电连接导电层。 本发明还提供一种制造PWB的方法，并且还提供实现边缘板互连的功率转换器。

公开(公告)号：US20070266281A1

公开(公告)日：2007-11-15

申请号：US11411920

申请日：2006-04-27

Applicant: Young Kwark

Inventor： Young Kwark

IPC: G01R31/28

CPC classification number: H05K1/183 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/165 ,  H01L2223/6627 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/1903 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2203/049 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: An electrical circuit device that includes a circuit board with an integrated circuit chip in a cavity that extends from a surface of the circuit board to an embedded conductor, and an electrical connection between the integrated circuit chip and the embedded conductor.

Abstract translation: 一种电路装置，其包括具有从电路板的表面延伸到嵌入导体的空腔中的集成电路芯片的电路板以及集成电路芯片和嵌入式导体之间的电连接。

公开(公告)号：US20050103522A1

公开(公告)日：2005-05-19

申请号：US10990280

申请日：2004-11-15

Applicant: Kevin Grundy ,  William Wiedemann ,  Joseph Fjelstad

Inventor： Kevin Grundy ,  William Wiedemann ,  Joseph Fjelstad

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H05K3/46

CPC classification number: H05K3/3405 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/3011 ,  H05K1/183 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0919 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2201/10189 ,  H05K2201/1059 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10727 ,  H05K2201/10734 ,  H01L2924/00

Abstract: Disclosed are stair stepped PCB structures which provide high performance, direct path, via-less interconnections between various elements of an electronic interconnection structure including, among others, IC packages and connectors.

Abstract translation: 公开了楼梯级PCB结构，其提供包括IC封装和连接器在内的电子互连结构的各种元件之间的高性能，直接路径，无通孔互连。

公开(公告)号：USRE37840E1

公开(公告)日：2002-09-17

申请号：US09159360

申请日：1998-09-23

Applicant: Anilkumar C. Bhatt ,  Roy H. Magnuson ,  Voya R. Markovich ,  Konstantinos I. Papathomas ,  Douglas O. Powell

Inventor： Anilkumar C. Bhatt ,  Roy H. Magnuson ,  Voya R. Markovich ,  Konstantinos I. Papathomas ,  Douglas O. Powell

IPC: H01K316

CPC classification number: H05K3/0094 ,  H01L23/5384 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K1/112 ,  H05K3/0023 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/092 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09845 ,  H05K2201/10734 ,  H05K2203/0191 ,  H05K2203/0278 ,  Y10T29/49126 ,  Y10T29/49165

Abstract: Disclosed is a printed circuit board and a method of preparing the printed circuit board. The printed circuit board has two types of plated through holes. The first type of plated through holes extend to and through an exterior surface of the printed circuit board for receipt of a pin-in-through-hole module or component pin. The second type of plated through holes are for surface mount technology and terminate below the exterior surfaces of the printed circuit board. These plated through holes contain a bill composition.

Abstract translation: 公开了印刷电路板和制备印刷电路板的方法。 印刷电路板有两种电镀通孔。 第一类型的电镀通孔延伸到印刷电路板的外表面并通过印刷电路板的外表面，用于接收针式通孔模块或部件销。 第二种类型的电镀通孔用于表面贴装技术，并终止在印刷电路板的外表面之下。 这些电镀通孔包含纸币组合物。

公开(公告)号：US06323436B1

公开(公告)日：2001-11-27

申请号：US08833614

申请日：1997-04-08

Applicant: Jeffrey Curtis Hedrick ,  Kostas Papathomas ,  Amarjit Singh Rai ,  Stephen Leo Tisdale ,  Alfred Viehbeck

Inventor： Jeffrey Curtis Hedrick ,  Kostas Papathomas ,  Amarjit Singh Rai ,  Stephen Leo Tisdale ,  Alfred Viehbeck

IPC: H05K104

CPC classification number: H05K1/0366 ,  H01L23/145 ,  H01L2224/16225 ,  H01L2924/1433 ,  H01L2924/15311 ,  H05K3/0023 ,  H05K3/0035 ,  H05K3/0041 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0278 ,  H05K2201/068 ,  H05K2201/092 ,  H05K2201/09518 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096

Abstract: Disclosed is a printed circuit board, and a method of preparing a printed circuit board, which possesses a coefficient of thermal expansion substantially similar to that of silicon for use in direct semiconductor chip attach structures and similar solder mounted devices. The printed circuit board is fabricated from prepreg having a thermosetting resin and a reinforcement layer consisting of non-woven aramid mat or a liquid crystalline polymer paper. The composite dielectric layer optionally includes plated through holes which are either filled or non-filled, and one or more thin film redistribution layers to provide high density electronic packages. The design places the solder pads at the PTHs where needed. The redistribution layer can be formed using photoimagable dielectrics or laminated controlled-CTE composites and laser via imaging.

Abstract translation: 公开了一种印刷电路板，以及一种制备印刷电路板的方法，该印刷电路板的热膨胀系数基本上类似于用于直接半导体芯片连接结构和类似的焊接安装器件的硅的热膨胀系数。 印刷电路板由具有热固性树脂的预浸料和由无纺芳族聚酰胺垫或液晶聚合物纸构成的加强层制成。 复合电介质层可选地包括填充或未填充的电镀通孔以及一个或多个薄膜再分配层以提供高密度电子封装。 该设计将焊盘放置在需要的PTH处。 可以使用光可光电介质或层压的受控CTE复合材料和激光通孔成像形成再分布层。

公开(公告)号：US5665525A

公开(公告)日：1997-09-09

申请号：US540573

申请日：1995-10-06

Applicant: Seppo Pienimaa

Inventor： Seppo Pienimaa

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  G03F7/00

CPC classification number: H05K3/426 ,  H05K1/115 ,  H05K3/4602 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K3/0023 ,  H05K3/184 ,  H05K3/429

Abstract: A method for producing printed circuit boards (PCB), wherein a base material of a PCB, having copper claddings respectively on its opposed faces, is subject to the following subsequent processing steps. Holes are punched in the base material and claddings. The copper claddings are cleaned and deburred by mechanical and/or chemical techniques. Using image transfer and etching techniques, a pattern is produced in the cladding layers that exposes surface portions and leaves cladding portions adjacent to the holes of the base material. A photoimageable polymer insulating layer is applied to the exposed surfaces of the PCB base material and to the remaining pattern of cladding. The PCB is subjected to exposure and development, which exposes selected portions of the cladding layers including cladding portions adjacent to the holes. The opposite faces of the PCB are subjected to an adhesion improvement and activation treatment necessary for chemical deposition of metal. Image transfer is performed using a second photoimageable and developable insulating layer, and then metallization is applied to the hole walls and cladding portions adjacent to the holes by chemical deposition. In this process the desired conductor patterns, contact areas and interconnections are also produced onto activated areas not protected with the latter photoimageable insulating layer. A solder mask is applied to the PCB that protects the conductor pattern at areas except those intended for establishing contacts.

Abstract translation: 一种制造印刷电路板（PCB）的方法，其中分别在其相对面上具有铜包层的PCB​​的基底材料经受以下后续处理步骤。 孔在基材和包层上冲孔。 铜包层被机械和/或化学技术清洗和去毛刺。 使用图像转印和蚀刻技术，在包覆层中产生图案，其暴露表面部分并且使包覆部分邻近基材的孔留下。 将可光成像的聚合物绝缘层施加到PCB基材的暴露表面和剩余的包层图案。 PCB经受曝光和显影，其暴露包括邻近孔的包层部分的包层的选定部分。 对PCB的相对面进行金属化学沉积所需的附着改善和活化处理。 使用第二可光成像和可显影的绝缘层进行图像转印，然后通过化学沉积将金属化施加到邻近孔的孔壁和包层部分。 在这个过程中，期望的导体图案，接触区域和互连也被产生到未被后者的可光成像绝缘层保护的激活区域上。 焊接掩模被施加到PCB，其保护除了用于建立触点的那些区域之外的导体图案。