公开(公告)号：JP4838984B2

公开(公告)日：2011-12-14

申请号：JP2004062525

申请日：2004-03-05

Applicant: パナソニック株式会社

Inventor： 哲郎 南野 ,  雅憲 吉田

IPC: H01M2/30 ,  H01G9/004 ,  H01G9/008 ,  H01G9/012 ,  H01M2/00 ,  H01M2/02 ,  H01M2/10 ,  H01M6/18 ,  H01M10/04 ,  H01M10/0562 ,  H01M10/058 ,  H01M10/42 ,  H05K1/02 ,  H05K3/30

CPC classification number: H01M10/0436 ,  H01M2/30 ,  H01M10/4257 ,  H05K1/0269 ,  H05K3/303 ,  H05K2201/0112 ,  H05K2201/10636 ,  H05K2201/10909 ,  H05K2203/168 ,  Y02P70/611 ,  Y02P70/613

公开(公告)号：JP4445014B2

公开(公告)日：2010-04-07

申请号：JP2007512361

申请日：2006-08-23

Applicant: 第一電子工業株式会社

Inventor： 英男 大森 ,  裕之 森内 ,  春樹 清水

IPC: H01R4/02 ,  H01R13/03 ,  H01R43/02

CPC classification number: H05K3/3447 ,  H01R4/028 ,  H01R13/03 ,  H01R43/16 ,  H05K2201/10909 ,  H05K2201/2081 ,  H05K2203/0315 ,  H05K2203/107

公开(公告)号：JPWO2007024005A1

公开(公告)日：2009-03-05

申请号：JP2007512361

申请日：2006-08-23

Applicant: 第一電子工業株式会社

Inventor： 裕之 森内 ,  裕之 森内 ,  英男 大森 ,  英男 大森 ,  春樹 清水 ,  春樹 清水

IPC: H01R4/02 ,  H01R13/03 ,  H01R43/02

CPC classification number: H05K3/3447 ,  H01R4/028 ,  H01R13/03 ,  H01R43/16 ,  H05K2201/10909 ,  H05K2201/2081 ,  H05K2203/0315 ,  H05K2203/107

Abstract: 端子部を基板に半田接合する際に、半田上がりを所定位置で停止できる酸化露出表面を、コンタクトの中間部内に簡便かつ精度よく形成することができる超小形コンタクトおよびその製造方法並びに電子部品を提供する。本発明のコンタクトは、導電性素地材料と、その上に形成した下地表面処理層および上側表面処理層とで構成され、接触部2と端子部3と中間部4とからなり、中間部4内に、その全周にわたって下地表面処理層の酸化露出表面5を形成したものであり、前記酸化露出表面5は、コンタクト1の表裏面1a,1bに対しそれぞれ所定の傾斜角度θa,θbでレーザー光を照射して、上側表面処理層の除去と、この除去により露出した狭幅の下地表面処理層の酸化を同時に行うことにより形成することを特徴とする、全長10mm以下の超小形コンタクトである。

公开(公告)号：JP2007324550A

公开(公告)日：2007-12-13

申请号：JP2006156687

申请日：2006-06-05

Applicant: Denso Corp ,  株式会社デンソー

Inventor： TAKEUCHI SATOSHI ,  KAMIYA HIROTERU ,  SHIMIZU MOTONORI

IPC: H05K3/46 ,  H01L23/12

CPC classification number: H05K1/186 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/4632 ,  H05K2201/0129 ,  H05K2201/10909

Abstract: PROBLEM TO BE SOLVED: To provide a multilayer substrate which can be improved in reliability of a connection with an electrode of an electronic component. SOLUTION: Disclosed is the multilayer substrate 100 which is formed by being heated while pressed by a vacuum heating press machine, and has conductor patterns, electrically connected by a conductive composition 51, disposed in layers on an insulating base material 39 made of an insulating material and also has the electric component 41 incorporated in the insulating base material 39. The electronic component 41 is electrically connected to at least one of the conductive composition 51 and conductor patterns 22, and has electrodes 42 formed of materials having a fusion point higher than the temperature at which the substrate is heated while pressed by the vacuum heating press machine. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 解决的问题：提供可以提高与电子部件的电极的连接的可靠性的多层基板。 解决方案：公开了通过在真空加热压机中加压而被加热形成的多层基板100，并且具有导电图案，其通过导电组合物51电连接，层叠在由绝缘基材39制成的绝缘基材39上， 绝缘材料，并且还具有结合在绝缘基材39中的电气部件41.电子部件41电连接到导电组合物51和导体图案22中的至少一个，并且具有由具有熔点的材料形成的电极42 高于由真空加热压机按压时基板被加热的温度。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2007173846A

公开(公告)日：2007-07-05

申请号：JP2006355406

申请日：2006-12-28

Applicant: Formfactor Inc ,  フォームファクター, インコーポレイテッド

Inventor： KHANDROS IGOR Y ,  GETAN L MATTHEW

IPC: H01L23/12 ,  H01L25/18 ,  C23C18/16 ,  C25D7/12 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  G01R31/26 ,  G01R31/28 ,  H01L21/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/60 ,  H01L21/66 ,  H01L23/32 ,  H01L23/48 ,  H01L23/485 ,  H01L23/49 ,  H01L23/498 ,  H01L25/065 ,  H01L25/07 ,  H01L25/16 ,  H01R4/02 ,  H01R9/00 ,  H01R12/52 ,  H01R33/76 ,  H05K1/14 ,  H05K3/30 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H05K7/10

CPC classification number: H05K7/1069 ,  B23K2201/40 ,  G01R1/0466 ,  G01R1/0483 ,  G01R1/06711 ,  G01R1/06716 ,  G01R1/06761 ,  G01R1/07314 ,  G01R1/07342 ,  G01R1/07357 ,  G01R3/00 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/67138 ,  H01L21/6715 ,  H01L22/20 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/06153 ,  H01L2224/1134 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/78301 ,  H01L2224/81801 ,  H01L2224/85045 ,  H01L2224/85205 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49124 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/49217 ,  Y10T29/49224 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/81205

Abstract: PROBLEM TO BE SOLVED: To make it possible to use a contact structure directly attached to active silicon equipment, and especially, an elastic contact structure. SOLUTION: In a semiconductor package assembly 611, a board 612 which comprises conductive contact pads on a first surface and a second surface and which is composed of an insulating material is contained. In addition, a plurality of semiconductor devices 621 which comprise contact pads faced with the contact pads on the first surface and the second surface of the board 612 are contained. In addition, elastic contact structures 626 by which the contact pads of the semiconductor devices 621 and contact pads held by the board 612 are electrically connected to each other, and which are used to support the semiconductor devices in positions at intervals from the surface of the board 612 in such a way that the semiconductor devices 621 exist on a first parallel plane and a second parallel plane on both sides of the board 612 are contained. In addition, contact means 616 which are held by the board 612 and which form electrical contacts with the semiconductor devices 621 via the contact structures 626 are contained. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：使得可以使用直接连接到有源硅设备的接触结构，特别是弹性接触结构。 解决方案：在半导体封装组件611中，包含在第一表面和第二表面上包括由绝缘材料构成的导电接触焊盘的板612。 此外，包含面对面板612的第一表面和第二表面上的接触焊盘的接触焊盘的多个半导体器件621。 另外，由半导体器件621的接触焊盘和由板612保持的接触焊盘的弹性接触结构626彼此电连接，并且用于将半导体器件从位于 板612，使得半导体器件621存在于第一平行平面上，并且包含在板612两侧的第二平行平面。 此外，包含由板612保持并且经由接触结构626与半导体器件621形成电接触的接触装置616。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2005327589A

公开(公告)日：2005-11-24

申请号：JP2004144454

申请日：2004-05-14

Applicant: Tyco Electronics Amp Kk ,  タイコエレクトロニクスアンプ株式会社

Inventor： YAMAGAMI HIDEHISA

IPC: H01R4/02 ,  H01R13/60 ,  H05K3/30 ,  H05K3/34 ,  H01R12/32

CPC classification number: H01R4/024 ,  H01R12/716 ,  H05K3/308 ,  H05K3/3447 ,  H05K2201/10189 ,  H05K2201/10757 ,  H05K2201/10909

Abstract: PROBLEM TO BE SOLVED: To prevent a board-mounted electric connector from contaminating an environment by lead, and producing whiskers, while realizing low height and high density of the connector. SOLUTION: The board-mounted electric connector 1 is equipped with a dielectric housing 2 which holds a plurality of lines of contacts 6 and is mounted on a board 14. Each contact 6 has a contacting portion 12 which comes in contact with a mating connector, and a leg 16 to be connected to the board. Each leg 16 has an extending-out portion 18a, 22a extending out from a rear wall 4, a bent portion 18b, 22b is in continuity with each extending-out portion 18a, 22a, and a straight portion 18c, 22c extends from each bent portion so as to cross the board approximately perpendicularly and is connected to a through hole 20 of the board. In the connector 1, at least the extending-out portion 22a of the contact in a line nearest to the board 14 out of the contacts 6 in the plurality of lines extends out in a direction of leaving farther from the rear wall 4 of the dielectric housing 2 toward the board 14, and reaches the bent portion 22b. Accordingly, tin is partially plated on the straight portions 18c, 22c of the leg portions 16. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：为了防止板上安装的电连接器在实现连接器的低高度和高密度的同时，通过铅污染环境并生产晶须。 解决方案：板上安装的电连接器1装有绝缘壳体2，绝缘壳体2保持多个触点线6并安装在板14上。每个触点6具有接触部分12， 配合连接器，以及要连接到电路板的支脚16。 每个脚16具有从后壁4延伸出的伸出部分18a，22a，弯曲部分18b，22b与每个伸出部分18a，22a连续，并且直线部分18c，22c从每个弯曲部分延伸出来 部分，以便大致垂直地穿过板并且连接到板的通孔20。 在连接器1中，多个线中的触点6中最靠近板14的线中的触点的至少延伸部分22a在远离电介质的后壁4的方向上延伸出来 壳体2朝向板14，到达弯曲部分22b。 因此，锡部分地电镀在腿部16的直线部分18c，22c上。版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2004523921A

公开(公告)日：2004-08-05

申请号：JP2002573500

申请日：2002-03-14

Applicant: アアビッド・サーマロイ・エルエルシー

Inventor： フランシス・エドワード・フィッシャー ,  ラッセル・ボウルズ

IPC: H05K7/20 ,  H01L23/36 ,  H01L23/367 ,  H01L23/40 ,  H05K3/34

CPC classification number: H05K3/341 ,  H01L23/3672 ,  H01L23/40 ,  H01L23/4093 ,  H01L2924/0002 ,  H05K3/3421 ,  H05K2201/066 ,  H05K2201/10909 ,  H05K2201/10916 ,  H05K2201/2081 ,  H05K2203/0315 ,  Y02P70/613 ,  H01L2924/00

Abstract: 複合ヒートシンク装置１は、アルミニウムで形成されたヒートシンク本体２，３を備え、本体２，３は、一対の平面４と、各平面４に機械的に固定され熱伝導性を有しはんだ付け可能な例えば銅製のはんだ付け可能な要素５とを備える。 はんだ付け可能な要素５はそれぞれ、平面の一方に隣接する第１面と、プリント基板にはんだ付けされる第２面とを備える。

公开(公告)号：JP3387930B2

公开(公告)日：2003-03-17

申请号：JP51632396

申请日：1995-11-15

Applicant: フォームファクター,インコーポレイテッド

Inventor： エルドリッジ，ベンジャミン，エヌ ,  グルーブ，ゲーリー，ダヴリュー ,  ハンドロス，イゴー，ワイ ,  マシュー，ゲータン，エル

IPC: G01R1/06 ,  B23K1/00 ,  B23K20/00 ,  B32B15/08 ,  C23C18/16 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R31/26 ,  G01R31/28 ,  H01L21/00 ,  H01L21/02 ,  H01L21/288 ,  H01L21/48 ,  H01L21/56 ,  H01L21/60 ,  H01L21/603 ,  H01L21/66 ,  H01L23/48 ,  H01L23/485 ,  H01L23/49 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16 ,  H01R12/52 ,  H05K1/14 ,  H05K3/20 ,  H05K3/30 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H05K7/10

CPC classification number: H05K7/1069 ,  B23K1/0016 ,  B23K20/004 ,  B23K2201/40 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/0483 ,  G01R31/2863 ,  H01L21/288 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/67138 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/05082 ,  H01L2224/05644 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/16145 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45644 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48644 ,  H01L2224/48699 ,  H01L2224/48844 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2224/48744 ,  H01L2924/20751 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/00015 ,  H01L2924/2075 ,  H01L2924/20754

Abstract: Resilient contact structures (430) are mounted directly to bond pads (410) on semiconductor dies (402a, 402b), prior to the dies (402a, 402b) being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies (402a, 402b) to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies (702, 704) with a circuit board (710) or the like having a plurality of terminals (712) disposed on a surface thereof. Subsequently, the semiconductor dies (402a, 402b) may be singulated from the semiconductor wafer, whereupon the same resilient contact structures (430) can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements (430) of the present invention as the resilient contact structures, burn-in (792) can be performed at temperatures of at least 150 DEG C, and can be completed in less than 60 minutes.

公开(公告)号：JPS6134963A

公开(公告)日：1986-02-19

申请号：JP10575185

申请日：1985-05-17

Applicant: British Telecommun

Inventor： GURAHAMU KEISU HOWAITOHETSUDO ,  KENESU TEIRAA

IPC: H01L23/12 ,  H01L23/057 ,  H01L23/13 ,  H01L23/14 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H05K1/02 ,  H05K3/00 ,  H05K3/24 ,  H05K3/34 ,  H05K3/40 ,  H05K3/42

CPC classification number: H05K3/3442 ,  H01L23/057 ,  H01L23/13 ,  H01L23/145 ,  H01L23/3677 ,  H01L23/49805 ,  H01L23/538 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/0052 ,  H05K3/242 ,  H05K3/244 ,  H05K3/403 ,  H05K3/42 ,  H05K2201/0129 ,  H05K2201/09036 ,  H05K2201/09118 ,  H05K2201/09181 ,  H05K2201/09709 ,  H05K2201/10727 ,  H05K2201/10909 ,  H05K2203/0723 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00

Abstract: A chip carrier includes a body (1) having a central region and sidewalls (31) connected to the central region by an elastically deformable region (33), in order to reduce thermal strains. Also for the same reason a heat sink (41) may be attached underneath the carrier below the carrier's die attachment site (8) and thermally conductive material (40,42) may connect them together. The heat sink may be used for mechanical anchorage. The chip carrier may be produced by injection moulding from an aromatic thermoplastic polymer. A carrier may be moulded with more than one die attachment site or a circuit board with die attachment sites could be moulded, preferably with the die attachment site recessed so that the surface of the die 9 is co-planar with conductive tracks on the board.

Abstract translation: 芯片载体包括具有中心区域的主体（1）和通过可弹性变形区域（33）连接到中心区域的侧壁（31），以便减少热应变。 同样由于相同的原因，散热器（41）可以在载体下方的载体的芯片附接位置（8）下方附接，并且导热材料（40,42）可将它们连接在一起。 散热器可用于机械固定。 芯片载体可以通过从芳族热塑性聚合物注射成型制备。 可以使用多于一个管芯附接部位模制载体，或者可以模制具有管芯附接位置的电路​​板，优选地，将模具附接部位凹进，使得管芯9的表面与板上的导电轨道共面。

公开(公告)号：JPS59151443A

公开(公告)日：1984-08-29

申请号：JP2585883

申请日：1983-02-17

Applicant: Fujitsu Ltd

Inventor： SUGIMOTO MASAHIRO ,  WAKABAYASHI TETSUSHI ,  MURATAKE KIYOSHI

IPC: H01L23/12 ,  H01L23/057 ,  H01L23/498 ,  H01L23/538 ,  H05K3/34

CPC classification number: H01L24/32 ,  H01L23/057 ,  H01L23/49811 ,  H01L23/5385 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/351 ,  H05K3/3426 ,  H05K2201/10704 ,  H05K2201/10909 ,  H05K2201/2081 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00

Abstract: PURPOSE: To produce a space between the backside of a package and the surface of a substrate preventing a crack at solder junction due to thermal shock from happening by a method wherein multiple conductor pads are provided on the backside of a package containing semiconductor elements to solder conductor pins therewith and when the package is placed on a circuit substrate, the conductor pins are soldered with connecting electrodes provided on the substrate.
CONSTITUTION: Multiple pads 12 are formed on the backside of a package 1 containing semiconductor elements to solder conductor pins 4 respectively therewith. On the other hand, connecting electrodes 21 corresponding to the conductor pins 4 are provided on the surface of a circuit substrate 2 whereon the package 1 is placed to be soldered with the conductor pins 4. In such a constitution, a space may be produced between the package 1 and the substrate 2 and the conductor pins 4 may play a role of buffer against thermal shock preventing a crack at solder junction from happening.
COPYRIGHT: (C)1984,JPO&Japio

Abstract translation: 目的：在封装的背面和基板表面之间产生一个空间，防止由于热冲击引起的焊点处的裂纹，通过一种方法发生，其中在包含半导体元件的焊料的背面上设置多个导体焊盘 导体引脚，并且当封装被放置在电路基板上时，导体引脚与设置在基板上的连接电极焊接。 构成：在包含半导体元件的封装1的背面分别形成多个焊盘12以分别与焊接导体引脚4连接。 另一方面，与导体引脚4对应的连接电极21设置在电路基板2的表面，其中封装1被放置成与导体引脚4焊接。在这种结构中，可以产生空间， 封装1和基板2以及导体引脚4可以起缓冲作用，防止热连接处的裂纹发生。