DRIVER CIRCUIT OF ELECTRONIC SWITCH
    181.
    发明专利

    公开(公告)号:JPH06216733A

    公开(公告)日:1994-08-05

    申请号:JP23338493

    申请日:1993-09-20

    Abstract: PURPOSE: To unnecessitate activation time until reaching an ordinary state by setting the clock cycle of output terminal at the maximum power voltage value from the beginning by composing a driver circuit for electronic switch of an input pin for impressing a clock signal and a voltage duplexer connected between this pin and a switch. CONSTITUTION: In this driver circuit 1 for an electronic switch 2, the switch 2 is operated corresponding to the clock signal at a prescribed frequency. The switch 2 is composed of an N channel MOS transistor M3, its gate terminal is connected to an output terminal 0 of circuit 1 and its drain terminal and source terminal are functioned as switch terminals. The circuit 1 is provided with a pair of FET M1 and M2, and their drain terminals D1 and D2 are also connected to the terminal 0 together. When operating the circuit 1 in such configuration, a phase F at an input pin B is made high, the phase F at a pin A is made low, in such a state, the gate/source voltage drop of transistor M1 is made equal with a power supply voltage Vdd, the M2 is not conducted and a capacitor C is turned into charged state.

    DIFFERENTIAL MUTUAL CONDUCTANCE STAGE CONTROLLED DYNAMICALLY BY AMPLITUDE OF INPUT SIGNAL

    公开(公告)号:JPH06216657A

    公开(公告)日:1994-08-05

    申请号:JP25491693

    申请日:1993-09-16

    Abstract: PURPOSE: To provide a mutual differential conductance input stage in which a bias condition is corrected by varying amplitude of a signal to be supplied to an input stage of a differential stage to improve entire noise characteristics of an amplifier. CONSTITUTION: The differential stage is configured by providing a means to reduce bias current by an amount in inversely proportional to the amplitude of an input signal vin with the differential stage including a pair of transistors Q1 and Q2 with a degenerate resistor R. Noise at a high level generated by an input stage in a conventional device with high input dynamic characteristics is solved by the differential stage.

    NOR-TYPE ROM PROVIDED WITH LDD CELL
    183.
    发明专利

    公开(公告)号:JPH0669463A

    公开(公告)日:1994-03-11

    申请号:JP18449093

    申请日:1993-06-28

    Abstract: PURPOSE: To obtain a ROM matrix whose cell has the junction of diffused parts with concentration gradients by a method wherein ions sufficient to reverse the conductivity-type of a part of a drain region are implanted and diffused and the drain region is decoupled from a channel region. CONSTITUTION: A gate oxide layer 2, a single cell gate electrode 3 and drain regions 4 and 5 are formed in a semiconductor substrate region 1 having the p-type conductivity. A part of the drain area of a programming cell to which a current is not applied is restricted by a photoresist mask M1. Phosphorus ions are diffused through the aperture of the photoresist mask M1 and boron ions are implanted. The conductivity type of a region 6 between programming channel and drain regions is reversed. Then a photoresist mask M2 is formed, drain area of the memory cell is masked and arsenic ions are implanted through the aperture.

    EWS PROBE CARD OF TEST-ON-WAFER STATION AND UNIVERSAL CONNECTION STRUCTURE BETWEEN TEST CARDS

    公开(公告)号:JPH0621167A

    公开(公告)日:1994-01-28

    申请号:JP17435491

    申请日:1991-06-19

    Abstract: PURPOSE: To quickly and easily connect both an EWS probe card and a test card by forming male contacts on the upper face of the EWS probe card and the lower face of the test card, and electrically connecting them with double female contacts of universal connectors. CONSTITUTION: This system is provided with plural male contacts 6 set on the upper face of an EWS probe card 3, and individually connected with each probe 5 projecting from the bottom face of the probe card 3, and plural contacts 6 arranged on the bottom face of a test card 10. Also, this system is provided with universal connectors 7, on which plural double female contacts are mounted which are formed with sufficient room in each receptacle formed in insulating materials. Also, the mutual coupling of each male contact 6 can be attained through the double female contacts of the universal connectors 7. Thus, the EWS probe card 3 can be quickly and easily connected with the test card 10.

    ACOUSTIC-FEEDBACK SUPPRESSING DEVICE FOR AUXILIARY RINGER OF PLUG-IN TELEPHONE SYSTEM

    公开(公告)号:JPH066439A

    公开(公告)日:1994-01-14

    申请号:JP2550293

    申请日:1993-02-15

    Abstract: PURPOSE: To obtain a restraining device for controlling a voltage taken in a supplemented ringer and limiting a pseudo driving pulse by providing a circuit using rectifying bridges and diodes. CONSTITUTION: A 1st rectifying bridge 10 and a 2nd rectifying bridge 11 are disposed between the input terminals 12 and 13 of a telephone set. An auxiliary ringer 33 is power-supplied via a 1st terminal 29 and the 2nd terminal 13. The cathode terminal of the diodes 17 and 18 are connected to the both ends of the 1st diagonal line of the 2nd rectifying bridge 11. A capacitor 28 operates as the dc separator of a ringer 14. When a call is performed, that is, when a transmitter/receiver unhooked, switches 20, 24 and 31 are closed and a switch 26 is opened, so that a voltage set by a speaking circuit 25 appears in terminals 12 and 13. When in calling, the power supply terminals 29 and 13 to the added ringer 33 are AC-limited by the presence of a Zener diode 21.

    186.
    发明专利
    失效

    公开(公告)号:JPH05252320A

    公开(公告)日:1993-09-28

    申请号:JP27013592

    申请日:1992-10-08

    Abstract: PURPOSE: To provide a circuit array which constitutes a speech circuit having extremely small voltage loss of a telephone line. CONSTITUTION: This array consists of an operational amplifier A, two resistors R1 and R2 connected between a telephone line and the input of the amplifier, 1st and 2nd FETs M1 and M2 connected to the output of the amplifier, 1st and 2nd bipolar transistors P1 and P2 which are controlled by the amplifier through the FETs, two current generators CC1 and CC2 , and a capacitor C connected to the collector terminal of the 2nd bipolar transistor, and the voltage of the telephone line is obtained as a stabilized voltage VS across the capacitor through the circuit array. Currents I1 and I2 from the generators and other electric physical quantities as circuit constants are so set that the 1st and 2nd bipolar transistors are turned off and on respectively when the voltage of the telephone line is smaller than a specific minimum value and on and off when not.

    LARGE-CURRENT MOS TRANSISTOR INTEGRATED BRIDGE STRUCTURE FOR OPTIMIZATION OF CONTINUITY POWER LOSS

    公开(公告)号:JPH05226597A

    公开(公告)日:1993-09-03

    申请号:JP31502492

    申请日:1992-11-25

    Abstract: PURPOSE: To provide a large-current MOS transistor integrated bridge which is formed in a monolithic structure on a single Si substrate, optimizing a conduction power loss. CONSTITUTION: An N -type substrate 3, which includes at least two arms respectively comprised of first and second MOS Trs and which forms a positive potential output terminal K1, covered with an N -type epitaxial layer 4. A bridge is comprised of a P and P -type insulating regions 13, 25 and 14, 16, including N -type drain regions 15, 16, N-type drain regions 19, 20 and a pair of N -type source regions 23, 24 forming continuously P-type main body regions 21, 22 and a negative potential output terminal with respect to each of the first Tr. The bridge also consists of an N -type drain regions 5, 6, including N-type drain regions 31, 32 with respect to each of the second Tr, continuously P-type main body regions 9, 10 and a pair of N -type regions 11, 12 forming respectively corresponding ac inputs A3, A4.

    METAL SEMICONDUCTOR OHMIC CONTACT POINT TYPE FORMATION PROCESSING METHOD

    公开(公告)号:JPH04215424A

    公开(公告)日:1992-08-06

    申请号:JP4555091

    申请日:1991-02-20

    Abstract: PURPOSE: To form the M-S contact of ohmic characteristic on a small doping region through dopant enrichment treatment on a contact surface by keeping the temperature and time of annealing treatment, which is to be performed after ion implantation on the surface of a semiconductor, at values without the possibility of changing functional characteristics in the structure of a device on the front surface of a wafer. CONSTITUTION: As a metal semiconductor ohmic contact forming treatment, the ion implantation of dopant is performed on the surface of a semiconductor 1. Next, a metal film 4 is deposited on the surface, where the ion implantation is performed, and then annealing treatment is performed considerably shorter than 60 minutes at a temperature considerably lower than 500 deg.C, so that dopant enrichment can be performed on the surface of the semiconductor 1 for forming the contact.

    Pcm-type interface
    189.
    发明专利
    Pcm-type interface 审中-公开
    PCM型接口

    公开(公告)号:JP2007028603A

    公开(公告)日:2007-02-01

    申请号:JP2006180249

    申请日:2006-06-29

    CPC classification number: H04B14/04 H04L7/0008 H04M1/6066

    Abstract: PROBLEM TO BE SOLVED: To provide an interface device (30) which is configured so as to communicate data in a duplex mode, and is provided with first and second data terminal (A, B), one of which is always assigned to each direction of communication.
    SOLUTION: The first and second data terminals can be constituted during operation. As a result of this, in a first mode of operation, the first terminal (A) is constituted so as to transmit (PCM_Tx), but not to receive data, and the second terminal (B) is constituted so as to receive (PCM_Rx) but not to transmit data; whereas in a second mode of operation, the first terminal (A) is constituted so as to receive (PCM_Rx) but not to transmit data, and the second terminal (B) is constituted so as to transmit (PCM_Tx) data but so as not to receive data.
    COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种接口设备(30),其被配置为以双工模式传送数据,并且设置有第一和第二数据终端(A,B),其中一个总是被分配 到每个通信方向。

    解决方案:第一和第二数据端子可以在操作期间构成。 结果,在第一操作模式中,第一终端(A)构成为发送(PCM_Tx)但不接收数据,并且第二终端(B)构成为接收(PCM_Rx )但不传输数据; 而在第二操作模式中,第一终端(A)构成为接收(PCM_Rx)但不发送数据,并且第二终端(B)构成为传送(PCM_Tx)数据,但是不被 接收数据。 版权所有(C)2007,JPO&INPIT

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