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公开(公告)号：KR1020100030335A
公开(公告)日：2010-03-18
申请号：KR1020080089237
申请日：2008-09-10
Applicant: 한국전자통신연구원
CPC classification number: G01N33/54373 , B01L3/502761 , B01L2200/143 , B01L2300/0636 , B01L2300/0645 , B01L2300/0867 , B01L2300/163 , B01L2400/0415 , G01N27/4145
Abstract: PURPOSE: A device and a method for detecting biomolecules are provided to detect biomolecules with high-ionic strength by measuring a current change flowing in a channel area of a Field Effect Transistor. CONSTITUTION: A device for detecting biomolecules comprises a FET(12), a micro fluid supply unit(14), and a biomolecules detecting unit(18). The FET comprises a substrate, a source, a drain electrode, a channel area, and a probe molecule. The micro fluid supply unit selectively supplies reaction solution of high-ionic density to the channel area of the FET. The biomolecules detecting unit measures a first current value of the channel area of the FET in which the probe molecule is fixed. The biomolecules detecting unit measures a second current value of the channel area of the FET in which the probe molecule and a target molecule are fixed. And the biomolecules detecting unit detects the target molecule.
Abstract translation: 目的：提供一种用于检测生物分子的装置和方法，通过测量在场效应晶体管的通道区域中流动的电流变化来检测具有高离子强度的生物分子。 构成：用于检测生物分子的装置包括FET（12），微流体供应单元（14）和生物分子检测单元（18）。 FET包括衬底，源极，漏极，沟道区和探针分子。 微流体供应单元选择性地将高离子密度的反应溶液提供给FET的通道区域。 生物分子检测单元测量探针分子固定的FET的沟道面积的第一电流值。 生物分子检测单元测量探针分子和靶分子固定的FET的沟道面积的第二电流值。 并且生物分子检测单元检测靶分子。
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公开(公告)号：KR100940524B1
公开(公告)日：2010-02-10
申请号：KR1020070129581
申请日：2007-12-13
Applicant: 한국전자통신연구원
IPC: H01L21/336 , H01L29/78
CPC classification number: G01N27/4145 , H01L29/66818 , H01L29/7853
Abstract: 본 발명은 반도체 기술을 이용한 FET(Field-effect transistor) 센서에 관한 것으로, 좀더 구체적으로는 FET 센서의 민감도를 개선시키기 위하여 핀 구조를 이용하는 FET 센서 및 그 제조방법에 관한 것이다. 본 발명에 따른 반도체 FET 센서를 제조하는 방법은, 반도체 기판을 제공하는 단계와, 상기 반도체 기판상에 핀 구조를 갖는 센서 구조체를 형성하는 단계와, 상기 센서 구조체에 전기적 오믹 콘택을 위한 이온을 주입하고 금속 전극을 증착하는 단계와, 표적물질과 특이성 결합하는 감지물질을 상기 핀 구조의 양쪽 측벽에 고정화시키는 단계와, 상기 표적물질이 상기 핀 구조를 지나가도록 하는 통로를 상기 센서 구조체 위에 형성하는 단계를 포함한다.
반도체 FET 센서, 핀 구조, 바이오 센서, SOI 기판, 벌크 기판-
公开(公告)号：KR1020080051010A
公开(公告)日：2008-06-10
申请号：KR1020070094687
申请日：2007-09-18
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L29/66825 , H01L21/28273 , H01L21/67063 , H01L29/42324 , H01L29/513
Abstract: A highly-integrated semiconductor memory device and a manufacturing method thereof are provided to correctly read data by suppressing a leakage current generated as the semiconductor memory device is highly integrated. A source/drain electrode(220A) are formed on a silicon substrate to form a schottky junction with a channel region(220B). A floating gate composed of plural silicon nanodots(260A) is formed on the substrate of the channel region. The silicon nanodot is made of a silicon compound as a basal body, and a gate dielectric layer(270) is formed on the floating gate. A tunneling dielectric layer(250) is formed between the substrate of the channel region and the floating gate, and a control gate(280) is formed on the floating gate.
Abstract translation: 提供了一种高度集成的半导体存储器件及其制造方法，以通过抑制半导体存储器件高集成度时产生的漏电流来正确读取数据。 源极/漏极（220A）形成在硅衬底上以与沟道区（220B）形成肖特基结。 在沟道区的基板上形成由多个硅纳米点（260A）构成的浮置栅极。 硅纳米棒由硅化合物作为基体，在浮栅上形成栅介质层（270）。 在沟道区的衬底和浮置栅极之间形成隧穿电介质层（250），并且在浮动栅极上形成控制栅极（280）。
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公开(公告)号：KR1020080051009A
公开(公告)日：2008-06-10
申请号：KR1020070094686
申请日：2007-09-18
Applicant: 한국전자통신연구원
IPC: H01L27/108 , H01L21/8242 , H01L29/47
CPC classification number: H01L27/108 , H01L27/095 , H01L29/66257
Abstract: A semiconductor memory device and a driving method thereof are provided to store an electric charge in a channel region by using a schottky barrier formed at an interface between a channel region and a source/drain electrode. A gate(160) is formed over a channel region(130) of a silicon substrate(100). A source electrode(110) and a drain electrode(120) are formed on the silicon substrate to form a schottky junction with the channel region. An electric charge is stored in a schottky barrier formed between the source electrode and the drain electrode. The source electrode and the drain electrode are made of same or different metal silicide. A level of the schottky junction between the channel region and the source electrode is identical to or different from a level of the schottky barrier between the channel region and the drain electrode.
Abstract translation: 提供一种半导体存储器件及其驱动方法，通过使用在沟道区域和源极/漏极之间的界面处形成的肖特基势垒来在沟道区域中存储电荷。 在硅衬底（100）的沟道区（130）上形成栅极（160）。 在硅衬底上形成源电极（110）和漏电极（120），以形成与沟道区域的肖特基结。 在源电极和漏电极之间形成的肖特基势垒中存储电荷。 源电极和漏电极由相同或不同的金属硅化物制成。 沟道区和源电极之间的肖特基结的电平与沟道区和漏电极之间的肖特基势垒的电平相同或不同。
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公开(公告)号：KR100833489B1
公开(公告)日：2008-05-29
申请号：KR1020060016665
申请日：2006-02-21
Applicant: 한국전자통신연구원
CPC classification number: H01L33/34 , B82Y20/00 , H01L33/18 , Y10S438/962 , Y10S977/773 , Y10S977/774
Abstract: 본 발명은 빛을 발산하는 발광층, 상기 발광층에 형성된 정공 주입층, 상기 정공 주입층과 대향되도록 상기 발광층에 형성된 전자 주입층, 상기 전자 주입층에 형성된 금속 나노 점(nano dot)을 포함하는 금속층, 및 상기 금속층에 형성된 투명 전도성 전극을 포함하는 실리콘 나노 점을 이용한 반도체 발광 소자 및 이의 제조 방법을 개시한다. 상기 발광층으로 실리콘 나노 점을 포함하는 비정질의 실리콘 나이트라이드를 포함한다.
실리콘 나노 점, 반도체 발광 소자, 금속층, 투명 전도성 전극-
Patent Agency Ranking
公开(公告)号：KR100776648B1
公开(公告)日：2007-11-19
申请号：KR1020060123236
申请日：2006-12-06
Applicant: 한국전자통신연구원
IPC: H01L29/775
CPC classification number: H01L33/0004 , H01L27/15 , H01L33/06 , H01L33/16 , H01L33/34
Abstract: A silicon-based optical device and a method for manufacturing the same are provided to simplify a manufacturing process by using a general CMOS(Complementary Metal-Oxide Semiconductor) manufacturing method. A first and second transistors(100,101) are formed by using different conductive materials based on a silicon substrate(110), respectively. An active layer(119) is formed within the substrate between the first and second transistors. The active layer is formed with one quantum dot which is selected from a group including a silicon quantum dot formed within a silicon nitride layer, a silicon quantum dot formed within a silicon oxide layer, and a compound quantum dot. The compound quantum dot is selected from a group including GaAs, InAs, InGaAs, InAlAs, and InP. Each of the first and second transistors includes a gate insulating layer(113) formed on the substrate, gate electrodes(114A,114B) formed on the gate insulating layer, and a junction area(116) formed within the substrate exposed toward one side of the gate electrode.
Abstract translation: 提供硅基光学器件及其制造方法，以通过使用通用CMOS（互补金属氧化物半导体）制造方法来简化制造工艺。 第一和第二晶体管（100,101）分别通过使用基于硅衬底（110）的不同导电材料形成。 在第一和第二晶体管之间的衬底内形成有源层（119）。 有源层形成有一个量子点，其从包括在氮化硅层内形成的硅量子点的点，在氧化硅层内形成的硅量子点和化合物量子点组成。 化合物量子点选自包括GaAs，InAs，InGaAs，InAlAs和InP的组。 第一晶体管和第二晶体管中的每一个包括形成在基板上的栅极绝缘层（113），形成在栅极绝缘层上的栅电极（114A，114B）和形成在基板内的接合区域（116） 栅电极。
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公开(公告)号：KR100734881B1
公开(公告)日：2007-07-03
申请号：KR1020060014683
申请日：2006-02-15
Applicant: 한국전자통신연구원
IPC: H01L33/60
Abstract: A silicon light emitting diode capable of effectively utilizing light radiated toward the lateral side of a substrate by including a side reflecting mirror is provided. The silicon-based light emitting diode includes a p-type silicon substrate having a plurality of grooves, a light emitting diode layer formed on each of the grooves of the silicon substrate, the light emitting diode layer including an active layer, an n-type doped layer, and a transparent electrode layer, and a metal electrode including a lower metal electrode formed on the bottom surface of the p-type silicon substrate and an upper metal electrode formed on the top surface of the transparent electrode layer. The lateral surface of each of the grooves is separated from the light emitting diode layer and used as a reflecting mirror. The lateral surface is referred to as the side reflecting mirror.
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公开(公告)号：KR100615430B1
公开(公告)日：2006-08-25
申请号：KR1020030097049
申请日：2003-12-26
Applicant: 한국전자통신연구원
CPC classification number: H01S3/0632 , B82Y10/00 , B82Y20/00 , H01S3/16 , H01S3/1603 , H01S3/163 , H01S3/1685 , H01S3/1691
Abstract: 본 발명은 비정질 실리콘 양자점과 희토류 원소가 함께 분산되어 포함되며 비정질 실리콘 양자점에 의해 희토류 원소가 여기되어 광을 방출시키는 광소자용 실리콘 질화물 박막 및 그 제조방법을 제공한다. 이를 이용하면, 비정질 실리콘 양자점이 희토류 원소의 발광특성을 매우 향상시켜 우수한 성능의 광소자를 만들 수 있다.
양자점, 비정질 실리콘 양자점, 희토류, 광소자-
公开(公告)号：KR100568502B1
公开(公告)日：2006-04-07
申请号：KR1020040063025
申请日：2004-08-11
Applicant: 한국전자통신연구원
CPC classification number: H01L33/38
Abstract: 본 발명은 반도체 발광소자에 관한 것으로, 보다 상세하게는 실리콘계 또는 질화물계 발광소자에 있어서 발광층 또는 상부 도핑층의 상부면에 복수개의 상부전극을 형성하고, 기판 또는 하부 도핑층의 상부면에 적어도 하나의 하부전극을 형성하여 전극들로 인가되는 전류 퍼짐 특성을 향상시킴으로써, 발광층의 발광 면적을 최대화시킬 수 있을 뿐만 아니라 발광층 전면에서 균일한 세기를 가지는 발광을 유도하여 발광소자의 발광 효율을 더욱 향상시킬 수 있는 효과가 있다.
반도체 발광소자, 발광층, 상부 도핑층, 하부 도핑층, 상부전극, 하부전극-
公开(公告)号：KR100462481B1
公开(公告)日：2004-12-17
申请号：KR1020020008298
申请日：2002-02-16
Applicant: 한국전자통신연구원
IPC: G01B11/26
Abstract: PURPOSE: A focusing angle measuring apparatus of a focusing waveguide grating coupler is provided to precisely measure a focusing angle of the focusing waveguide grating coupler by using a wide-band optical system, thereby minimizing process and design errors. CONSTITUTION: Light radiated from a wide-band light source(201) is guided into one plane of an image detecting device(211) through a photo guide(202), openings(203,205,206), a relay lens(204), a focusing lens(208) and a beam splitter(207) so that an image of a focusing grating(210) is formed on the plate of the image detecting device(211). At the same time, light is diffracted by means of the focusing grating(210) so that a focus(213) of light is formed. Focusing light(215) is formed on one plane of an image detecting device(211) by means of the focusing lens(208). That is, a shape of the opening(205) is formed on the plane of the image detecting device(211).
Abstract translation: 目的：提供一种聚焦波导光栅耦合器的聚焦角度测量装置，用于通过使用宽带光学系统来精确测量聚焦波导光栅耦合器的聚焦角，从而最小化过程和设计误差。 组成：从宽带光源（201）辐射的光通过光导（202），开口（203,205,206），中继透镜（204），聚焦透镜（204）被引导到图像检测装置（211） （208）和分束器（207），从而在图像检测装置（211）的板上形成聚焦光栅（210）的图像。 同时，光通过聚焦光栅（210）衍射，从而形成光的焦点（213）。 聚焦光（215）通过聚焦透镜（208）形成在图像检测装置（211）的一个平面上。 即，在图像检测装置（211）的平面上形成开口（205）的形状。
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